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ORCIDJosé F. Martínez
2020 – today
- 2024
[c40]Kailin Yang
, José F. Martínez:
FloatAP: Supporting High-Performance Floating-Point Arithmetic in Associative Processors. MICRO 2024: 657-670- 2023
- [j15]Carlos S. Galina, José F. Martínez, Bruce D. Murphy:
Constraints on Research in Biological and Agricultural Science in Developing Countries: The Example of Latin America. Publ. 11(2): 22 (2023) - [c39]Socrates S. Wong, Cecilio C. Tamarit, José F. Martínez:
PUMICE: Processing-using-Memory Integration with a Scalar Pipeline for Symbiotic Execution. DAC 2023: 1-6 - [c38]Gloire Rubambiza, Shiang-Wan Chin, Mueed Rehman, Sachille Atapattu, José F. Martínez, Hakim Weatherspoon:
Comosum: An Extensible, Reconfigurable, and Fault-Tolerant IoT Platform for Digital Agriculture. USENIX ATC 2023: 197-214 - 2022
- [c37]Shuang Chen, Angela Jin, Christina Delimitrou, José F. Martínez:
ReTail: Opting for Learning Simplicity to Enable QoS-Aware Power Management in the Cloud. HPCA 2022: 155-168 - [c36]Shuang Chen, Yi Jiang, Christina Delimitrou, José F. Martínez:
PIMCloud: QoS-Aware Resource Management of Latency-Critical Applications in Clouds with Processing-in-Memory. HPCA 2022: 1086-1099 - [c35]Helena Caminal, Yannis Chronis, Tianshu Wu, Jignesh M. Patel, José F. Martínez:
Accelerating database analytic query workloads using an associative processor. ISCA 2022: 623-637 - 2021
- [c34]Helena Caminal, Kailin Yang, Srivatsa Srinivasa, Akshay Krishna Ramanathan, Khalid Al-Hawaj, Tianshu Wu, Vijaykrishnan Narayanan, Christopher Batten, José F. Martínez:
CAPE: A Content-Addressable Processing Engine. HPCA 2021: 557-569 - 2020
- [j14]Diksha Moolchandani, Anshul Kumar, José F. Martínez, Smruti R. Sarangi:
VisSched: An Auction-Based Scheduler for Vision Workloads on Heterogeneous Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 4252-4265 (2020)
2010 – 2019
- 2019
- [c33]Shuang Chen, Christina Delimitrou, José F. Martínez:
PARTIES: QoS-Aware Resource Partitioning for Multiple Interactive Services. ASPLOS 2019: 107-120 - [c32]Skand Hurkat, José F. Martínez:
VIP: A Versatile Inference Processor. HPCA 2019: 345-358 - 2017
- [c31]Xiaodong Wang, Shuang Chen, Jeff Setter, José F. Martínez:
SWAP: Effective Fine-Grain Management of Shared Last-Level Caches with Minimum Hardware Support. HPCA 2017: 121-132 - [c30]Shuang Chen, Shay GalOn, Christina Delimitrou, Srilatha Manne, José F. Martínez:
Workload characterization of interactive cloud services on big and small server platforms. IISWC 2017: 125-134 - 2016
- [c29]Xiaodong Wang, José F. Martínez:
ReBudget: Trading Off Efficiency vs. Fairness in Market-Based Multicore Resource Allocation via Runtime Budget Reassignment. ASPLOS 2016: 19-32 - 2015
- [c28]Skand Hurkat, Jungwook Choi, Eriko Nurvitadhi, José F. Martínez, Rob A. Rutenbar:
Fast hierarchical implementation of sequential tree-reweighted belief propagation for probabilistic inference. FPL 2015: 1-8 - [c27]Xiaodong Wang, José F. Martínez:
XChange: A market-based approach to scalable dynamic multi-resource allocation in multicore architectures. HPCA 2015: 113-125 - 2014
- [j13]Miguel S. Familiar, José F. Martínez, Carlos García-Rubio:
Service architecting and dynamic composition in pervasive smart ecosystems for the internet of things based on sensor network technology. J. Ambient Intell. Smart Environ. 6(3): 331-333 (2014) - [c26]Eriko Nurvitadhi, Gabriel Weisz, Yu Wang, Skand Hurkat, Marie Nguyen, James C. Hoe, José F. Martínez, Carlos Guestrin:
GraphGen: An FPGA Framework for Vertex-Centric Graph Computation. FCCM 2014: 25-28 - [c25]Vladimir Rodriguez, José F. Martínez, Jesús Ariel Carrasco-Ochoa, Manuel Sabino Lazo-Cortés, René Cumplido, Claudia Feregrino Uribe:
A hardware architecture for filtering irreducible testors. ReConFig 2014: 1-4 - 2013
- [j12]José F. Martínez:
A Message from the New Editor-in-Chief and Introduction of New Associate Editors. IEEE Comput. Archit. Lett. 12(1): 2-4 (2013) - [j11]José F. Martínez:
Editorial. IEEE Comput. Archit. Lett. 12(2): 37-38 (2013) - [c24]Janani Mukundan, Hillery C. Hunter, Kyu-Hyoun Kim, Jeffrey Stuecheli, José F. Martínez:
Understanding and mitigating refresh overheads in high-density DDR4 DRAM systems. ISCA 2013: 48-59 - [c23]Saugata Ghose, Hyodong Lee, José F. Martínez:
Improving memory scheduling via processor-side load criticality information. ISCA 2013: 84-95 - 2012
- [j10]Miguel S. Familiar, José F. Martínez, Iván Corredor, Carlos García-Rubio:
Building service-oriented Smart Infrastructures over Wireless Ad Hoc Sensor Networks: A middleware perspective. Comput. Networks 56(4): 1303-1328 (2012) - [j9]Iván Corredor, José F. Martínez, Miguel S. Familiar, Lourdes López-Santidrián:
Knowledge-Aware and Service-Oriented Middleware for deploying pervasive services. J. Netw. Comput. Appl. 35(2): 562-576 (2012) - [c22]Janani Mukundan, José F. Martínez:
MORSE: Multi-objective reconfigurable self-optimizing memory scheduler. HPCA 2012: 65-76 - [c21]Janani Mukundan, Saugata Ghose, Robert Karmazin, Engin Ipek, José F. Martínez:
Overcoming single-thread performance hurdles in the core fusion reconfigurable multicore architecture. ICS 2012: 101-110 - 2011
- [p1]Marc Roelands, Johan Plomp, Diego Casado Mansilla, Juan R. Velasco, Ismail Salhi, Gyu Myoung Lee, Noël Crespi, Filipe Vinci dos Santos, Julien Vachaudez, Frédéric Bettens, Joel Hanqc, Carlos Valderrama, Nilo Menezes, Alexandre Girardi, Xavier Ricco, Mario Lopez-Ramos, Nicolas Dumont, Iván Corredor, Miguel S. Familiar, José F. Martínez, Vicente Hernández, Dries De Roeck, Christof van Nimwegen, Leire Bastida, Marisa Escalante, Juncal Alonso, Quentin Reul, Yan Tang, Robert Meersman:
The DiY Smart Experiences Project - A European Endeavour Removing Barriers for User-generated Internet of Things Applications. Architecting the Internet of Things 2011: 279-315 - 2010
- [c20]Nevin Kirman, José F. Martínez:
A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing. ASPLOS 2010: 15-28
2000 – 2009
- 2009
- [j8]José F. Martínez, Engin Ipek:
Dynamic Multicore Resource Management: A Machine Learning Approach. IEEE Micro 29(5): 8-17 (2009) - [e1]David H. Albonesi, Margaret Martonosi, David I. August, José F. Martínez:
42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA. ACM 2009, ISBN 978-1-60558-798-1 [contents] - 2008
- [c19]Engin Ipek, Onur Mutlu, José F. Martínez, Rich Caruana:
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach. ISCA 2008: 39-50 - [c18]Ramazan Bitirgen, Engin Ipek, José F. Martínez:
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach. MICRO 2008: 318-329 - 2007
- [j7]Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, José F. Martínez, Alyssa B. Apsel, Matthew A. Watkins, David H. Albonesi:
On-Chip Optical Technology in Future Bus-Based Multicore Designs. IEEE Micro 27(1): 56-66 (2007) - [c17]Christopher LaFrieda, Engin Ipek, José F. Martínez, Rajit Manohar:
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor. DSN 2007: 317-326 - [c16]Engin Ipek, Meyrem Kirman, Nevin Kirman, José F. Martínez:
A Reconfigurable Chip Multiprocessor Architecture to Accommodate Software Diversity. IPDPS 2007: 1-6 - [c15]Engin Ipek, Meyrem Kirman, Nevin Kirman, José F. Martínez:
Core fusion: accommodating software diversity in chip multiprocessors. ISCA 2007: 186-197 - [c14]Arkaprava Basu, Nevin Kirman, Meyrem Kirman, Mainak Chaudhuri, José F. Martínez:
Scavenger: A New Last Level Cache Architecture with Global Block Priority. MICRO 2007: 421-432 - 2006
- [c13]Jian Li, José F. Martínez:
Dynamic power-performance adaptation of parallel computation on chip multiprocessors. HPCA 2006: 77-87 - [c12]Engin Ipek, José F. Martínez, Bronis R. de Supinski, Sally A. McKee, Martin Schulz:
Dynamic program phase detection in distributed shared-memory multiprocessors. IPDPS 2006 - [c11]Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, José F. Martínez, Alyssa B. Apsel, Matthew A. Watkins, David H. Albonesi:
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors. MICRO 2006: 492-503 - 2005
- [j6]Jian Li, José F. Martínez:
Power-performance considerations of parallel computing on chip multiprocessors. ACM Trans. Archit. Code Optim. 2(4): 397-422 (2005) - [c10]Nevin Kirman, Meyrem Kirman, Mainak Chaudhuri, José F. Martínez:
Checkpointed Early Load Retirement. HPCA 2005: 16-27 - [c9]Jian Li, José F. Martínez:
Power-Performance Implications of Thread-level Parallelism on Chip Multiprocessors. ISPASS 2005: 124-134 - [c8]Meyrem Kirman, Nevin Kirman, José F. Martínez:
Cherry-MP: Correctly Integrating Checkpointed Early Resource Recycling in Chip Multiprocessors. MICRO 2005: 245-256 - 2004
- [j5]José A. Santos, Ariel Carrasco, José F. Martínez:
Feature Selection Using Typical Testors Applied to Estimation of Stellar Parameters. Computación y Sistemas 8(1) (2004) - [j4]Adrián Cristal, José F. Martínez, Josep Llosa, Mateo Valero:
A case for resource-conscious out-of-order processors: towards kilo-instruction in-flight processors. SIGARCH Comput. Archit. News 32(3): 3-10 (2004) - [j3]Adrián Cristal, Oliverio J. Santana, Mateo Valero, José F. Martínez:
Toward kilo-instruction processors. ACM Trans. Archit. Code Optim. 1(4): 389-417 (2004) - [c7]Jian Li, José F. Martínez, Michael C. Huang:
The Thrifty Barrier: Energy-Aware Synchronization in Shared-Memory Multiprocessors. HPCA 2004: 14-23 - 2003
- [j2]Adrián Cristal, José F. Martínez, Josep Llosa, Mateo Valero:
A Case for Resource-conscious Out-of-order Processors. IEEE Comput. Archit. Lett. 2 (2003) - [j1]José F. Martínez, Josep Torrellas:
Speculative Synchronization: Programmability and Performance for Parallel Codes. IEEE Micro 23(6): 126-134 (2003) - 2002
- [b1]José F. Martínez:
Speculative Shared -Memory Architectures. University of Illinois Urbana-Champaign, USA, 2002 - [c6]José F. Martínez, Josep Torrellas:
Speculative synchronization: applying thread-level speculation to explicitly parallel applications. ASPLOS 2002: 18-29 - [c5]José F. Martínez, Jose Renau, Michael C. Huang, Milos Prvulovic, Josep Torrellas:
Cherry: checkpointed early resource recycling in out-of-order microprocessors. MICRO 2002: 3-14 - 2000
- [c4]Marcelo H. Cintra, José F. Martínez, Josep Torrellas:
Architectural support for scalable speculative parallelization in shared-memory multiprocessors. ISCA 2000: 13-24
1990 – 1999
- 1999
- [c3]M. Covadonga Fernández, Oscar Delgado, J. Ignacio López, M. Angeles Luna, José F. Martínez, J. F. Borja Pardo, José M. Peña:
DAMISYS: An Overview. DaWaK 1999: 313-317 - [c2]José F. Martínez, Josep Torrellas, José Duato:
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity. International Conference on Supercomputing 1999: 202-209 - 1996
- [c1]Juan Carlos Fernández, Lourdes Peñalver, M. Sobejano, José F. Martínez, Vicente Hernández, Josep Tornero:
An Interface Based on Transputers to Simulate the Dynamic Equation of Robot Manipulators Using Parallel Computing. VECPAR 1996: 365-379
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