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ORCIDRoger F. Woods
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- affiliation: Queen's University Belfast, UK
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2020 – today
- 2024
[j57]Alan J. Ferguson
, David Hester, Roger F. Woods:
A Systematic Approach to Filter Specification for Measuring Quasi-Static Bridge Rotation Under Moving Loads Using DC Accelerometers. IEEE Access 12: 67425-67437 (2024)- [j56]Hans Jakob Damsgaard, Antoine Grenier, Dewant Katare, Zain Taufique, Salar Shakibhamedan, Tiago Troccoli, Georgios Chatzitsompanis, Anil Kanduri, Aleksandr Ometov, Aaron Yi Ding, Nima Taherinejad, Georgios Karakonstantis, Roger F. Woods, Jari Nurmi:
Adaptive approximate computing in edge AI and IoT applications: A review. J. Syst. Archit. 150: 103114 (2024) - [j55]Yuqin Dou, Chenghua Wang, Haroon Waris, Roger F. Woods, Weiqiang Liu:
FPAX: A Fast Prior Knowledge-Based Framework for DSE in Approximate Configurations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(6): 1650-1662 (2024) - [j54]Guanxiong Shen, Junqing Zhang, Alan Marshall, Roger F. Woods, Joseph R. Cavallaro, Liquan Chen:
Towards Receiver-Agnostic and Collaborative Radio Frequency Fingerprint Identification. IEEE Trans. Mob. Comput. 23(7): 7618-7634 (2024) - 2023
- [j53]Yuqin Dou, Chenghua Wang, Roger F. Woods, Weiqiang Liu:
ENAP: An Efficient Number-Aware Pruning Framework for Design Space Exploration of Approximate Configurations. IEEE Trans. Circuits Syst. I Regul. Pap. 70(5): 2062-2073 (2023) - [c93]Majed Alsharari, Son T. Mai, Romain Garnier, Carlos Reaño, Roger F. Woods:
An Intelligent Image Processing System for Enhancing Blood Vessel Segmentation on Low-Power SoC. SAMOS 2023: 123-138 - 2022
- [j52]Tiantai Deng, Danny Crookes, Roger F. Woods, Fahad Manzoor Siddiqui:
A Soft Coprocessor Approach for Developing Image and Video Processing Applications on FPGAs. J. Imaging 8(2): 42 (2022) - [j51]Alan J. Ferguson, Roger F. Woods, David Hester:
Detecting Vehicle Loading Events in Bridge Rotation Data Measured with Multi-Axial Accelerometers. Sensors 22(13): 4994 (2022) - [j50]Umar Ibrahim Minhas, Roger F. Woods, Dimitrios S. Nikolopoulos, Georgios Karakonstantis:
Efficient, Dynamic Multi-Task Execution on FPGA-Based Computing Systems. IEEE Trans. Parallel Distributed Syst. 33(3): 710-722 (2022) - [j49]Umar Ibrahim Minhas, JunKyu Lee, Lev Mukhanov, Georgios Karakonstantis, Hans Vandierendonck, Roger F. Woods:
Increased Leverage of Transprecision Computing for Machine Vision Applications at the Edge. J. Signal Process. Syst. 94(10): 1101-1118 (2022) - [c92]Majed Alsharari, Lorenzo Niemitz, Simon Sorensen, Roger F. Woods, Ray Burke, Stefan Andersson-Engels, Carlos Reaño, Son T. Mai:
Multi-spectral In-Vivo FPGA-Based Surgical Imaging. ARC 2022: 103-117 - 2021
- [j48]Junqing Zhang, Roger F. Woods, Magnus Sandell, Mikko Valkama, Alan Marshall, Joseph R. Cavallaro:
Radio Frequency Fingerprint Identification for Narrowband Systems, Modelling and Classification. IEEE Trans. Inf. Forensics Secur. 16: 3974-3987 (2021) - [j47]Umar Ibrahim Minhas, Roger F. Woods, Georgios Karakonstantis:
Evaluation of Static Mapping for Dynamic Space-Shared Multi-task Processing on FPGAs. J. Signal Process. Syst. 93(5): 587-602 (2021) - [c91]JunKyu Lee, Blesson Varghese, Roger F. Woods, Hans Vandierendonck:
TOD: Transprecise Object Detection to Maximise Real-Time Accuracy on the Edge. ICFEC 2021: 53-60 - [c90]Umar Ibrahim Minhas, Lev Mukhanov, Georgios Karakonstantis, Hans Vandierendonck, Roger F. Woods:
Leveraging Transprecision Computing for Machine Vision Applications at the Edge. SiPS 2021: 205-210 - [i4]JunKyu Lee, Blesson Varghese, Roger F. Woods, Hans Vandierendonck:
TOD: Transprecise Object Detection to Maximise Real-Time Accuracy on the Edge. CoRR abs/2105.08668 (2021) - [i3]Umar Ibrahim Minhas, Lev Mukhanov, Georgios Karakonstantis, Hans Vandierendonck, Roger F. Woods:
Leveraging Transprecision Computing for Machine Vision Applications at the Edge. CoRR abs/2108.12914 (2021)
2010 – 2019
- 2019
- [j46]Fahad Manzoor Siddiqui, Sam Amiri, Umar Ibrahim Minhas, Tiantai Deng, Roger F. Woods, Karen Rafferty, Daniel Crookes:
FPGA-Based Processor Acceleration for Image Processing Applications. J. Imaging 5(1): 16 (2019) - [j45]Linning Peng, Guyue Li, Junqing Zhang, Roger F. Woods, Ming Liu, Aiqun Hu:
An Investigation of Using Loop-Back Mechanism for Channel Reciprocity Enhancement in Secret Key Generation. IEEE Trans. Mob. Comput. 18(3): 507-519 (2019) - [j44]Sunyoung Lee, Trung Q. Duong, Roger F. Woods:
Impact of Wireless Backhaul Unreliability and Imperfect Channel Estimation on Opportunistic NOMA. IEEE Trans. Veh. Technol. 68(11): 10822-10833 (2019) - [j43]Junqing Zhang, Sekhar Rajendran, Zhi Sun, Roger F. Woods, Lajos Hanzo:
Physical Layer Security for the Internet of Things: Authentication and Key Generation. IEEE Wirel. Commun. 26(5): 92-98 (2019) - [c89]Umar Ibrahim Minhas, Roger F. Woods, Georgios Karakonstantis:
Evaluation of FPGA Partitioning Schemes for Time and Space Sharing of Heterogeneous Tasks. ARC 2019: 334-349 - [c88]Umar Ibrahim Minhas, Roger F. Woods, Georgios Karakonstantis:
Design space exploration of multi-task processing on space shared FPGAs: work-in-progress. CODES+ISSS 2019: 10:1-10:2 - [c87]Umar Ibrahim Minhas, Roger F. Woods, Georgios Karakonstantis:
Optimisation of System Throughput Exploiting Tasks Heterogeneity on Space Shared FPGAs. FPT 2019: 359-362 - [e5]Christian Hochberger, Brent Nelson, Andreas Koch, Roger F. Woods, Pedro C. Diniz:
Applied Reconfigurable Computing - 15th International Symposium, ARC 2019, Darmstadt, Germany, April 9-11, 2019, Proceedings. Lecture Notes in Computer Science 11444, Springer 2019, ISBN 978-3-030-17226-8 [contents] - 2018
- [j42]Yuanrui Zhang, Roger F. Woods, Youngwook Ko, Alan Marshall, Junqing Zhang:
Security Optimization of Exposure Region-Based Beamforming With a Uniform Circular Array. IEEE Trans. Commun. 66(6): 2630-2641 (2018) - [j41]Umar Ibrahim Minhas, Matthew Russell, Stelios Kaloutsakis, Paul Barber, Roger F. Woods, Giorgis Georgakoudis, Charles Gillan, Dimitrios S. Nikolopoulos, Angelos Bilas:
NanoStreams: A Microserver Architecture for Real-Time Analytics on Fast Data Streams. IEEE Trans. Multi Scale Comput. Syst. 4(3): 396-409 (2018) - [c86]Umar Ibrahim Minhas, Roger F. Woods, George Karakonstantis:
Exploring Functional Acceleration of OpenCL on FPGAs and GPUs Through Platform-Independent Optimizations. ARC 2018: 551-563 - [c85]Umar Ibrahim Minhas, Roger F. Woods, Georgios Karakonstantis:
Facilitating Easier Access to FPGAs in the Heterogeneous Cloud Ecosystems. FPL 2018: 447-448 - [c84]Caoimhe M. Carbery, Roger F. Woods, Adele H. Marshall:
A Bayesian network based learning system for modelling faults in large-scale manufacturing. ICIT 2018: 1357-1362 - [c83]Sunyoung Lee, Trung Quang Duong, Roger F. Woods:
Opportunistic Non-Orthogonal Multiple Access Scheme with Unreliable Wireless Backhauls. PIMRC 2018: 1-5 - 2017
- [j40]Junqing Zhang, Trung Quang Duong, Roger F. Woods, Alan Marshall:
Securing Wireless Communications of the Internet of Things from the Physical Layer, An Overview. Entropy 19(8): 420 (2017) - [j39]Junqing Zhang, Biao He, Trung Quang Duong, Roger F. Woods:
On the Key Generation From Correlated Wireless Channels. IEEE Commun. Lett. 21(4): 961-964 (2017) - [j38]Junqing Zhang, Alan Marshall, Roger F. Woods, Trung Quang Duong:
Design of an OFDM Physical Layer Encryption Scheme. IEEE Trans. Veh. Technol. 66(3): 2114-2127 (2017) - [j37]Yuanrui Zhang, Youngwook Ko, Roger F. Woods, Alan Marshall:
Defining Spatial Secrecy Outage Probability for Exposure Region-Based Beamforming. IEEE Trans. Wirel. Commun. 16(2): 900-912 (2017) - [j36]Moslem Amiri, Fahad Manzoor Siddiqui, Colm Kelly, Roger F. Woods, Karen Rafferty, Burak Bardak:
FPGA-Based Soft-Core Processors for Image Processing Applications. J. Signal Process. Syst. 87(1): 139-156 (2017) - [i2]Junqing Zhang, Trung Quang Duong, Roger F. Woods, Alan Marshall:
Securing Wireless Communications of the Internet of Things from the Physical Layer, An Overview. CoRR abs/1708.05124 (2017) - 2016
- [j35]Junqing Zhang, Trung Quang Duong, Alan Marshall, Roger F. Woods:
Key Generation From Wireless Channels: A Review. IEEE Access 4: 614-626 (2016) - [j34]Junqing Zhang, Roger F. Woods, Trung Quang Duong, Alan Marshall, Yuan Ding, Yi Huang, Qian Xu:
Experimental Study on Key Generation for Physical Layer Security in Wireless Communications. IEEE Access 4: 4464-4477 (2016) - [j33]Junqing Zhang, Alan Marshall, Roger F. Woods, Trung Quang Duong:
Efficient Key Generation by Exploiting Randomness From Channel Responses of Individual OFDM Subcarriers. IEEE Trans. Commun. 64(6): 2578-2588 (2016) - [c82]Yuanrui Zhang, Youngwook Ko, Roger F. Woods, Alan Marshall, Joe Cavallaro, Kaipeng Li:
On spatial security outage probability derivation of exposure region based beamforming with randomly located eavesdroppers. ACSSC 2016: 689-690 - [c81]Yuanrui Zhang, Youngwook Ko, Roger F. Woods, Alan Marshall, Joe Cavallaro, Kaipeng Li:
On spatial security outage probability derivation of exposure region based beamforming with randomly located eavesdroppers. ACSSC 2016: 2054-2058 - [c80]Colm Kelly, Fahad Manzoor Siddiqui, Burak Bardak, Yun Wu, Roger F. Woods, Karen Rafferty:
FPGA Soft-Core Processors, Compiler and Hardware Optimizations Validated Using HOG. ARC 2016: 78-90 - [c79]Caoimhe M. Carbery, Adele H. Marshall, Roger F. Woods:
Proposing the Deep Dynamic Bayesian Network as a Future Computer Based Medical System. CBMS 2016: 227-228 - [c78]Yun Wu, Dimitrios S. Nikolopoulos, Roger F. Woods:
Runtime support for adaptive power capping on heterogeneous SoCs. SAMOS 2016: 71-78 - [c77]Giorgis Georgakoudis, Charles Gillan, Ahmad Hassan, Umar Ibrahim Minhas, Ivor T. A. Spence, George Tzenakis, Hans Vandierendonck, Roger F. Woods, Dimitrios S. Nikolopoulos, Murali Shyamsundar, Paul Barber, Matthew Russell, Angelos Bilas, Stelios Kaloutsakis, Heiner Giefers, Peter W. J. Staar, Costas Bekas, Neil Horlock, Richard Faloon, Colin Pattison:
NanoStreams: Codesigned microservers for edge analytics in real time. SAMOS 2016: 180-187 - [c76]Junqing Zhang, Roger F. Woods, Trung Quang Duong, Alan Marshall, Yuan Ding:
Experimental study on channel reciprocity in wireless key generation. SPAWC 2016: 1-5 - [i1]Yuanrui Zhang, Youngwook Ko, Roger F. Woods, Alan Marshall:
Defining Spatial Security Outage Probability for Exposure Region Based Beamforming. CoRR abs/1608.00634 (2016) - 2015
- [c75]Junqing Zhang, Roger F. Woods, Alan Marshall, Trung Quang Duong:
Verification of Key Generation from Individual OFDM Subcarrier's Channel Response. GLOBECOM Workshops 2015: 1-6 - [c74]Junqing Zhang, Roger F. Woods, Alan Marshall, Trung Quang Duong:
An effective key generation system using improved channel reciprocity. ICASSP 2015: 1727-1731 - 2014
- [c73]Burak Bardak, Fahad Manzoor Siddiqui, Colm Kelly, Roger F. Woods:
Dataflow toolset for soft-core processors on FPGA for image processing applications. ACSSC 2014: 1445-1449 - [c72]Yuanrui Zhang, Bei Yin, Roger F. Woods, Joseph R. Cavallaro, Alan Marshall, Youngwook Ko:
Investigation of secure wireless regions using configurable beamforming on WARP. ACSSC 2014: 1979-1983 - [c71]Yun Wu, José L. Núñez-Yáñez, Roger F. Woods, Dimitrios S. Nikolopoulos:
Power modelling and capping for heterogeneous ARM/FPGA SoCs. FPT 2014: 231-234 - [c70]Junqing Zhang, Alan Marshall, Roger F. Woods, Trung Quang Duong:
Secure key generation from OFDM subcarriers' channel responses. GLOBECOM Workshops 2014: 1302-1307 - [c69]Yuanrui Zhang, Alan Marshall, Roger F. Woods, Youngwook Ko:
Creating secure wireless regions using configurable beamforming. PIMRC 2014: 47-52 - [c68]Fahad Manzoor Siddiqui, Matthew Russell, Burak Bardak, Roger F. Woods, Karen Rafferty:
IPPro: FPGA based image processing processor. SiPS 2014: 26-31 - [c67]Colm Kelly, Fahad Manzoor Siddiqui, Burak Bardak, Roger F. Woods:
Histogram of oriented gradients front end processing: An FPGA based processor approach. SiPS 2014: 238-243 - 2013
- [j32]Louis-Marie Aubert, Roger F. Woods, Scott Fischaber, Richard Veitch:
Optimization of Weighted Finite State Transducer for Speech Recognition. IEEE Trans. Computers 62(8): 1607-1615 (2013) - [j31]Stephen McKeown, Roger F. Woods:
Power Efficient, FPGA Implementations of Transform Algorithms for Radar-Based Digital Receiver Applications. IEEE Trans. Ind. Informatics 9(3): 1591-1600 (2013) - [c66]S. Hughes, B. Zhou, Roger F. Woods, Alan Marshall:
Implementation of selective packet destruction on wireless open-access research platform. ACSSC 2013: 2029-2033 - [p2]Roger F. Woods:
Mapping Decidable Signal Processing Graphs into FPGA Implementations. Handbook of Signal Processing Systems 2013: 1377-1399 - 2012
- [j30]Andreas Koch, Roger F. Woods:
Preface - ARC. Microprocess. Microsystems 36(8): 587 (2012) - [j29]Qi Zhang, Roger F. Woods, Alan Marshall:
An On-Demand Queue Management Architecture for a Programmable Traffic Manager. IEEE Trans. Very Large Scale Integr. Syst. 20(10): 1849-1862 (2012) - [c65]Roger F. Woods:
Session TA5b: Computer arithmetic accelerators for signal processing. ACSCC 2012: 980-982 - [c64]Stephen McKeown, Roger F. Woods:
Novel Application of Genetic Sequencing Algorithms to Optimization of Hardware Resource Sharing for DSP. ASAP 2012: 169-172 - 2011
- [j28]Stephen McKeown, Roger F. Woods:
Low power field programmable gate array implementation of fast digital signal processing algorithms: characterisation and manipulation of data locality. IET Comput. Digit. Tech. 5(2): 136-144 (2011) - [j27]Richard Veitch, Louis-Marie Aubert, Roger F. Woods, Scott Fischaber:
FPGA Implementation of a Pipelined Gaussian Calculation for HMM-Based Large Vocabulary Speech Recognition. Int. J. Reconfigurable Comput. 2011: 697080:1-697080:10 (2011) - [j26]Shane O'Neill, Roger F. Woods, Alan Marshall, Qi Zhang:
A Scalable and Programmable Modular Traffic Manager Architecture. ACM Trans. Reconfigurable Technol. Syst. 4(2): 14:1-14:19 (2011) - [j25]C. Zheng, Xuezheng Chu, John McAllister, Roger F. Woods:
Real-Valued Fixed-Complexity Sphere Decoder for High Dimensional QAM-MIMO Systems. IEEE Trans. Signal Process. 59(9): 4493-4499 (2011) - [c63]Roger F. Woods:
Session MA8b1: Computer arithmetic I. ACSCC 2011: 137-138 - [c62]Qi Zhang, Roger F. Woods, Alan Marshall:
Design and implementation of a flexible Queue Manager for Next Generation Networks. ACSCC 2011: 498-502 - [c61]Xuezheng Chu, John McAllister, Roger F. Woods:
A Pipeline Interleaved Heterogeneous SIMD Soft Processor Array Architecture for MIMO-OFDM Detection. ARC 2011: 133-144 - [c60]Keanhong Boey, Máire O'Neill, Roger F. Woods:
How Resistant are Sboxes to Power Analysis Attacks? NTMS 2011: 1-6 - [e4]Andreas Koch, Ram Krishnamurthy, John McAllister, Roger F. Woods, Tarek A. El-Ghazawi:
Reconfigurable Computing: Architectures, Tools and Applications - 7th International Symposium, ARC 2011, Belfast, UK, March 23-25, 2011. Proceedings. Lecture Notes in Computer Science 6578, Springer 2011, ISBN 978-3-642-19474-0 [contents] - 2010
- [j24]Brendan McAllister, Alan Marshall, Roger F. Woods:
A Programmable Architecture for Layered Multimedia Streams in IPv6 Networks. J. Networks 5(1): 65-74 (2010) - [j23]Roger F. Woods, Jürgen Becker, Peter Athanas, Fearghal Morgan:
Guest Editorial ARC 2009. ACM Trans. Reconfigurable Technol. Syst. 4(1): 1:1-1:2 (2010) - [j22]Scott Fischaber, Roger F. Woods, John McAllister:
SoC Memory Hierarchy Derivation from Dataflow Graphs. J. Signal Process. Syst. 60(3): 345-361 (2010) - [c59]Keanhong Boey, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Random clock against differential power analysis. APCCAS 2010: 756-759 - [c58]Jianhua Lu, Ji Ming, Roger F. Woods:
Adapting noisy speech models - Extended uncertainty decoding. ICASSP 2010: 4322-4325 - [c57]Keanhong Boey, Philip Hodgers, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Security of AES Sbox designs to power analysis. ICECS 2010: 1232-1235 - [c56]Keanhong Boey, Yingxi Lu, Máire O'Neill, Roger F. Woods:
Differential Power Analysis of CAST-128. ISVLSI 2010: 143-148 - [c55]John McGlone, Roger F. Woods, Alan Marshall, Michaela Blott:
Design of a flexible high-speed FPGA-based flow monitor for next generation networks. ICSAMOS 2010: 37-44 - [p1]Roger F. Woods:
Mapping Decidable Signal Processing Graphs into FPGA Implementations. Handbook of Signal Processing Systems 2010: 875-898
2000 – 2009
- 2009
- [j21]Katherine Compton, Roger F. Woods, Christos-Savvas Bouganis, Pedro C. Diniz:
Introduction to the Special Issue ARC'08. ACM Trans. Reconfigurable Technol. Syst. 2(4): 20:1 (2009) - [c54]John McGlone, Alan Marshall, Roger F. Woods:
An Attack-Resilent Sampling Mechanism for Integrated IP Flow Monitors. ICDCS Workshops 2009: 233-238 - [c53]Qi Zhang, Alan Marshall, Roger F. Woods:
A traffic manager for integrated queuing and scheduling of unicast and multicast IP traffic. ICT 2009: 65-70 - [c52]Jianhua Lu, Ji Ming, Roger F. Woods:
Replacing uncertainty decoding with subband re-estimation for large vocabulary speech recognition in noise. INTERSPEECH 2009: 2407-2410 - [e3]Jürgen Becker, Roger F. Woods, Peter M. Athanas, Fearghal Morgan:
Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings. Lecture Notes in Computer Science 5453, Springer 2009, ISBN 978-3-642-00640-1 [contents] - 2008
- [j20]Jürgen Becker, Michael Hübner, Roger F. Woods, Philip Heng Wai Leong, Robert Esser, Lionel Torres:
Current Trends on Reconfigurable Computing. Int. J. Reconfigurable Comput. 2008: 918525:1 (2008) - [j19]Roger F. Woods, John V. McCanny, John G. McWhirter:
From Bit Level Systolic Arrays to HDTV Processor Chips. J. Signal Process. Syst. 53(1-2): 35-49 (2008) - [c51]Gaye Lightbody, Roger F. Woods:
QR Recursive Least Squares IP Core Example. ECBS 2008: 369-374 - [c50]Stephen McKeown, Roger F. Woods, John McAllister:
Power efficient DSP datapath configuration methodology for FPGA. FPL 2008: 515-518 - [c49]Katarzyna Chuchacz, Roger F. Woods, Sile O'Modhrain:
Novel percussive Instrument Design - Converting Mathematical Formulae into engaging Musical Instruments. ICMC 2008 - [c48]Jianhua Lu, Ji Ming, Roger F. Woods:
Combining noise compensation and missing-feature decoding for large vocabulary speech recognition in noise. INTERSPEECH 2008: 1269-1272 - [c47]John McGlone, Alan Marshall, Roger F. Woods:
A real-time flow monitor architecture encompassing on-demand monitoring functions. NOMS 2008: 871-874 - [c46]Scott Fischaber, John McAllister, Roger F. Woods:
Memory-Centric Hardware Synthesis from Dataflow Models. SAMOS 2008: 197-206 - [c45]Stephen McKeown, Roger F. Woods, John McAllister:
Power efficient dynamic-range utilisation for DSP on FPGA. SiPS 2008: 233-238 - [e2]Roger F. Woods, Katherine Compton, Christos-Savvas Bouganis, Pedro C. Diniz:
Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings. Lecture Notes in Computer Science 4943, Springer 2008, ISBN 978-3-540-78609-2 [contents] - 2007
- [j18]Ed F. Deprettere, Roger F. Woods, Ingrid Verbauwhede, Erwin A. de Kock:
Transforming Signal Processing Applications into Parallel Implementations. EURASIP J. Adv. Signal Process. 2007 (2007) - [j17]John McAllister, Roger F. Woods, Scott Fischaber, E. Malins:
Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms. J. Syst. Archit. 53(8): 511-523 (2007) - [j16]Erdem Motuk, Roger F. Woods, Stefan Bilbao, John McAllister:
Design Methodology for Real-Time FPGA-Based Sound Synthesis. IEEE Trans. Signal Process. 55(12): 5833-5845 (2007) - [c44]Gaye Lightbody, Roger F. Woods, Jonathan Francey:
Soft IP core implementation of recursive least squares filter using only multplicative and additive operators. FPL 2007: 597-600 - [c43]Katarzyna Chuchacz, Sile O'Modhrain, Roger F. Woods:
Physical Models and Musical Controllers - Designing a Novel Electronic Percussion Instrument. NIME 2007: 37-40 - [c42]Scott Fischaber, Roger F. Woods, John McAllister:
SOC Memory Hierarchy Derivation from Dataflow Graphs. SiPS 2007: 469-474 - 2006
- [j15]Ying Yi, Roger F. Woods:
Hierarchical synthesis of complex DSP functions using IRIS. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5): 806-820 (2006) - [j14]John McAllister, Roger F. Woods, Richard L. Walke, Darren Gerard Reilly:
Multidimensional DSP Core Synthesis for FPGA. J. VLSI Signal Process. 43(2-3): 207-221 (2006) - [c41]John V. McCanny, Roger F. Woods, John G. McWhirter:
From Bit Level Systolic Arrays to HDTV Processor Chips. ASAP 2006: 159-162 - [c40]Scott Fischaber, John McAllister, Roger F. Woods, E. Malins:
Muir Hardware Synthesis for Multimedia Applications. ESTIMedia 2006: 101-106 - [c39]Shane O'Neill, Alan Marshall, Roger F. Woods:
Providing Input-Output Throughput Guarantees in a Buffered Crossbar Switch. ISCC 2006: 725-730 - 2005
- [j13]Lok-Kee Ting, Roger F. Woods, C. F. N. Cowan:
Virtex FPGA implementation of a pipelined adaptive LMS predictor for electronic support measures receivers. IEEE Trans. Very Large Scale Integr. Syst. 13(1): 86-95 (2005) - [j12]Ying Yi, Roger F. Woods, Lok-Kee Ting, C. F. N. Cowan:
High Speed FPGA-Based Implementations of Delayed-LMS Filters. J. VLSI Signal Process. 39(1-2): 113-131 (2005) - [c38]Erdem Motuk, Roger F. Woods, Stefan Bilbao:
Parallel implementation of finite difference schemes for the plate equation on a FPGA-based multi-processor array. EUSIPCO 2005: 1-4 - [c37]Erdem Motuk, Roger F. Woods, Stefan Bilbao:
FPGA-Based Hardware for Physical Modelling Sound Synthesis by Finite Difference Schemes. FPT 2005: 103-110 - [c36]Scott Fischaber, R. Hasson, John McAllister, Roger F. Woods:
FPGA Core Network Implementation and Optimization: A Case Study. FPT 2005: 319-320 - [c35]Darren Gerard Reilly, Roger F. Woods, John McAllister, Richard L. Walke:
Rapid generation of hardware functionality in heterogeneous platforms [FPGA implementation applications]. ICASSP (5) 2005: 65-68 - [c34]Erdem Motuk, Roger F. Woods, Stefan Bilbao:
Implementation of finite difference schemes for the wave equation on FPGA. ICASSP (3) 2005: 237-240 - [c33]Brendan McAllister, Alan Marshall, Roger F. Woods:
Programmable Network Functionality for Improved QoS of Interactive Video Traffic. Net-Con 2005: 283-296 - [c32]Shane O'Neill, Alan Marshall, Roger F. Woods:
A Novel Packet Marking Function for Real-Time Interactive MPEG-4 Video Applications in a Differentiated Services Network. NETWORKING 2005: 1031-1042 - [c31]John McAllister, Roger F. Woods, Darren Gerard Reilly, Scott Fischaber, R. Hasson:
Rapid Implementation and Optimisation of DSP Systems on SoPC Heterogeneous Platforms. SAMOS 2005: 414-423 - 2004
- [j11]Lok-Kee Ting, Colin F. N. Cowan, Roger F. Woods:
LMS coefficient filtering for Time-varying chirped signals. IEEE Trans. Signal Process. 52(11): 3160-3169 (2004) - [j10]Richard H. Turner, Roger F. Woods:
Highly efficient, limited range multipliers for LUT-based FPGA architectures. IEEE Trans. Very Large Scale Integr. Syst. 12(10): 1113-1118 (2004) - [j9]Roger F. Woods, Russell Tessier:
Guest Editorial: Field Programmable Logic. J. VLSI Signal Process. 36(1): 5-6 (2004) - [c30]John McAllister, Roger F. Woods, Richard L. Walke:
Embedded Context Aware Hardware Component Generation for Dataflow System Exploration. SAMOS 2004: 254-263 - 2003
- [j8]Gaye Lightbody, Roger F. Woods, Richard L. Walke:
Design of a parameterizable silicon intellectual property core for QR-based RLS filtering. IEEE Trans. Very Large Scale Integr. Syst. 11(4): 659-678 (2003) - [c29]Richard H. Turner, Roger F. Woods:
Design Flow for Efficient FPGA Reconfiguration. FPL 2003: 972-975 - 2002
- [c28]Tim Courtney, Richard H. Turner, Roger F. Woods:
Mapping Multi-Mode Circuits to LUT-Based FPGA Using Embedded MUXes. FCCM 2002: 318- - [c27]Richard H. Turner, Roger F. Woods, Tim Courtney:
Multiplier-less Realization of a Poly-phase Filter Using LUT-based FPGAs. FPL 2002: 192-201 - [c26]Ying Yi, Roger F. Woods:
FPGA-based system-level design framework based on the IRIS synthesis tool and System Generator. FPT 2002: 85-92 - 2001
- [j7]Colin Cowan, Roger F. Woods, Jean-Paul Heron, P. Power, F. J. Sweeney:
Advances in adaptive signal processing: totally adaptive systems. Annu. Rev. Control. 25: 55-64 (2001) - [j6]Jean-Paul Heron, Roger F. Woods, Sakir Sezer, Richard H. Turner:
Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead. J. VLSI Signal Process. 28(1-2): 97-113 (2001) - [c25]Lok-Kee Ting, Roger F. Woods, Colin Cowan:
Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver. FPL 2001: 367-376 - [c24]Richard H. Turner, Tim Courtney, Roger F. Woods:
Implementation of fixed DSP functions using the reduced coefficient multiplier. ICASSP 2001: 881-884 - [e1]Gordon J. Brebner, Roger F. Woods:
Field-Programmable Logic and Applications, 11th International Conference, FPL 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings. Lecture Notes in Computer Science 2147, Springer 2001, ISBN 3-540-42499-7 [contents] - 2000
- [j5]Gaye Lightbody, Richard L. Walke, Roger F. Woods, John V. McCanny:
Linear QR Architecture for a Single Chip Adaptive Beamformer. J. VLSI Signal Process. 24(1): 67-81 (2000) - [c23]Lok-Kee Ting, C. F. N. Cowan, Roger F. Woods:
Tracking performance of momentum LMS algorithm for a chirped sinusoidal signal. EUSIPCO 2000: 1-4 - [c22]Tim Courtney, Richard H. Turner, Roger F. Woods:
An Investigation of Reconfigurable Multipliers for Use in Adaptive Signal Processing. FCCM 2000: 341-343 - [c21]Tim Courtney, Richard H. Turner, Roger F. Woods:
Multiplexer Based Reconfiguration for Virtex Multipliers. FPL 2000: 749-758
1990 – 1999
- 1999
- [c20]Jean-Paul Heron, Roger F. Woods:
Accelerating Run-Time Reconfiguration on FCCMs. FCCM 1999: 260-261 - [c19]Richard H. Turner, Roger F. Woods, Sakir Sezer, Jean-Paul Heron:
A Virtual Hardware Handler for RTR Systems. FCCM 1999: 262-263 - [c18]Gaye Lightbody, Richard L. Walke, Roger F. Woods, John V. McCanny:
Novel mapping of a linear QR architecture. ICASSP 1999: 1933-1936 - 1998
- [j4]Roger F. Woods, David W. Trainor, Jean-Paul Heron:
Applying an XC6200 to Real-Time Image Processing. IEEE Des. Test Comput. 15(1): 30-38 (1998) - [c17]Gareth Keane, Jonathan R. Spanier, Roger F. Woods:
The impact of data characteristics on hardware selection for low-power DSP. EUSIPCO 1998: 1-4 - [c16]Sakir Sezer, Roger F. Woods, Jean-Paul Heron, Alan Marshall:
Fast Partial Reconfiguration for FCCMs. FCCM 1998: 318-319 - [c15]Gareth Keane, Jonathan R. Spanier, Roger F. Woods:
The impact of data characteristics and hardware topology on hardware selection for low power DSP. ISLPED 1998: 94-96 - 1997
- [j3]David W. Trainor, Roger F. Woods, John V. McCanny:
Architectural Synthesis of Digital Signal Processing Algorithms Using "IRIS". J. VLSI Signal Process. 16(1): 41-55 (1997) - [c14]Roger F. Woods, Stefan H.-M. Ludwig, Jean-Paul Heron, David W. Trainor, Stephan W. Gehring:
FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again). FCCM 1997: 155-164 - 1996
- [j2]Colin Chiu Wing Hui, Tiong Jiu Ding, John V. McCanny, Roger F. Woods:
A 64-point Fourier transform chip for video motion compensation using phase correlation. IEEE J. Solid State Circuits 31(11): 1751-1761 (1996) - [c13]Colin Chiu Wing Hui, Tiong Jiu Ding, John V. McCanny, Roger F. Woods:
A New FFT Architecture and Chip Design for Motion Compensation based on Phase Correlation. ASAP 1996: 83-92 - [c12]Roger F. Woods, A. Cassidy, J. Gray:
VLSI architectures for field programmable gate arrays: a case study. FCCM 1996: 2-9 - [c11]David W. Trainor, Roger F. Woods:
Architectural Synthesis and Efficient Circuit Implementation for Field Programmable Gate Arrays. FPL 1996: 116-125 - [c10]Jean-Paul Heron, Roger F. Woods:
Architectural Strategies for Implementing an Image Processing Algorithm on XC6000 FPGA. FPL 1996: 317-326 - [c9]Colin Chiu Wing Hui, Tiong Jiu Ding, John V. McCanny, Roger F. Woods:
Error analysis of FFT architectures for digital video applications. ICECS 1996: 820-823 - 1994
- [c8]Richard L. Walke, Roger Evans, Roger F. Woods, G. Floyd, K. W. Wood:
A high performance IIR filter chip and its evaluation system. ASAP 1994: 22-32 - 1992
- [c7]B. P. McGovern, Roger F. Woods, John V. McCanny:
The systematic design of high performance digital filters. ICASSP 1992: 609-612 - 1991
- [c6]O. C. McNally, John V. McCanny, Roger F. Woods:
A 40 megasample IIR filter chip. ASAP 1991: 416-430 - [c5]O. C. McNally, John V. McCanny, Roger F. Woods:
Design of a Highly Pipelined 2nd Order IIR Filter Chip. VLSI 1991: 19-28 - 1990
- [c4]Rajinder Jit Singh, John V. McCanny, Roger F. Woods:
Pipelined two-port adaptor for wave digital filtering. ICASSP 1990: 1033-1036 - [c3]O. C. McNally, John V. McCanny, Roger F. Woods:
Optimized bit level architectures for IIR filtering. ICCD 1990: 302-306
1980 – 1989
- 1989
- [j1]Simon C. Knowles, John G. McWhirter, Roger F. Woods, John V. McCanny:
Bit-Level systolic architectures for high performance IIR filtering. J. VLSI Signal Process. 1(1): 9-24 (1989) - [c2]Simon C. Knowles, John G. McWhirter, Roger F. Woods, John V. McCanny:
A bit-level systolic architecture for very high performance IIR filters. ICASSP 1989: 2449-2452 - 1988
- [c1]Roger F. Woods, Simon C. Knowles, John V. McCanny, John G. McWhirter:
Systolic IIR filters with bit level pipelining. ICASSP 1988: 2072-2075
Coauthor Index
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