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The Journal of VLSI Signal Processing, Volume 39
Volume 39, Numbers 1-2, January 2005
- Naresh R. Shanbhag, Keshab K. Parhi:
Guest Editorial. 5-6 - Atsushi Hatabu, Takashi Miyazaki, Ichiro Kuroda:
QVGA/CIF Resolution MPEG-4 Video Codec Based on a Low-Power and General-Purpose DSP. 7-14 - Jeongseon Euh, Jeevan Chittamuru, Wayne P. Burleson:
Power-Aware 3D Computer Graphics Rendering. 15-33 - Yanni Chen, Keshab K. Parhi:
On the Performance and Implementation Issues of Interleaved Single Parity Check Turbo Product Codes. 35-47 - Seok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer:
Energy Efficient VLSI Architecture for Linear Turbo Equalizer. 49-62 - Michael J. Thul, Frank Gilbert, Timo Vogt, Gerd Kreiselmaier, Norbert Wehn:
A Scalable System Architecture for High-Throughput Turbo-Decoders. 63-77 - Bruno Bougard, M. Rullmann, Erik Brockmeyer, Liesbet Van der Perre, Francky Catthoor, Wim Dehaene:
Energy Efficient Memory Architecture for High Speed Decoding of Block Turbo-Codes with the Fang-Buda Algorithm. 79-92 - Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak:
Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders. 93-111 - Ying Yi, Roger F. Woods, Lok-Kee Ting, C. F. N. Cowan:
High Speed FPGA-Based Implementations of Delayed-LMS Filters. 113-131 - Tai-Lai Tung, Kung Yao:
Optimum Downlink Power Control of a DS-CDMA System via Convex Programming. 133-146 - Lasse Harju, Mika Kuulusa, Jari Nurmi:
Flexible Implementation of a WCDMA Rake Receiver. 147-160 - Thomas Richter, Gerhard P. Fettweis:
Interleaving on Parallel DSP Architectures. 161-173 - Puneet P. Newaskar, Raúl Blázquez, Anantha P. Chandrakasan:
A/D Precision Requirements for Digital Ultra-Wideband Radio Receivers. 175-188
Volume 39, Number 3, March 2005
- Mihai Sima, Sorin Cotofana, Jos T. J. van Eijndhoven, Stamatis Vassiliadis, Kees A. Vissers:
IEEE-Compliant IDCT on FPGA-Augmented TriMedia. 195-212 - Alireza Shoa, Shahram Shirani:
Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey. 213-235 - Tsung-Nan Lin, Joseph Shu:
Adaptive-Hierarchical-Filtering Technique for High-Quality Magazine Image Reproduction. 237-247 - Mahmoud Méribout, Mamoru Nakanishi:
A New Real Time Object Segmentation and Tracking Algorithm and its Parallel Hardware Architecture. 249-266 - Yih-Chyun Jenq:
Digital Signal Processing with Interleaved ADC Systems. 267-271 - Timothy W. O'Neil, Edwin Hsing-Mean Sha:
Combining Extended Retiming and Unfolding for Rate-Optimal Graph Transformation. 273-293 - Miriam Leeser, Srdjan Coric, Eric L. Miller, Haiqian Yu, Marc Trepanier:
Parallel-Beam Backprojection: An FPGA Implementation Optimized for Medical Imaging. 295-311 - Paraskevas Kalivas, Vassilis Vassilakis, Chris Meletis, Kiamal Z. Pekmestzi:
A New Low Latency Parallel FIR Filter Scheme. 313-322 - Nigel Boston:
Pipelined IIR Filter Architecture Using Pole-Radius Minimization. 323-331
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