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ORCIDMüstak E. Yalçin
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- affiliation: Istanbul Technical University, Department of Electronics and Communication Engineering
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2020 – today
- 2024
[j24]Mustafa Tanis
, Müstak Erhan Yalçin:
A statistical method of GPS spoofing detection using power spectral density for hardware. Int. J. Circuit Theory Appl. 52(5): 2560-2573 (2024)- [j23]Nafiseh Hematpour, Fatemeh Gharari, Berna Ors, Müstak E. Yalçin:
A novel S-box design based on quantum tent maps and fractional stochastic models with an application in image encryption. Soft Comput. 28(7): 6235-6268 (2024) - [c35]Özgür Ozan Yilmaz, Melahat Bilge Demirköz, Müstak Erhan Yalçin:
Single Event Upset Tolerant TRNG Design and Its Tests Under Radiation. DCIS 2024: 1-6 - [c34]Mustafa Tanis, Müstak Erhan Yalçin:
Spoofed GPS L1 Carrier C/A Code Manipulation Attack. SIU 2024: 1-4 - 2023
- [c33]Okan Çalis, Müstak Erhan Yalçin:
Optimization of the Eigenvalue Decomposition of Floating-Point Matrices on the TMS320C6672 Digital Signal Processor. ICECS 2023: 1-4 - [c32]Yunus Emre Eryilmaz, Hasan Erdem Yantir, Müstak E. Yalçin:
An Open-Source eFPGA-based SoC Design for Computation Acceleration. ICECS 2023: 1-4 - [c31]Bilgehan Miraç Baki, Müstak E. Yalçin:
FPGA-Based Implementation of a Matched Filter for Acoustic Shooter Localization System. SIU 2023: 1-4 - 2022
- [j22]Emrah Abtioglu, Müstak Erhan Yalçin:
The deep multichannel discrete-time cellular neural network model for classification. Int. J. Circuit Theory Appl. 50(11): 4171-4178 (2022) - 2021
- [j21]Mohammed Salah Bouridah, Toufik Bouden, Müstak E. Yalçin:
Delayed outputs fractional-order hyperchaotic systems synchronization for images encryption. Multim. Tools Appl. 80(10): 14723-14752 (2021) - 2020
- [j20]Mohammed Salah Bouridah, Toufik Bouden, Müstak Erhan Yalçin:
Chaos Synchronization of Fractional-Order Lur'e Systems. Int. J. Bifurc. Chaos 30(14): 2050206:1-2050206:12 (2020) - [j19]Emre Goncu, Müstak Erhan Yalçin:
A design of cellular automata-based PUF and its implementation on FPGA. Int. J. Circuit Theory Appl. 48(8): 1244-1255 (2020) - [j18]Khaled Benkouider, Toufik Bouden, Müstak E. Yalçin, Sundarapandian Vaidyanathan:
A new family of 5D, 6D, 7D and 8D hyperchaotic systems from the 4D hyperchaotic Vaidyanathan system, the dynamic analysis of the 8D hyperchaotic system with six positive Lyapunov exponents and an application to secure communication design. Int. J. Model. Identif. Control. 35(3): 241-257 (2020) - [j17]Khaled Benkouider, Toufik Bouden, Sundarapandian Vaidyanathan, Müstak E. Yalçin:
A new family of 9D and 10D hyperchaotic systems from the 8D hyperchaotic Benkouider system, the bifurcation analysis of the 10D hyperchaotic system, circuit design and an application to secure voice communication. Int. J. Model. Identif. Control. 36(4): 271-289 (2020) - [c30]Oguzhan Çik, Müstak Erhan Yalçin:
A Hardware Accelerated Packet Classifier Design for A Network Router. SIU 2020: 1-4 - [c29]B. Hakan Sezgin, Mustafa Direk, Mert Külte, Mehmet Eskin, M. Esat Sudaduran, Emrah Abtioglu, Mustafa Tanis, Müstak E. Yalçin:
GEZSAN - Real Time Spectrum Analyzer. SIU 2020: 1-4
2010 – 2019
- 2018
- [c28]Emre Göncü, Abdulkadir Koçdogan, Müstak E. Yalçin:
A High Speed True Random Number Generator with Cellular Automata with Random Memory. ISCAS 2018: 1-5 - [c27]Ozan Vahit Altinpinar, Müstak Erhan Yalçin:
Design of a pedestrian dead-reckoning system and comparison of methods on the system. SIU 2018: 1-4 - [c26]Turan Can Artunc, Müstak Erhan Yalçin:
Design of an UWB-based indoor positioning system. SIU 2018: 1-4 - 2017
- [j16]Emre Goncu, Müstak E. Yalçin:
Cellular Automata with Random Memory and Its Implementations. Int. J. Bifurc. Chaos 27(5): 1730017:1-1730017:15 (2017) - [c25]Emre Goncu, Müstak E. Yalçin:
Realization of elementary cellular automata with random minimal memory. ECCTD 2017: 1-4 - [c24]Erdem Köse, Müstak E. Yalçin:
Emulating CNN with template learning on FPGA. ECCTD 2017: 1-4 - [c23]Ramazan Yeniceri, Alptekin Vardar, Erdem Cil, Latif Akcay, Emre Goncu, Müstak E. Yalçin:
A chaotic time-delay system based digital RNG and integrated autonomous test suite. ECCTD 2017: 1-4 - [c22]Ramazan Yeniceri, Alptekin Vardar, Müstak E. Yalçin:
Full digital implementation of a chaotic time-delay sampled-data system. ISCAS 2017: 1-4 - [c21]Emrah Abtioglu, Ramazan Yeniceri, Burak Govem, Emre Goncu, Müstak E. Yalçin, Gökay Saldamli:
Partially Reconfigurable IP Protection System with Ring Oscillator Based Physically Unclonable Functions. NGCAS 2017: 65-68 - 2016
- [j15]Ramazan Yeniçeri, Müstak E. Yalçin:
Asynchronous delay doubler and binary low-pass filter for a time-delay chaotic circuit. Int. J. Circuit Theory Appl. 44(6): 1211-1221 (2016) - [j14]Ramazan Yeniçeri, Müstak E. Yalçin:
Multi-scroll chaotic attractors from a generalized time-delay sampled-data system. Int. J. Circuit Theory Appl. 44(6): 1263-1276 (2016) - 2015
- [j13]Ramazan Yeniçeri, Selçuk Kilinç, Müstak E. Yalçin:
Attack on a Chaos-Based Random Number Generator Using Anticipating Synchronization. Int. J. Bifurc. Chaos 25(2): 1550021:1-1550021:11 (2015) - [c20]Emrah Abtioglu, Ramazan Yeniceri, Müstak E. Yalçin:
Cellular network of networks on dynamically partial reconfigurable FPGA. ECCTD 2015: 1-4 - [c19]Baris Karakaya, Ramazan Yeniceri, Müstak E. Yalçin:
Wave computer core using fixed-point arithmetic. ISCAS 2015: 1514-1517 - [c18]Sahin Bas, Müstak E. Yalçin:
Key generation and license authentication using physical unclonable functions. SIU 2015: 387-390 - [c17]Osman Levent Savkay, Vedat Tavsanoglu, Müstak Erhan Yalçin, Evren Cesur:
Computer assisted sperm analysis system designed on a hybrid CPU + FPGA architecture. SIU 2015: 1425-1428 - 2014
- [j12]Müstak E. Yalçin, Ramazan Yeniceri, Serdar Özoguz:
A Chaotic Time-Delay Sampled-Data System and Its Implementation. Int. J. Bifurc. Chaos 24(3) (2014) - [c16]O. Levent Savkay, Evren Cesur, Nerhun Yildiz, Müstak E. Yalçin, Vedat Tavsanoglu:
Realization of processing blocks of CNN based CASA system on CPU and FPGA. ISCAS 2014: 2081-2084 - [c15]Melike Atay, Müstak E. Yalçin:
Digital design of skeletonization. SIU 2014: 718-721 - 2013
- [c14]Melike Atay, Müstak E. Yalçin:
A parallelized distance transformation architecture for FPGAs. ECCTD 2013: 1-4 - [c13]O. Levent Savkay, Nerhun Yildiz, Evren Cesur, Müstak E. Yalçin, Vedat Tavsanoglu:
Realization of preprocessing blocks of CNN based CASA system on FPGA. ECCTD 2013: 1-4 - [c12]Ramazan Yeniceri, Buse Ustaoglu, Müstak E. Yalçin:
Throughput enhancement for a new time-delay sampled-data system based True Random Bit Generator. ECCTD 2013: 1-4 - [c11]Ramazan Yeniceri, Müstak E. Yalçin:
The Doppler Effect with input driven autowaves. ECCTD 2013: 1-4 - 2012
- [j11]Tuba Ayhan, Müstak Erhan Yalçin:
An Application of Small-World Cellular Neural Networks on Odor Classification. Int. J. Bifurc. Chaos 22(1) (2012) - [c10]Tuba Ayhan, Ramazan Yeniceri, Selman Ergunay, Müstak Erhan Yalçin:
Hybrid processor population for odor processing. ISCAS 2012: 177-180 - 2011
- [j10]Fethullah Karabiber, Giuseppe Grassi, Pietro Vecchio, Sabri Arik, Müstak Erhan Yalçin:
Implementation of a cellular neural network-based segmentation algorithm on the bio-inspired vision system. J. Electronic Imaging 20(1): 013004 (2011) - [c9]Tuba Ayhan, Müstak Erhan Yalçin:
Randomly reconfigurable Cellular Neural Network. ECCTD 2011: 604-607 - [c8]Volkan Kilic, Müstak E. Yalçin:
An active wave computing based path finding approach for 3-D environment. ISCAS 2011: 2165-2168 - 2010
- [j9]Selçuk Kilinç, Müstak E. Yalçin, Serdar Özoguz:
Multiscroll Chaotic attractors from a Hysteresis Based Time-Delay Differential equation. Int. J. Bifurc. Chaos 20(10): 3275-3281 (2010)
2000 – 2009
- 2009
- [c7]Ramazan Yeniceri, Müstak E. Yalçin:
An emulated digital wave computer core implementation. ECCTD 2009: 831-834 - 2008
- [c6]Selçuk Kilinç, Müstak E. Yalçin, Serdar Özoguz:
Synchronization of first-order time-delay systems generating n-scroll chaotic attractors. ISCAS 2008: 756-759 - 2007
- [j8]Müstak E. Yalçin:
Increasing the Entropy of a Random Number Generator Using n-scroll Chaotic attractors. Int. J. Bifurc. Chaos 17(12): 4471-4479 (2007) - 2006
- [j7]Müstak E. Yalçin, Johan A. K. Suykens:
Spatiotemporal Pattern Formation on the ACE16K CNN Chip. Int. J. Bifurc. Chaos 16(5): 1537-1546 (2006) - [c5]Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle:
Multi-scroll and hypercube attractors from Josephson junctions. ISCAS 2006 - 2005
- [c4]Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle:
Spatiotemporal pattern formation in the ACE16k CNN chip. ISCAS (6) 2005: 5814-5817 - 2004
- [j6]Müstak E. Yalçin, Joos Vandewalle, Paolo Arena, Adriano Basile, Luigi Fortuna:
Watermarking on CNN-UM for image and video authentication. Int. J. Circuit Theory Appl. 32(6): 591-607 (2004) - [j5]Samuel Xavier de Souza, Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle:
Toward CNN chip-specific robustness. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(5): 892-902 (2004) - [j4]Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle:
True random bit generation from a double-scroll attractor. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(7): 1395-1404 (2004) - [c3]Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle:
A double scroll based true random bit generator. ISCAS (4) 2004: 581-584 - 2003
- [j3]F. Acar Savaci, Müstak E. Yalçin, Cüneyt Güzelis:
Steady-State Analysis of Nonlinearly Coupled Chua's Circuits with Periodic Input. Int. J. Bifurc. Chaos 13(11): 3395-3407 (2003) - [c2]Johan A. K. Suykens, Müstak E. Yalçin, Joos Vandewalle:
Coupled chaotic simulated annealing processes. ISCAS (3) 2003: 582-585 - 2002
- [j2]Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle, Serdar Özoguz:
Families of scroll Grid attractors. Int. J. Bifurc. Chaos 12(1): 23-41 (2002) - 2001
- [j1]Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle:
Master-Slave Synchronization of Lur'e Systems with Time-Delay. Int. J. Bifurc. Chaos 11(6): 1707-1722 (2001)
1990 – 1999
- 1999
- [c1]Müstak E. Yalçin, Johan A. K. Suykens, Joos Vandewalle:
On the realization of n-scroll attractors. ISCAS (5) 1999: 483-486
Coauthor Index
aka: Ramazan Yeniçeri
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