"Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs."

Shin-Shiun Chen et al. (2013)

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DOI: 10.1109/ASPDAC.2013.6509634

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Shin-Shiun Chen, Chun-Kai Hsu, Hsiu-Chuan Shih, Jen-Chieh Yeh, Cheng-Wen Wu:
Processor and DRAM integration by TSV-based 3-D stacking for power-aware SOCs. ASP-DAC 2013: 429-434

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