"Verification of the Generic Architecture of a Memory Circuit Using ..."

Remy Chevallier et al. (2006)

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DOI: 10.1007/11867340_9

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Remy Chevallier, Emmanuelle Encrenaz-Tiphène, Laurent Fribourg, Weiwen Xu:
Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata. FORMATS 2006: 113-127

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