"A Sampling Clock Skew Correction Technique for Time-Interleaved SAR ADCs."

Daniel Prashanth, Hae-Seung Lee (2016)

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DOI: 10.1145/2902961.2903008

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Daniel Prashanth, Hae-Seung Lee:
A Sampling Clock Skew Correction Technique for Time-Interleaved SAR ADCs. ACM Great Lakes Symposium on VLSI 2016: 129-132

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