default search action
"A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and ..."
Dinesh Kushwaha et al. (2022)
- Dinesh Kushwaha, Aditya Sharma, Neha Gupta, Ritik Raj, Ashish Joshi, Jwalant Mishra, Rajat Kohli, Sandeep Miryala, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu:
A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing. ISCAS 2022: 1556-1560
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.