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"MCU-integrated PGA in 65nm CMOS with sub-1% gain error, 180ns acquisition ..."
Aniruddha Roy et al. (2018)
- Aniruddha Roy, Nitin Agarwal, Pavan K. Kulkarni, Poornima J. Boosi:
MCU-integrated PGA in 65nm CMOS with sub-1% gain error, 180ns acquisition window, and programmable output filter for motor control. ISCAS 2018: 1-5
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