"27.1 A 12b 2GS/s dual-rate hybrid DAC with pulsed timing-error ..."

Shiyu Su, Mike Shuo-Wei Chen (2016)

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DOI: 10.1109/ISSCC.2016.7418104

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type: Conference or Workshop Paper

metadata version: 2017-05-17

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Shiyu Su, Mike Shuo-Wei Chen:
27.1 A 12b 2GS/s dual-rate hybrid DAC with pulsed timing-error pre-distortion and in-band noise Cancellation Achieving >74dBc SFDR up to 1GHz in 65nm CMOS. ISSCC 2016: 456-457

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