"A 48-Gb/s Half-Rate PAM4 Optical Receiver with 0.27-pJ/bit TIA Efficiency, ..."

Chongyun Zhang et al. (2024)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46783.2024.10631502

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type: Conference or Workshop Paper

metadata version: 2024-10-17

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Chongyun Zhang, Li Wang, Zilu Liu, Fuzhan Chen, Quan Pan, Xianbo Li, C. Patrick Yue:
A 48-Gb/s Half-Rate PAM4 Optical Receiver with 0.27-pJ/bit TIA Efficiency, 1.28-pJ/bit RX Efficiency, and 0.06-mm² area in 28-nm CMOS. VLSI Technology and Circuits 2024: 1-2

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