"A low jitter 50Gb/s PAM4 CDR of Receiver in 40nm CMOS Technology."

Mengshuai Wang, Yingmei Chen, Jinlei Yuan (2020)

> Home

Details and statistics

DOI: 10.1109/WCSP49889.2020.9299712

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-15

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/wcsp/WangCY20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/wcsp/WangCY20
Mengshuai Wang, Yingmei Chen, Jinlei Yuan:
A low jitter 50Gb/s PAM4 CDR of Receiver in 40nm CMOS Technology. WCSP 2020: 349-352

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.