"A design methodology for SAR ADC optimal redundancy bit."

Toru Okazaki et al. (2014)

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DOI: 10.1587/ELEX.11.20140218

access: open

type: Journal Article

metadata version: 2021-02-12

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  - https://dblp.org/rec/journals/ieiceee/OkazakiKPYK14
Toru Okazaki, Daisuke Kanemoto, Ramesh K. Pokharel, Keiji Yoshida, Haruichi Kanaya:
A design methodology for SAR ADC optimal redundancy bit. IEICE Electron. Express 11(10): 20140218 (2014)

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