LETTER
A design methodology for SAR ADC optimal redundancy bit
2014 Volume 11 Issue 10 Pages 20140218
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2014 Volume 11 Issue 10 Pages 20140218
This paper presents a design method of SAR ADC (Successive Approximation Register Analog-to-Digital Converter ADC) utilizing redundancy bits. In general, binary search algorithm is used as a conventional SAR ADC operation algorithm. It’s possible to realize a high-speed SAR ADC by using non-binary search algorithm which is realized by adding redundancy bits. However, the A/D conversion time varies depending on the number of redundancy bits. Therefore, in order that the conversion time is the shortest, it’s necessary that an appropriate amount of redundancy be added. We show a methodology of finding the appropriate number of redundancy bits.
