"A Low-Power Level Shifter With Logic Error Correction for Extremely ..."

Yuji Osaki et al. (2012)

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DOI: 10.1109/JSSC.2012.2191320

access: closed

type: Journal Article

metadata version: 2020-08-30

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Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa:
A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs. IEEE J. Solid State Circuits 47(7): 1776-1783 (2012)

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