"A read-static-noise-margin-free SRAM cell for low-VDD and high-speed ..."

Koichi Takeda et al. (2006)

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DOI: 10.1109/JSSC.2005.859030

access: closed

type: Journal Article

metadata version: 2021-10-15

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Koichi Takeda, Yasuhiko Hagihara, Yoshiharu Aimoto, Masahiro Nomura, Yoetsu Nakazawa, Toshio Ishii, Hiroyuki Kobatake:
A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications. IEEE J. Solid State Circuits 41(1): 113-121 (2006)

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