"Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and ..."

Loganathan Lingappan et al. (2006)

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DOI: 10.1109/TCAD.2005.862735

access: closed

type: Journal Article

metadata version: 2021-10-14

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Loganathan Lingappan, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha, Srimat T. Chakradhar:
Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 2193-2206 (2006)

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