"High-Throughput Power-Efficient VLSI Architecture of Fractional Motion ..."

Gang He et al. (2015)

> Home

Details and statistics

DOI: 10.1109/TVLSI.2014.2386897

access: closed

type: Journal Article

metadata version: 2022-05-04

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tvlsi/HeZLCZG15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/HeZLCZG15
Gang He, Dajiang Zhou, Yunsong Li, Zhixiang Chen, Tianruo Zhang, Satoshi Goto:
High-Throughput Power-Efficient VLSI Architecture of Fractional Motion Estimation for Ultra-HD HEVC Video Encoding. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3138-3142 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.