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ORCID11. Haifa Verification Conference 2015: Haifa, Israel
- Nir Piterman:
Hardware and Software: Verification and Testing - 11th International Haifa Verification Conference, HVC 2015, Haifa, Israel, November 17-19, 2015, Proceedings. Lecture Notes in Computer Science 9434, Springer 2015, ISBN 978-3-319-26286-4
Hybrid Systems
- Rajarshi Ray, Amit Gurung
, Binayak Das, Ezio Bartocci, Sergiy Bogomolov, Radu Grosu:
XSpeed: Accelerating Reachability Analysis on Multi-core Processors. 3-18 - Sergiy Bogomolov, Christian Schilling, Ezio Bartocci, Grégory Batt, Hui Kong, Radu Grosu:
Abstraction-Based Parameter Synthesis for Multiaffine Systems. 19-35
Tools
- Balázs Kiss, Nikolai Kosmatov, Dillon Pariente, Armand Puccetti:
Combining Static and Dynamic Analyses for Vulnerability Detection: Illustration on Heartbleed. 39-50 - Moab Arar, Michael L. Behm, Odellia Boni, Raviv Gal, Alex Goldin, Maxim Ilyaev, Einat Kermany, John R. Reysa, Bilal Saleh, Klaus-Dieter Schubert, Gil Shurek, Avi Ziv:
The Verification Cockpit - Creating the Dream Playground for Data Analytics over the Verification Process. 51-66
Verification of Robotics
- Dejanira Araiza-Illan, David G. Western, Anthony G. Pipe, Kerstin Eder:
Coverage-Driven Verification - An Approach to Verify Code for Robots that Directly Interact with Humans. 69-84
Symbolic Execution
- Jakub Daniel, Pavel Parízek:
PANDA: Simultaneous Predicate Abstraction and Concrete Execution. 87-103 - Heike Wehrheim, Oleg Travkin:
TSO to SC via Symbolic Execution. 104-119 - Martin Nowack, Katja Tietze, Christof Fetzer:
Parallel Symbolic Execution: Merging In-Flight Requests. 120-135
Model Checking
- Lenore D. Zuck, Sanjiva Prasad:
Limited Mobility, Eventual Stability. 139-154 - Martin Leucker, Grigory Markin, Martin R. Neuhäußer:
A New Refinement Strategy for CEGAR-Based Industrial Model Checking. 155-170
Timed Systems
- Christian Herrera, Bernd Westphal:
Quasi-equal Clock Reduction: Eliminating Assumptions on Networks. 173-189 - Jin Hyun Kim, Axel Legay, Kim Guldstrand Larsen, Marius Mikucionis, Brian Nielsen:
Resource-Parameterized Timing Analysis of Real-Time Systems. 190-205
SAT Solving
- Jianwen Li, Shufang Zhu, Geguang Pu, Moshe Y. Vardi:
SAT-Based Explicit LTL Reasoning. 209-224 - Jia Hui Liang, Vijay Ganesh, Ed Zulkoski, Atulan Zaman, Krzysztof Czarnecki:
Understanding VSIDS Branching Heuristics in Conflict-Driven Clause-Learning SAT Solvers. 225-241
Multi Domain Verification
- Ping Yeung, Eugene Mandel:
Multi-Domain Verification of Power, Clock and Reset Domains. 245-255
Synthesis
- Andrew Becker, Djordje Maksimovic, David Novo, Mohsen Ewaida, Andreas G. Veneris, Barbara Jobstmann, Paolo Ienne:
FudgeFactor: Syntax-Guided Synthesis for Accurate RTL Error Localization and Correction. 259-275 - Jan Láník, Oded Maler:
On Switching Aware Synthesis for Combinational Circuits. 276-291
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