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ORCIDFari Assaderaghi
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2010 – 2019
- 2013
[j3]Michael H. Perrott, James C. Salvia, Fred S. Lee, Aaron Partridge, Shouvik Mukherjee, Carl Arft, Jin-Tae Kim, Niveditha Arumugam, Pavan Gupta, Sassan Tabatabaei, Sudhakar Pamarti
, Haechang Lee, Fari Assaderaghi:
A Temperature-to-Digital Converter for a MEMS-Based Programmable Oscillator With < ±0.5-ppm Frequency Stability and < 1-ps Integrated Jitter. IEEE J. Solid State Circuits 48(1): 276-291 (2013)- 2012
- [c5]Michael H. Perrott, Jim Salvia, Fred S. Lee, Aaron Partridge, Shouvik Mukherjee, Carl Arft, Jin-Tae Kim, Niveditha Arumugam, Pavan Gupta, Sassan Tabatabaei, Sudhakar Pamarti, Haechang Lee, Fari Assaderaghi:
A temperature-to-digital converter for a MEMS-based programmable oscillator with better than ±0.5ppm frequency stability. ISSCC 2012: 206-208
2000 – 2009
- 2009
- [j2]Haechang Lee, Kun-Yung Ken Chang, Jung-Hoon Chun, Ting Wu, Yohan Frans, Brian S. Leibowitz, Nhat Nguyen, T. J. Chin, Kambiz Kaviani, Jie Shen, Xudong Shi, Wendemagegnehu T. Beyene, Simon Li, Reza Navid, Marko Aleksic, Fred S. Lee, Fredy Quan, Jared Zerbe, Rich Perego, Fariborz Assaderaghi:
A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface. IEEE J. Solid State Circuits 44(4): 1235-1247 (2009) - 2003
- [j1]Rajiv V. Joshi, Ching-Te Chuang, Samuel K. H. Fung, Fari Assaderaghi, Melanie Sherony, I. Yang, Ghavam V. Shahidi:
PD/SOI SRAM performance in presence of gate-to-body tunneling current. IEEE Trans. Very Large Scale Integr. Syst. 11(6): 1106-1113 (2003) - 2000
- [c4]Pin Su, Samuel K. H. Fung, Stephen Tang, Fariborz Assaderaghi, Chenming Hu:
BSIMPD: a partial-depletion SOI MOSFET model for deep-submicron CMOS designs. CICC 2000: 197-200
1990 – 1999
- 1999
- [c3]Ghavam G. Shahidi, Atul Ajmera, Fariborz Assaderaghi, Ronald J. Bolam, Harold Hovel, Effendi Leobandung, Werner Rausch, Devendra Sadana, Dominic Schepis, Lawrence F. Wagner, Larry Wissel, Kun Wu, Bijan Davai:
Device and circuit design issues in SOI technology. CICC 1999: 339-346 - [c2]Fari Assaderaghi:
Circuit styles and strategies for CMOS VLSI design on SOI. ISLPED 1999: 282-287 - 1997
- [c1]Jim Burr, Anantha P. Chandrakasan, Fari Assaderaghi, Francky Catthoor, Frank Fox, Dave Greenhill, Deo Singh, Jim Sproch:
Low power design without compromise (panel). ISLPED 1997: 293-294
Coauthor Index
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