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ORCIDMassimo Bombana
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2000 – 2009
- 2004
[c11]Francesco Bruschi, Massimo Bombana:
A Design Methodology for the Exploitation of High Level Communication Synthesis. DATE 2004: 180-185- 2003
- [c10]Massimo Bombana, Francesco Bruschi:
SystemC-VHDL Co-Simulation and Synthesis in the HW Domain. DATE 2003: 20101-20105 - 2000
- [j3]Alberto Allara, Massimo Bombana, William Fornaciari
, Fabio Salice:
A Case Study in Design Space Exploration: The Tosca Environment Applied to a Telecommunication Link Controller. IEEE Des. Test Comput. 17(2): 60-72 (2000)
1990 – 1999
- 1998
- [c9]Alberto Allara, Massimo Bombana, Patrizia Cavalloro, Wolfgang Nebel, Wolfram Putzke-Röming, Martin Radetzki:
ATM Cell Modelling using Objective VHDL. ASP-DAC 1998: 261-264 - [c8]Massimo Bombana, Nikolay Fominykh, Giulio Gorla, Alexander Kriajev, Boris Krivosheyin, Juri Rytchagov:
IP-based design of custom field programmable network processors. ICECS 1998: 467-471 - 1997
- [c7]Massimo Bombana, Patrizia Cavalloro, Fabrizio Ferrandi:
Property verification in the design of telecom applications. ASP-DAC 1997: 167-172 - 1995
- [c6]Massimo Bombana, Patrizia Cavalloro, Salvatore Conigliaro, Roger B. Hughes, Gerry Musgrave, Giuseppe Zaza:
Design-Flow and Synthesis for ASICs: A Case Study. DAC 1995: 292-297 - 1994
- [j2]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza:
ALADIN: a multilevel testability analyzer for VLSI system design. IEEE Trans. Very Large Scale Integr. Syst. 2(2): 157-171 (1994) - [c5]G. Bezzi, Massimo Bombana, Patrizia Cavalloro, Salvatore Conigliaro, Giuseppe Zaza:
Quantitative Evaluation of Formal Based Synthesis in ASIC Design. TPCD 1994: 286-291 - 1993
- [j1]Cristiana Bolchini, Massimo Bombana, Patrizia Cavalloro, Claudio Costi, Franco Fummi, Giuseppe Zaza:
A design methodology for the correct specification of VLSI systems. Microprocess. Microprogramming 38(1-5): 563-570 (1993) - [c4]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza:
Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks. DFT 1993: 223-230 - [c3]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza:
An Expert Solution to Functional Testability Analysis of VLSI Circuits. SEKE 1993: 263-265 - 1992
- [c2]Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Donatella Sciuto, Giuseppe Zaza:
A multi level testability assistant for VLSI design. EURO-DAC 1992: 258-263 - [c1]Massimo Bombana, Patrizia Cavalloro, Giuseppe Zaza:
Specification and Formal Synthesis of Digital Circuits. TPHOLs 1992: 475-484
Coauthor Index
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