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Nan Liao
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- affiliation: Peking University, Beijing, China
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2010 – 2019
- 2018
- [j9]Tian Wang, Xiaoxin Cui, Kai Liao, Nan Liao, Dunshan Yu, Xiaole Cui:
Design of Low-Power High-Performance FinFET Standard Cells. Circuits Syst. Signal Process. 37(5): 1789-1806 (2018) - 2017
- [j8]Nan Liao, Xiaoxin Cui, Kai Liao, Tian Wang, Dunshan Yu, Xiaole Cui:
Improving DFA attacks on AES with unknown and random faults. Sci. China Inf. Sci. 60(4): 42401 (2017) - [j7]Kai Liao, Xiaoxin Cui, Nan Liao, Tian Wang, Dunshan Yu, Xiaole Cui:
High-Performance Noninvasive Side-Channel Attack Resistant ECC Coprocessor for GF(2m ). IEEE Trans. Ind. Electron. 64(1): 727-738 (2017) - 2016
- [j6]Kai Liao, Xiaoxin Cui, Nan Liao, Tian Wang, Dunshan Yu, Xiaole Cui:
Ultralow-power high-speed flip-flop based on multimode FinFETs. Sci. China Inf. Sci. 59(4): 042404:1-042404:11 (2016) - [j5]Tian Wang, Xiaoxin Cui, Kai Liao, Nan Liao, Xiaole Cui, Dunshan Yu:
Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology. IEICE Trans. Electron. 99-C(8): 974-983 (2016) - 2015
- [j4]Kaisheng Ma, Xiaoxin Cui, Kai Liao, Nan Liao, Di Wu, Dunshan Yu:
Key characterization factors of accurate power modeling for FinFET circuits. Sci. China Inf. Sci. 58(2): 1-13 (2015) - [c4]Nan Liao, Xiaoxin Cui, Tian Wang, Kai Liao, Yewen Ni, Dunshan Yu, Xiaole Cui:
A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications. ASICON 2015: 1-4 - [c3]Tian Wang, Xiaoxin Cui, Kai Liao, Nan Liao, Yewen Ni, Dunshan Yu, Xiaole Cui:
Employing the mixed FBB/RBB in the design of FinFET logic gates. ASICON 2015: 1-4 - 2014
- [j3]Nan Liao, Xiaoxin Cui, Kai Liao, Kaisheng Ma, Di Wu, Wei Wei, Rui Li, Dunshan Yu:
Low power adiabatic logic based on FinFETs. Sci. China Inf. Sci. 57(2): 1-13 (2014) - [j2]Kai Liao, Xiaoxin Cui, Nan Liao, Kaisheng Ma, Di Wu, Wei Wei, Rui Li, Dunshan Yu:
Ultra-low power dissipation of improved complementary pass-transistor adiabatic logic circuits based on FinFETs. Sci. China Inf. Sci. 57(4): 1-13 (2014) - [c2]Kai Liao, Xiaoxin Cui, Nan Liao, Tian Wang, Xiao Zhang, Ying Huang, Dunshan Yu:
High-speed constant-time division module for Elliptic Curve Cryptography based on GF(2m). ISCAS 2014: 818-821 - 2013
- [j1]Kai Liao, Xiaoxin Cui, Nan Liao, Kaisheng Ma:
Leakage Power Reduction of Adiabatic Circuits Based on FinFET Devices. IEICE Trans. Electron. 96-C(8): 1068-1075 (2013) - [c1]Xiaoxin Cui, Kaisheng Ma, Kai Liao, Nan Liao, Di Wu, Wei Wei, Rui Li, Dunshan Yu:
A Dynamic-Adjusting Threshold-Voltage Scheme for FinFETs low power designs. ISCAS 2013: 129-132
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