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2020 – today
- 2024
[c7]Evan Sultanik
, Marek Surovic, Henrik Brodin, Kelly Kaoudis, Facundo Tuesca, Carson Harmon, Lisa Overall, Joseph Sweeney, Bradford Larsen:
PolyTracker: Whole-Input Dynamic Information Flow Tracing. ISSTA 2024: 1841-1845- [c6]Joseph Sweeney, Deepali Garg, Lawrence T. Pileggi:
Quantifying the Efficacy of Logic Locking Methods. VLSID 2024: 541-546 - 2021
- [b1]Joseph Sweeney:
Obfuscation and Security for Digital Integrated Circuits. Carnegie Mellon University, USA, 2021 - [j3]Samuel Pagliarini, Joseph Sweeney, Ken Mai, R. D. Shawn Blanton, Larry T. Pileggi, Subhasish Mitra:
Split-Chip Design to Prevent IP Reverse Engineering. IEEE Des. Test 38(4): 109-118 (2021) - [c5]Prashanth Mohan, Oguz Atli, Joseph Sweeney, Onur O. Kibar, Larry T. Pileggi, Ken Mai:
Hardware Redaction via Designer-Directed Fine-Grained eFPGA Insertion. DATE 2021: 1186-1191 - [i5]Joseph Sweeney, Deepali Garg, Lawrence T. Pileggi:
Quantifying the Efficacy of Logic Locking Methods. CoRR abs/2103.06990 (2021) - [i4]Daniel P. Martins, Michael Taynnan Barros, Benjamin O'Sullivan, Ian Seymour, Alan O'Riordan, Lee Coffey, Joseph Sweeney, Sasitharan Balasubramaniam:
Microfluidic-based Bacterial Molecular Computing on a Chip. CoRR abs/2104.07341 (2021) - 2020
- [j2]Joseph Sweeney, Ruben Purdy, Ronald D. Blanton, Lawrence T. Pileggi:
CircuitGraph: A Python package for Boolean circuits. J. Open Source Softw. 5(55): 2646 (2020) - [j1]Benjamin W. Rathwell, Douglas L. Van Bossuyt, Anthony G. Pollman, Joseph Sweeney:
A Method to Account for Personnel Risk Attitudes in System Design and Maintenance Activity Development. Syst. 8(3): 26 (2020) - [c4]Joseph Sweeney, V. Mohammed Zackriya, Samuel Pagliarini, Lawrence T. Pileggi:
Latch-Based Logic Locking. HOST 2020: 132-141 - [c3]Joseph Sweeney, Marijn J. H. Heule, Lawrence T. Pileggi:
Modeling Techniques for Logic Locking. ICCAD 2020: 80:1-80:9 - [c2]Joseph Sweeney, Marijn Heule, Lawrence T. Pileggi:
Sensitivity Analysis of Locked Circuits. LPAR 2020: 483-497 - [i3]Joseph Sweeney, Samuel Pagliarini, Lawrence T. Pileggi:
Securing Digital Systems via Split-Chip Obfuscation. CoRR abs/2005.10083 (2020) - [i2]Joseph Sweeney, Mohammed Zackriya V, Samuel Pagliarini, Lawrence T. Pileggi:
Latch-Based Logic Locking. CoRR abs/2005.10649 (2020) - [i1]Joseph Sweeney, Marijn J. H. Heule, Lawrence T. Pileggi:
Modeling Techniques for Logic Locking. CoRR abs/2009.10131 (2020)
2010 – 2019
- 2017
- [c1]Sudipta Bhuin, Joseph Sweeney, Samuel Pagliarini, Ayan Kumar Biswas, Lawrence T. Pileggi:
A self-calibrating sense amplifier for a true random number generator using hybrid FinFET-straintronic MTJ. NANOARCH 2017: 147-152
Coauthor Index
aka: Larry T. Pileggi
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