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Karthikeyan Sankaralingam
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- affiliation: University of Wisconsin, USA
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2020 – today
- 2024
- [j28]Karu Sankaralingam:
A Whimsical Odyssey Through the Maze of Scholarly Reviews. Commun. ACM 67(11): 6-7 (2024) - [c57]Michael Davies, Ian McDougall, Selvaraj Anandaraj, Deep Machchhar, Rithik Jain, Karthikeyan Sankaralingam:
A Journey of a 1, 000 Kernels Begins with a Single Step: A Retrospective of Deep Learning on GPUs. ASPLOS (2) 2024: 20-36 - [c56]Neal Clayton Crago, Sana Damani, Karthikeyan Sankaralingam, Stephen W. Keckler:
WASP: Exploiting GPU Pipeline Parallelism with Hardware-Accelerated Automatic Warp Specialization. HPCA 2024: 1-16 - [c55]Zhanpeng Zeng, Karthikeyan Sankaralingam, Vikas Singh:
IM-Unpack: Training and Inference with Arbitrarily Low Precision Integers. ICML 2024 - [i7]Zhanpeng Zeng, Michael Davies, Pranav Pulijala, Karthikeyan Sankaralingam, Vikas Singh:
LookupFFN: Making Transformers Compute-lite for CPU inference. CoRR abs/2403.07221 (2024) - [i6]Zhanpeng Zeng, Karthikeyan Sankaralingam, Vikas Singh:
IM-Unpack: Training and Inference with Arbitrarily Low Precision Integers. CoRR abs/2403.07339 (2024) - 2023
- [c54]Zhanpeng Zeng, Michael Davies, Pranav Pulijala, Karthikeyan Sankaralingam, Vikas Singh:
LookupFFN: Making Transformers Compute-lite for CPU inference. ICML 2023: 40707-40718 - [i5]Ian McDougall, Shayne Wadle, Harish Batchu, Michael Davies, Karthikeyan Sankaralingam:
BRYT: Data Rich Analytics Based Computer Architecture for A New Paradigm of Chip Design to Supplant Moore's Law. CoRR abs/2312.13428 (2023) - 2022
- [c53]Karthikeyan Sankaralingam, Tony Nowatzki, Vinay Gangadhar, Preyas Shah, Michael Davies, William Galliher, Ziliang Guo, Jitu Khare, Deepak Vijay, Poly Palamuttam, Maghawan Punde, Alex Tan, Vijay Thiruvengadam, Rongyi Wang, Shunmiao Xu:
The Mozart reuse exposed dataflow processor for AI and beyond: industrial product. ISCA 2022: 978-992 - 2021
- [c52]Karu Sankaralingam, Tony Nowatzki, Greg Wright, Poly Palamuttam, Jitu Khare, Vinay Gangadhar, Preyas Shah:
Mozart: Designing for Software Maturity and the Next Paradigm for Chip Architectures. HCS 2021: 1-20 - [i4]Michael Davies, Adam Labiosa, Karthikeyan Sankaralingam:
Understanding the Limits of Conventional Hardware Architectures for Deep-Learning. CoRR abs/2112.02204 (2021)
2010 – 2019
- 2019
- [j27]Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam:
Heterogeneous Von Neumann/dataflow microprocessors. Commun. ACM 62(6): 83-91 (2019) - [j26]Yuxi Chen, Shu Wang, Shan Lu, Karthikeyan Sankaralingam:
Applying Transactional Memory for Concurrency-Bug Failure Recovery in Production Runs. IEEE Trans. Parallel Distributed Syst. 30(5): 990-1006 (2019) - [i3]Newsha Ardalani, Urmish Thakker, Aws Albarghouthi, Karu Sankaralingam:
A Static Analysis-based Cross-Architecture Performance Prediction Using Machine Learning. CoRR abs/1906.07840 (2019) - 2018
- [j25]Thiruvengadam Vijayaraghavan, Amit Rajesh, Karthikeyan Sankaralingam:
MPU-BWM: Accelerating Sequence Alignment. IEEE Comput. Archit. Lett. 17(2): 179-182 (2018) - [c51]Tony Nowatzki, Newsha Ardalani, Karthikeyan Sankaralingam, Jian Weng:
Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign. PACT 2018: 36:1-36:15 - [c50]Yuxi Chen, Shu Wang, Shan Lu, Karthikeyan Sankaralingam:
Applying Hardware Transactional Memory for Concurrency-Bug Failure Recovery in Production Runs. USENIX ATC 2018: 837-850 - 2017
- [j24]Gagan Gupta, Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam:
Kickstarting Semiconductor Innovation with Open Source Hardware. Computer 50(6): 50-59 (2017) - [j23]Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam, Greg Wright:
Domain Specialization Is Generally Unnecessary for Accelerators. IEEE Micro 37(3): 40-50 (2017) - [c49]Tony Nowatzki, Vinay Gangadhar, Newsha Ardalani, Karthikeyan Sankaralingam:
Stream-Dataflow Acceleration. ISCA 2017: 416-429 - [i2]Luis Ceze, Mark D. Hill, Karthikeyan Sankaralingam, Thomas F. Wenisch:
Democratizing Design for Future Computing Platforms. CoRR abs/1706.08597 (2017) - 2016
- [j22]Babak Falsafi, Mircea Stan, Kevin Skadron, Nuwan Jayasena, Yunji Chen, Jinhua Tao, Ravi Nair, Jaime H. Moreno, Naveen Muralimanohar, Karthikeyan Sankaralingam, Cristian Estan:
Near-Memory Data Services. IEEE Micro 36(1): 6-13 (2016) - [j21]Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam:
A Heterogeneous Von Neumann/Explicit Dataflow Processor. IEEE Micro 36(3): 20-30 (2016) - [j20]Chen-Han Ho, Sung Jin Kim, Karthikeyan Sankaralingam:
Accelerating the Accelerator Memory Interface with Access-Execute and Dataflow. IEEE Micro 36(3): 31-41 (2016) - [c48]Tony Nowatzki, Karthikeyan Sankaralingam:
Analyzing Behavior Specialized Acceleration. ASPLOS 2016: 697-711 - [c47]Tony Nowatzki, Karthikeyan Sankaralingam:
Modularizing the microprocessor core to outperform traditional out-of-order. Hot Chips Symposium 2016: 1-4 - [c46]Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam, Greg Wright:
Pushing the limits of accelerator efficiency while retaining programmability. HPCA 2016: 27-39 - [i1]Gagan Gupta, Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam:
Open-source Hardware: Opportunities and Challenges. CoRR abs/1606.01980 (2016) - 2015
- [j19]Tony Nowatzki, Venkatraman Govindaraju, Karthikeyan Sankaralingam:
A Graph-Based Program Representation for Analyzing Hardware Specialization Approaches. IEEE Comput. Archit. Lett. 14(2): 94-98 (2015) - [j18]Dongdong Deng, Guoliang Jin, Marc de Kruijf, Ang Li, Ben Liblit, Shan Lu, Shanxiang Qi, Jinglei Ren, Karthikeyan Sankaralingam, Linhai Song, Yongwei Wu, Mingxing Zhang, Wei Zhang, Weimin Zheng:
Fixing, preventing, and recovering from concurrency bugs. Sci. China Inf. Sci. 58(5): 1-18 (2015) - [j17]Tony Nowatzki, Jaikrishnan Menon, Chen-Han Ho, Karthikeyan Sankaralingam:
Architectural Simulators Considered Harmful. IEEE Micro 35(6): 4-12 (2015) - [j16]Amir Yazdanbakhsh, Raghuraman Balasubramanian, Tony Nowatzki, Karthikeyan Sankaralingam:
Comprehensive Circuit Failure Prediction for Logic and SRAM Using Virtual Aging. IEEE Micro 35(6): 24-36 (2015) - [j15]Raghuraman Balasubramanian, Vinay Gangadhar, Ziliang Guo, Chen-Han Ho, Cherin Joseph, Jaikrishnan Menon, Mario Paulo Drumond, Robin Paul, Sharath Prasad, Pradip Valathol, Karthikeyan Sankaralingam:
Enabling GPGPU Low-Level Hardware Explorations with MIAOW: An Open-Source RTL Implementation of a GPGPU. ACM Trans. Archit. Code Optim. 12(2): 21:21:1-21:21:25 (2015) - [j14]Emily R. Blem, Jaikrishnan Menon, Thiruvengadam Vijayaraghavan, Karthikeyan Sankaralingam:
ISA Wars: Understanding the Relevance of ISA being RISC or CISC to Performance, Power, and Energy on Modern Architectures. ACM Trans. Comput. Syst. 33(1): 3:1-3:34 (2015) - [c45]Raghuraman Balasubramanian, Vinay Gangadhar, Ziliang Guo, Chen-Han Ho, Cherin Joseph, Jaikrishnan Menon, Mario Paulo Drumond, Robin Paul, Sharath Prasad, Pradip Valathol, Karthikeyan Sankaralingam:
MIAOW - An open source RTL implementation of a GPGPU. COOL Chips 2015: 1-3 - [c44]Vinay Gangadhar, Raghuraman Balasubramanian, Mario Drumond, Ziliang Guo, Jai Menon, Cherin Joseph, Robin Prakash, Sharath Prasad, Pradip Vallathol, Karu Sankaralingam:
MIAOW: An open source GPGPU. Hot Chips Symposium 2015: 1-43 - [c43]Chen-Han Ho, Sung Jin Kim, Karthikeyan Sankaralingam:
Efficient execution of memory access phases using dataflow specialization. ISCA 2015: 118-130 - [c42]Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam:
Exploring the potential of heterogeneous von neumann/dataflow execution models. ISCA 2015: 298-310 - [c41]Chen-Han Ho, Venkatraman Govindaraju, Tony Nowatzki, Ranjini Nagaraju, Zachary Marzec, Preeti Agarwal, Chris Frericks, Ryan Cofell, Karthikeyan Sankaralingam:
Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation. ISPASS 2015: 203-214 - [c40]Newsha Ardalani, Clint Lestourgeon, Karthikeyan Sankaralingam, Xiaojin Zhu:
Cross-architecture performance prediction (XAPP) using CPU code to predict GPU performance. MICRO 2015: 725-737 - 2014
- [j13]Tony Nowatzki, Michael Sartin-Tarm, Lorenzo De Carli, Karthikeyan Sankaralingam, Cristian Estan, Behnam Robatmili:
A Scheduling Framework for Spatial Architectures Across Multiple Constraint-Solving Theories. ACM Trans. Program. Lang. Syst. 37(1): 2:1-2:30 (2014) - [c39]Jaikrishnan Menon, Lorenzo De Carli, Vijayraghavan Thiruvengadam, Karthikeyan Sankaralingam, Cristian Estan:
Memory processing units. Hot Chips Symposium 2014: 1 - [c38]Raghuraman Balasubramanian, Karthikeyan Sankaralingam:
Understanding the impact of gate-level physical reliability effects on whole program execution. HPCA 2014: 60-71 - [c37]Raghuraman Balasubramanian, Zachary York, Matthew Doran, Aritra Biswas, Timur Girgin, Karthikeyan Sankaralingam:
Hands-on introduction to computer science at the freshman level. SIGCSE 2014: 235-240 - 2013
- [b1]Tony Nowatzki, Michael C. Ferris, Karu Sankaralingam, Cristian Estan, Nilay Vaish, David A. Wood:
Optimization and Mathematical Modeling in Computer Architecture. Synthesis Lectures on Computer Architecture, Morgan & Claypool Publishers 2013, ISBN 9781627052092, pp. 1-144 - [j12]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Power challenges may end the multicore era. Commun. ACM 56(2): 93-102 (2013) - [j11]Emily R. Blem, Hadi Esmaeilzadeh, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Multicore Model from Abstract Single Core Inputs. IEEE Comput. Archit. Lett. 12(2): 59-62 (2013) - [j10]Michael Sartin-Tarm, Tony Nowatzki, Lorenzo De Carli, Karthikeyan Sankaralingam, Cristian Estan:
Constraint centric scheduling guide. SIGARCH Comput. Archit. News 41(2): 17-21 (2013) - [c36]Venkatraman Govindaraju, Tony Nowatzki, Karthikeyan Sankaralingam:
Breaking SIMD shackles with an exposed flexible microarchitecture and the access execute PDG. PACT 2013: 341-351 - [c35]Sung Jin Kim, Lorenzo De Carli, Karthikeyan Sankaralingam, Cristian Estan:
SWSL: SoftWare Synthesis for network Lookup. ANCS 2013: 191-201 - [c34]Wei Zhang, Marc de Kruijf, Ang Li, Shan Lu, Karthikeyan Sankaralingam:
ConAir: featherweight concurrency bug recovery via single-threaded idempotent execution. ASPLOS 2013: 113-126 - [c33]Karthikeyan Sankaralingam:
Dynamic hardware specialization-using moore's bounty without burning the chip down. CASES 2013: 17:1 - [c32]Marc de Kruijf, Karthikeyan Sankaralingam:
Idempotent code generation: Implementation, analysis, and evaluation. CGO 2013: 27:1-27:12 - [c31]Emily R. Blem, Jaikrishnan Menon, Karthikeyan Sankaralingam:
Power struggles: Revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures. HPCA 2013: 1-12 - [c30]Raghuraman Balasubramanian, Karthikeyan Sankaralingam:
Virtually-aged sampling DMR: unifying circuit failure prediction and circuit failure detection. MICRO 2013: 123-135 - [c29]Tony Nowatzki, Michael Sartin-Tarm, Lorenzo De Carli, Karthikeyan Sankaralingam, Cristian Estan, Behnam Robatmili:
A general constraint-centric scheduling framework for spatial architectures. PLDI 2013: 495-506 - 2012
- [j9]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Dark Silicon and the End of Multicore Scaling. IEEE Micro 32(3): 122-134 (2012) - [j8]Venkatraman Govindaraju, Chen-Han Ho, Tony Nowatzki, Jatin Chhugani, Nadathur Satish, Karthikeyan Sankaralingam, Changkyu Kim:
DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing. IEEE Micro 32(5): 38-51 (2012) - [j7]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Power Limitations and Dark Silicon Challenge the Future of Multicore. ACM Trans. Comput. Syst. 30(3): 11:1-11:27 (2012) - [c28]Eric N. Harris, Samuel L. Wasmundt, Lorenzo De Carli, Karthikeyan Sankaralingam, Cristian Estan:
LEAP: latency- energy- and area-optimized lookup pipeline. ANCS 2012: 175-186 - [c27]Jesse Benson, Ryan Cofell, Chris Frericks, Venkatraman Govindaraju, Chen-Han Ho, Zachary Marzec, Tony Nowatzki, Karu Sankaralingam:
Prototyping the DySER specialization architecture with OpenSPARC. Hot Chips Symposium 2012: 1-3 - [c26]Jesse Benson, Ryan Cofell, Chris Frericks, Chen-Han Ho, Venkatraman Govindaraju, Tony Nowatzki, Karthikeyan Sankaralingam:
Design, integration and implementation of the DySER hardware accelerator into OpenSPARC. HPCA 2012: 115-126 - [c25]Chen-Han Ho, Marc de Kruijf, Karthikeyan Sankaralingam, Barry Rountree, Martin Schulz, Bronis R. de Supinski:
Mechanisms and Evaluation of Cross-Layer Fault-Tolerance for Supercomputing. ICPP 2012: 510-519 - [c24]Jaikrishnan Menon, Marc de Kruijf, Karthikeyan Sankaralingam:
iGPU: Exception support and speculative execution on GPUs. ISCA 2012: 72-83 - [c23]Marc de Kruijf, Karthikeyan Sankaralingam, Somesh Jha:
Static analysis and compiler design for idempotent processing. PLDI 2012: 475-486 - 2011
- [j6]Chen-Han Ho, Garret Staus, Aaron Ullmer, Karu Sankaralingam:
Exploring the Interaction Between Device Lifetime Reliability and Security Vulnerabilities. IEEE Comput. Archit. Lett. 10(2): 37-40 (2011) - [c22]Nilay Vaish, Thawan Kooburat, Lorenzo De Carli, Karthikeyan Sankaralingam, Cristian Estan:
Experiences in Co-designing a Packet Classification Algorithm and a Flexible Hardware Platform. ANCS 2011: 189-199 - [c21]Venkatraman Govindaraju, Chen-Han Ho, Karthikeyan Sankaralingam:
Dynamically Specialized Datapaths for energy efficient computing. HPCA 2011: 503-514 - [c20]Shuou Nomura, Matthew D. Sinclair, Chen-Han Ho, Venkatraman Govindaraju, Marc de Kruijf, Karthikeyan Sankaralingam:
Sampling + DMR: practical and low-overhead permanent fault detection. ISCA 2011: 201-212 - [c19]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Dark silicon and the end of multicore scaling. ISCA 2011: 365-376 - [c18]Marc de Kruijf, Karthikeyan Sankaralingam:
Idempotent processor architecture. MICRO 2011: 140-151 - 2010
- [c17]Amit Kumar, Lorenzo De Carli, Sung Jin Kim, Marc de Kruijf, Karthikeyan Sankaralingam, Cristian Estan, Somesh Jha:
Design and implementation of the PLUG architecture for programmable and efficient network lookups. PACT 2010: 331-342 - [c16]Marc de Kruijf, Shuou Nomura, Karthikeyan Sankaralingam:
A unified model for timing speculation: Evaluating the impact of technology scaling, CMOS design style, and fault recovery mechanism. DSN 2010: 487-496 - [c15]Marc de Kruijf, Shuou Nomura, Karthikeyan Sankaralingam:
Relax: an architectural framework for software recovery of hardware faults. ISCA 2010: 497-508 - [c14]Shuou Nomura, Karthikeyan Sankaralingam, Ranganathan Sankaralingam:
A fast and highly accurate path delay emulation framework for logic-emulation of timing speculation. ITC 2010: 635-644
2000 – 2009
- 2009
- [j5]Marc de Kruijf, Karthikeyan Sankaralingam:
MapReduce for the Cell Broadband Engine Architecture. IBM J. Res. Dev. 53(5): 10 (2009) - [c13]Randy Smith, Neelam Goyal, Justin Ormont, Karthikeyan Sankaralingam, Cristian Estan:
Evaluating GPUs for network packet signature matching. ISPASS 2009: 175-184 - [c12]Lorenzo De Carli, Yi Pan, Amit Kumar, Cristian Estan, Karthikeyan Sankaralingam:
PLUG: flexible lookup modules for rapid deployment of new protocols in high-speed routers. SIGCOMM 2009: 207-218 - 2008
- [c11]Venkatraman Govindaraju, Peter Djeu, Karthikeyan Sankaralingam, Mary K. Vernon, William R. Mark:
Toward a multicore architecture for real-time ray-tracing. MICRO 2008: 176-187 - 2007
- [j4]Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger:
On-Chip Interconnection Networks of the TRIPS Chip. IEEE Micro 27(5): 41-50 (2007) - [c10]Daniel Sánchez, Luke Yen, Mark D. Hill, Karthikeyan Sankaralingam:
Implementing Signatures for Transactional Memory. MICRO 2007: 123-133 - [c9]Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger:
Implementation and Evaluation of a Dynamically Routed Processor Operand Network. NOCS 2007: 7-17 - 2006
- [c8]Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert G. McDonald, Doug Burger, Stephen W. Keckler, Kathryn S. McKinley:
Dataflow Predication. MICRO 2006: 89-102 - [c7]Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger:
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO 2006: 480-491 - 2004
- [j3]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore:
TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. ACM Trans. Archit. Code Optim. 1(1): 62-93 (2004) - [c6]James C. Browne, Madhulika Yalamanchi, Kevin Kane, Karthikeyan Sankaralingam:
General parallel computations on desktop grid and P2P systems. LCR 2004: 6:1-6:8 - 2003
- [j2]Karthikeyan Sankaralingam, Madhulika Yalamanchi, Simha Sethumadhavan, James C. Browne:
Pagerank Computation and Keyword Search on Distributed Systems and P2P Networks. J. Grid Comput. 1(3): 291-307 (2003) - [j1]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore:
Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. IEEE Micro 23(6): 46-51 (2003) - [c5]Karthikeyan Sankaralingam, Simha Sethumadhavan, James C. Browne:
Distributed Pagerank for P2P Systems. HPDC 2003: 58-69 - [c4]Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger:
Routed Inter-ALU Networks for ILP Scalability and Performance. ICCD 2003: 170- - [c3]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore:
Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. ISCA 2003: 422-433 - [c2]Karthikeyan Sankaralingam, Stephen W. Keckler, William R. Mark, Doug Burger:
Universal Mechanisms for Data-Parallel Architectures. MICRO 2003: 303-314 - 2001
- [c1]Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, Stephen W. Keckler:
A design space evaluation of grid processor architectures. MICRO 2001: 40-51
Coauthor Index
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