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ORCIDDoug Burger
Douglas Christopher Burger
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- affiliation: University of Texas at Austin, USA
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2020 – today
- 2024
[j44]Blake Pelton
, Adam Sapek, Ken Eguro, Daniel Lo, Alessandro Forin, Matt Humphrey, Jinwen Xi, David Cox, Rajas Karandikar, Johannes de Fine Licht, Evgeny Babin, Adrian M. Caulfield, Doug Burger:
Wavefront Threading Enables Effective High-Level Synthesis. Proc. ACM Program. Lang. 8(PLDI): 1066-1090 (2024)- [i4]Blake Pelton, Adam Sapek, Ken Eguro, Daniel Lo, Alessandro Forin, Matt Humphrey, Jinwen Xi, David Cox, Rajas Karandikar, Johannes de Fine Licht, Evgeny Babin, Adrian M. Caulfield, Doug Burger:
Wavefront Threading Enables Effective High-Level Synthesis. CoRR abs/2405.19514 (2024) - 2023
- [c85]Bita Darvish Rouhani, Ritchie Zhao, Venmugil Elango, Rasoul Shafipour, Mathew Hall, Maral Mesmakhosroshahi, Ankit More, Levi Melnick, Maximilian Golub, Girish Varatkar, Lai Shao, Gaurav Kolhe, Dimitry Melts, Jasmine Klar, Renee L'Heureux, Matt Perry, Doug Burger, Eric S. Chung, Zhaoxia (Summer) Deng, Sam Naghshineh, Jongsoo Park, Maxim Naumov:
With Shared Microexponents, A Little Shifting Goes a Long Way. ISCA 2023: 83:1-83:13 - [i3]Bita Rouhani, Ritchie Zhao, Venmugil Elango, Rasoul Shafipour, Mathew Hall, Maral Mesmakhosroshahi, Ankit More, Levi Melnick, Maximilian Golub, Girish Varatkar, Lei Shao, Gaurav Kolhe, Dimitry Melts, Jasmine Klar, Renee L'Heureux, Matt Perry, Doug Burger, Eric S. Chung, Zhaoxia Deng, Sam Naghshineh, Jongsoo Park, Maxim Naumov:
Shared Microexponents: A Little Shifting Goes a Long Way. CoRR abs/2302.08007 (2023) - [i2]Bita Darvish Rouhani, Ritchie Zhao, Ankit More, Mathew Hall, Alireza Khodamoradi, Summer Deng, Dhruv Choudhary, Marius Cornea, Eric Dellinger, Kristof Denolf, Dusan Stosic, Venmugil Elango, Maximilian Golub, Alexander Heinecke, Phil James-Roxby, Dharmesh Jani, Gaurav Kolhe, Martin Langhammer, Ada Li, Levi Melnick, Maral Mesmakhosroshahi, Andres Rodriguez, Michael Schulte, Rasoul Shafipour, Lei Shao, Michael Y. Siu, Pradeep Dubey, Paulius Micikevicius, Maxim Naumov, Colin Verilli, Ralph Wittig, Doug Burger, Eric S. Chung:
Microscaling Data Formats for Deep Learning. CoRR abs/2310.10537 (2023) - 2020
- [c84]Soroush Ghodrati, Hardik Sharma, Sean Kinzer, Amir Yazdanbakhsh, Jongse Park, Nam Sung Kim, Doug Burger, Hadi Esmaeilzadeh:
Mixed-Signal Charge-Domain Acceleration of Deep Neural Networks through Interleaved Bit-Partitioned Arithmetic. PACT 2020: 399-411 - [c83]Bita Darvish Rouhani, Daniel Lo, Ritchie Zhao, Ming Liu, Jeremy Fowers, Kalin Ovtcharov, Anna Vinogradsky, Sarah Massengill, Lita Yang, Ray Bittner, Alessandro Forin, Haishan Zhu, Taesik Na, Prerak Patel, Shuai Che, Lok Chand Koppaka, Xia Song, Subhojit Som, Kaustav Das, Saurabh Tiwary, Steven K. Reinhardt, Sitaram Lanka, Eric S. Chung, Doug Burger:
Pushing the Limits of Narrow Precision Inferencing at Cloud Scale with Microsoft Floating Point. NeurIPS 2020
2010 – 2019
- 2019
- [j43]Jeremy Fowers, Kalin Ovtcharov, Michael K. Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger:
Inside Project Brainwave's Cloud-Scale, Real-Time AI Processor. IEEE Micro 39(3): 20-28 (2019) - [i1]Soroush Ghodrati, Hardik Sharma, Sean Kinzer, Amir Yazdanbakhsh, Kambiz Samadi, Nam Sung Kim, Doug Burger, Hadi Esmaeilzadeh:
Mixed-Signal Charge-Domain Acceleration of Deep Neural networks through Interleaved Bit-Partitioned Arithmetic. CoRR abs/1906.11915 (2019) - 2018
- [j42]Eric S. Chung, Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Adrian M. Caulfield, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Maleen Abeydeera, Logan Adams, Hari Angepat, Christian Boehn, Derek Chiou, Oren Firestein, Alessandro Forin, Kang Su Gatlin, Mahdi Ghandi, Stephen Heil, Kyle Holohan, Ahmad El Husseini, Tamás Juhász, Kara Kagi, Ratna Kovvuri, Sitaram Lanka, Friedel van Megen, Dima Mukhortov, Prerak Patel, Brandon Perez, Amanda Rapsang, Steven K. Reinhardt, Bita Rouhani, Adam Sapek, Raja Seera, Sangeetha Shekar, Balaji Sridharan, Gabriel Weisz, Lisa Woods, Phillip Yi Xiao, Dan Zhang, Ritchie Zhao, Doug Burger:
Serving DNNs in Real Time at Datacenter Scale with Project Brainwave. IEEE Micro 38(2): 8-20 (2018) - [c82]Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger:
A Configurable Cloud-Scale DNN Processor for Real-Time AI. ISCA 2018: 1-14 - [c81]Daniel Firestone, Andrew Putnam, Sambrama Mundkur, Derek Chiou, Alireza Dabagh, Mike Andrewartha, Hari Angepat, Vivek Bhanu, Adrian M. Caulfield, Eric S. Chung, Harish Kumar Chandrappa, Somesh Chaturmohta, Matt Humphrey, Jack Lavier, Norman Lam, Fengfen Liu, Kalin Ovtcharov, Jitu Padhye, Gautham Popuri, Shachar Raindel, Tejas Sapre, Mark Shaw, Gabriel Silva, Madhan Sivakumar, Nisheeth Srivastava, Anshuman Verma, Qasim Zuhair, Deepak Bansal, Doug Burger, Kushagra Vaid, David A. Maltz, Albert G. Greenberg:
Azure Accelerated Networking: SmartNICs in the Public Cloud. NSDI 2018: 51-66 - 2017
- [j41]Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Daniel Firestone, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger:
Configurable Clouds. IEEE Micro 37(3): 52-61 (2017) - 2016
- [j40]Andrew Putnam, Adrian M. Caulfield, Eric S. Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Gopi Prashanth Gopal, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, James R. Larus, Eric Peterson, Simon Pope, Aaron Smith, Jason Thong, Phillip Yi Xiao, Doug Burger:
A reconfigurable fabric for accelerating large-scale datacenter services. Commun. ACM 59(11): 114-122 (2016) - [c80]Shlomi Alkalay, Hari Angepat, Adrian M. Caulfield, Eric S. Chung, Oren Firestein, Michael Haselman, Stephen Heil, Kyle Holohan, Matt Humphrey, Tamás Juhász, Puneet Kaur, Sitaram Lanka, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Andrew Putnam, Raja Seera, Rimon Tadros, Jason Thong, Lisa Woods, Derek Chiou, Doug Burger:
Agile Co-Design for a Reconfigurable Datacenter. FPGA 2016: 15 - [c79]Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger:
A cloud-scale acceleration architecture. MICRO 2016: 7:1-7:13 - 2015
- [j39]Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug Burger:
Neural acceleration for general-purpose approximate programs. Commun. ACM 58(1): 105-115 (2015) - [j38]Andrew Putnam, Adrian M. Caulfield, Eric S. Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Gopi Prashanth Gopal, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, James R. Larus, Eric Peterson, Simon Pope, Aaron Smith, Jason Thong, Phillip Yi Xiao, Doug Burger:
A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services. IEEE Micro 35(3): 10-22 (2015) - [c78]Jeremy Fowers, Joo-Young Kim, Doug Burger, Scott Hauck:
A Scalable High-Bandwidth Architecture for Lossless Compression on FPGAs. FCCM 2015: 52-59 - [c77]Dong Li, Minsoo Rhu, Daniel R. Johnson, Mike O'Connor, Mattan Erez, Doug Burger, Donald S. Fussell, Stephen W. Redder:
Priority-based cache allocation in throughput processors. HPCA 2015: 89-100 - [c76]Gennady Pekhimenko, Dimitrios Lymberopoulos, Oriana Riva, Karin Strauss, Doug Burger:
PocketTrend: Timely Identification and Delivery of Trending Search Content to Mobile Users. WWW 2015: 842-852 - 2014
- [j37]Karin Strauss, Doug Burger:
What the Future Holds for Solid-State Memory. Computer 47(1): 24-31 (2014) - [j36]Madhu Saravana Sibi Govindan, Behnam Robatmili, Dong Li, Bertrand A. Maher, Aaron Smith, Stephen W. Keckler, Doug Burger:
Scaling Power and Performance viaProcessor Composability. IEEE Trans. Computers 63(8): 2025-2038 (2014) - [c75]Milovan Duric, Oscar Palomar, Aaron Smith, Osman S. Unsal, Adrián Cristal, Mateo Valero, Doug Burger:
EVX: Vector execution on low power EDGE cores. DATE 2014: 1-4 - [c74]Joo-Young Kim, Scott Hauck, Doug Burger:
A Scalable Multi-engine Xpress9 Compressor with Asynchronous Data Transfer. FCCM 2014: 161-164 - [c73]Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler:
Author retrospective for a NUCA substrate for flexible CMP cache sharing. ICS 25th Anniversary 2014: 74-76 - [c72]Andrew Putnam, Adrian M. Caulfield, Eric S. Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Gopi Prashanth Gopal, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, James R. Larus, Eric Peterson, Simon Pope, Aaron Smith, Jason Thong, Phillip Yi Xiao, Doug Burger:
A reconfigurable fabric for accelerating large-scale datacenter services. ISCA 2014: 13-24 - [c71]Renée St. Amant, Amir Yazdanbakhsh, Jongse Park, Bradley Thwaites, Hadi Esmaeilzadeh, Arjang Hassibi, Luis Ceze, Doug Burger:
General-purpose code acceleration with limited-precision analog computation. ISCA 2014: 505-516 - [c70]Milovan Duric, Oscar Palomar, Aaron Smith, Milan Stanic, Osman S. Unsal, Adrián Cristal, Mateo Valero, Doug Burger, Alexander V. Veidenbaum:
Dynamic-vector execution on a general purpose EDGE chip multiprocessor. ICSAMOS 2014: 18-25 - 2013
- [j35]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Power challenges may end the multicore era. Commun. ACM 56(2): 93-102 (2013) - [j34]Emily R. Blem, Hadi Esmaeilzadeh, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Multicore Model from Abstract Single Core Inputs. IEEE Comput. Archit. Lett. 12(2): 59-62 (2013) - [j33]Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug Burger:
Neural Acceleration for General-Purpose Approximate Programs. IEEE Micro 33(3): 16-27 (2013) - [c69]Eric S. Chung, Doug Burger, Mike Butts, Jan Gray, Chuck Thacker, Kees A. Vissers, John Wawrzynek:
Reconfigurable computing in the era of post-silicon scaling [panel discussion]. FCCM 2013 - [c68]Behnam Robatmili, Dong Li, Hadi Esmaeilzadeh, Madhu Saravana Sibi Govindan, Aaron Smith, Andrew Putnam, Doug Burger, Stephen W. Keckler:
How to implement effective prediction and forwarding for fusable dynamic multicore architectures. HPCA 2013: 460-471 - [c67]Tiejun Gao, Karin Strauss, Stephen M. Blackburn, Kathryn S. McKinley, Doug Burger, James R. Larus:
Using managed runtime systems to tolerate holes in wearable memories. PLDI 2013: 297-308 - 2012
- [j32]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Dark Silicon and the End of Multicore Scaling. IEEE Micro 32(3): 122-134 (2012) - [j31]Doug Burger, Stephen W. Keckler, Mark Papermaster:
Charles R. (Chuck) Moore (1961 - 2012). IEEE Micro 32(4): 3-5 (2012) - [j30]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Power Limitations and Dark Silicon Challenge the Future of Multicore. ACM Trans. Comput. Syst. 30(3): 11:1-11:27 (2012) - [c66]Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug Burger:
Architecture support for disciplined approximate programming. ASPLOS 2012: 301-312 - [c65]Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger:
Exploiting microarchitectural redundancy for defect tolerance. ICCD 2012: 35-42 - [c64]Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug Burger:
Neural Acceleration for General-Purpose Approximate Programs. MICRO 2012: 449-460 - 2011
- [c63]Bertrand A. Maher, Katherine E. Coons, Kathryn S. McKinley, Doug Burger:
The Good Block: Hardware/Software Design for Composable, Block-Atomic Processors. Interaction between Compilers and Computer Architectures 2011: 9-16 - [c62]Emmanouil Koukoumidis, Dimitrios Lymberopoulos, Karin Strauss, Jie Liu, Doug Burger:
Pocket cloudlets. ASPLOS 2011: 171-184 - [c61]Behnam Robatmili, Madhu Saravana Sibi Govindan, Doug Burger, Stephen W. Keckler:
Exploiting criticality to reduce bottlenecks in distributed uniprocessors. HPCA 2011: 431-442 - [c60]Per Stenström, Doug Burger, Wen-mei W. Hwu, Vipin Kumar, Kunle Olukotun, David A. Padua, Burton Smith:
Panel Statement. IPDPS 2011: 877 - [c59]Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger:
Dark silicon and the end of multicore scaling. ISCA 2011: 365-376 - [c58]Andrew W. Hay, Karin Strauss, Timothy Sherwood, Gabriel H. Loh, Doug Burger:
Preventing PCM banks from seizing too much power. MICRO 2011: 186-195 - 2010
- [j29]Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger:
Phase change memory architecture and the quest for scalability. Commun. ACM 53(7): 99-106 (2010) - [j28]Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, Doug Burger:
Phase-Change Technology and the Future of Main Memory. IEEE Micro 30(1): 143 (2010) - [j27]James C. Hoe, Doug Burger, Joel S. Emer, Derek Chiou, Resit Sendag, Joshua J. Yi:
The Future of Architectural Simulation. IEEE Micro 30(3): 8-18 (2010) - [j26]Andrew Putnam, Aaron Smith, Doug Burger:
Dynamic vectorization in the E2 dynamic multicore architecture. SIGARCH Comput. Archit. News 38(4): 27-32 (2010) - [c57]Samira Manabi Khan, Daniel A. Jiménez, Doug Burger, Babak Falsafi:
Using dead blocks as a virtual victim cache. PACT 2010: 489-500 - [c56]Matthew E. Taylor, Katherine E. Coons, Behnam Robatmili, Bertrand A. Maher, Doug Burger, Kathryn S. McKinley:
Evolving Compiler Heuristics to Manage Communication and Contention. AAAI 2010: 1690-1693 - [c55]Engin Ipek, Jeremy Condit, Edmund B. Nightingale, Doug Burger, Thomas Moscibroda:
Dynamically replicated memory: building reliable systems from nanoscale resistive memories. ASPLOS 2010: 3-14 - [c54]Stuart E. Schechter, Gabriel H. Loh, Karin Strauss, Doug Burger:
Use ECP, not ECC, for hard failures in resistive memories. ISCA 2010: 141-152
2000 – 2009
- 2009
- [j25]Renée St. Amant, Daniel A. Jiménez, Doug Burger:
Mixed-Signal Approximate Computation: A Neural Predictor Case Study. IEEE Micro 29(1): 104-115 (2009) - [c53]Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeffrey R. Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley:
An evaluation of the TRIPS computer system. ASPLOS 2009: 1-12 - [c52]Benjamin C. Lee, Engin Ipek, Onur Mutlu, Doug Burger:
Architecting phase change memory as a scalable dram alternative. ISCA 2009: 2-13 - [c51]Madhu Saravana Sibi Govindan, Stephen W. Keckler, Doug Burger:
End-to-end validation of architectural power models. ISLPED 2009: 383-388 - [c50]Nitya Ranganathan, Doug Burger, Stephen W. Keckler:
Analysis of the TRIPS prototype block predictor. ISPASS 2009: 195-206 - [c49]Jeremy Condit, Edmund B. Nightingale, Christopher Frost, Engin Ipek, Benjamin C. Lee, Doug Burger, Derrick Coetzee:
Better I/O through byte-addressable, persistent memory. SOSP 2009: 133-146 - [p1]Doug Burger, Stephen W. Keckler, Simha Sethumadhavan:
Composable Multicore Chips. Multicore Processors and Systems 2009: 73-109 - 2008
- [j24]Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger:
Multitasking workload scheduling on flexible core chip multiprocessors. SIGARCH Comput. Archit. News 36(2): 46-55 (2008) - [c48]Katherine E. Coons, Behnam Robatmili, Matthew E. Taylor, Bertrand A. Maher, Doug Burger, Kathryn S. McKinley:
Feature selection and policy optimization for distributed instruction placement using reinforcement learning. PACT 2008: 32-42 - [c47]Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger:
Multitasking workload scheduling on flexible-core chip multiprocessors. PACT 2008: 187-196 - [c46]Franziska Roesner, Doug Burger, Stephen W. Keckler:
Counting Dependence Predictors. ISCA 2008: 215-226 - [c45]Behnam Robatmili, Katherine E. Coons, Doug Burger, Kathryn S. McKinley:
Register Bank Assignment for Spatially Partitioned Processors. LCPC 2008: 64-79 - [c44]Behnam Robatmili, Katherine E. Coons, Doug Burger, Kathryn S. McKinley:
Strategies for mapping dataflow blocks to distributed hardware. MICRO 2008: 23-34 - [c43]Haiming Liu, Michael Ferdman, Jaehyuk Huh, Doug Burger:
Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency. MICRO 2008: 222-233 - [c42]Renée St. Amant, Daniel A. Jiménez, Doug Burger:
Low-power, high-performance analog neural branch prediction. MICRO 2008: 447-458 - [c41]Jeffrey R. Diamond, Behnam Robatmili, Stephen W. Keckler, Robert A. van de Geijn, Kazushige Goto, Doug Burger:
High performance dense linear algebra on a spatially distributed processor. PPoPP 2008: 63-72 - 2007
- [j23]Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger:
On-Chip Interconnection Networks of the TRIPS Chip. IEEE Micro 27(5): 41-50 (2007) - [j22]Nicholas Nethercote, Doug Burger, Kathryn S. McKinley:
Convergent Compilation Applied to Loop Unrolling. Trans. High Perform. Embed. Archit. Compil. 1: 140-158 (2007) - [j21]Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler:
A NUCA Substrate for Flexible CMP Cache Sharing. IEEE Trans. Parallel Distributed Syst. 18(8): 1028-1040 (2007) - [c40]Simha Sethumadhavan, Franziska Roesner, Joel S. Emer, Doug Burger, Stephen W. Keckler:
Late-binding: enabling unordered load-store queues. ISCA 2007: 347-357 - [c39]Changkyu Kim, Simha Sethumadhavan, M. S. Govindan, Nitya Ranganathan, Divya Gulati, Doug Burger, Stephen W. Keckler:
Composable Lightweight Processors. MICRO 2007: 381-394 - [c38]Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger:
Implementation and Evaluation of a Dynamically Routed Processor Operand Network. NOCS 2007: 7-17 - 2006
- [c37]Katherine E. Coons, Xia Chen, Doug Burger, Kathryn S. McKinley, Sundeep K. Kushwaha:
A spatial path scheduling algorithm for EDGE architectures. ASPLOS 2006: 129-140 - [c36]Aaron Smith, Jon Gibson, Bertrand A. Maher, Nicholas Nethercote, Bill Yoder, Doug Burger, Kathryn S. McKinley, James H. Burrill:
Compiling for EDGE Architectures. CGO 2006: 185-195 - [c35]Simha Sethumadhavan, Robert G. McDonald, Rajagopalan Desikan, Doug Burger, Stephen W. Keckler:
Design and Implementation of the TRIPS Primary Memory System. ICCD 2006: 470-476 - [c34]Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger:
Implementation and Evaluation of On-Chip Network Architectures. ICCD 2006: 477-484 - [c33]Ramadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler:
Critical path analysis of the TRIPS architecture. ISPASS 2006: 37-47 - [c32]Bertrand A. Maher, Aaron Smith, Doug Burger, Kathryn S. McKinley:
Merging Head and Tail Duplication for Convergent Hyperblock Formation. MICRO 2006: 65-76 - [c31]Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert G. McDonald, Doug Burger, Stephen W. Keckler, Kathryn S. McKinley:
Dataflow Predication. MICRO 2006: 89-102 - [c30]Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger:
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO 2006: 480-491 - 2005
- [c29]Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler:
A NUCA substrate for flexible CMP cache sharing. ICS 2005: 31-40 - 2004
- [j20]Doug Burger, James R. Goodman:
Billion-Transistor Architectures: There and Back Again. Computer 37(3): 22-28 (2004) - [j19]Doug Burger, Stephen W. Keckler, Kathryn S. McKinley, Michael Dahlin, Lizy Kurian John, Calvin Lin, Charles R. Moore, James H. Burrill, Robert G. McDonald, William Yode:
Scaling to the End of Silicon with EDGE Architectures. Computer 37(7): 44-55 (2004) - [j18]Jaehyuk Huh, Doug Burger, Jichuan Chang, Gurindar S. Sohi:
Speculative Incoherent Cache Protocols. IEEE Micro 24(6): 104-109 (2004) - [j17]Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler:
Scalable Hardware Memory Disambiguation for High-ILP Processors. IEEE Micro 24(6): 118-127 (2004) - [j16]Doug Burger, Anand Sivasubramaniam:
Tools for computer architecture research. SIGMETRICS Perform. Evaluation Rev. 31(4): 2-3 (2004) - [j15]Doug Burger, Todd M. Austin, Stephen W. Keckler:
Recent extensions to the SimpleScalar tool suite. SIGMETRICS Perform. Evaluation Rev. 31(4): 4-7 (2004) - [j14]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore:
TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. ACM Trans. Archit. Code Optim. 1(1): 62-93 (2004) - [c28]Ramadass Nagarajan, Sundeep K. Kushwaha, Doug Burger, Kathryn S. McKinley, Calvin Lin, Stephen W. Keckler:
Static Placement, Dynamic Issue (SPDI) Scheduling for EDGE Architectures. IEEE PACT 2004: 74-84 - [c27]Jaehyuk Huh, Jichuan Chang, Doug Burger, Gurindar S. Sohi:
Coherence decoupling: making use of incoherence. ASPLOS 2004: 97-106 - [c26]Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler:
Scalable selective re-execution for EDGE architectures. ASPLOS 2004: 120-132 - 2003
- [j13]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore:
Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. IEEE Micro 23(6): 46-51 (2003) - [j12]Changkyu Kim, Doug Burger, Stephen W. Keckler:
Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches. IEEE Micro 23(6): 99-107 (2003) - [j11]Deependra Talla, Lizy Kurian John, Doug Burger:
Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements. IEEE Trans. Computers 52(8): 1015-1031 (2003) - [j10]Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger:
Static energy reduction techniques for microprocessor caches. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 303-313 (2003) - [c25]Doug Burger:
Designing Ultra-large Instruction Issue Windows. Asia-Pacific Computer Systems Architecture Conference 2003: 14-20 - [c24]Doug Burger:
Architectural versus physical solutions for on-chip communication challenges. CODES+ISSS 2003: 74 - [c23]Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger:
Routed Inter-ALU Networks for ILP Scalability and Performance. ICCD 2003: 170- - [c22]Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger:
Exploiting Microarchitectural Redundancy For Defect Tolerance. ICCD 2003: 481-488 - [c21]Zhenlin Wang, Doug Burger, Steven K. Reinhardt, Kathryn S. McKinley, Charles C. Weems:
Guided Region Prefetching: A Cooperative Hardware/Software Approach. ISCA 2003: 388-398 - [c20]Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore:
Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. ISCA 2003: 422-433 - [c19]Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger:
Microprocessor pipeline energy analysis. ISLPED 2003: 282-287 - [c18]Karthikeyan Sankaralingam, Stephen W. Keckler, William R. Mark, Doug Burger:
Universal Mechanisms for Data-Parallel Architectures. MICRO 2003: 303-314 - [c17]Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler:
Scalable Hardware Memory Disambiguation for High ILP Processors. MICRO 2003: 399-410 - 2002
- [j9]Rajagopalan Desikan, Doug Burger, Stephen W. Keckler, José-Lorenzo Cruz, Fernando Latorre, Antonio González, Mateo Valero:
Errata on "Measuring Experimental Error in Microprocessor Simulation". SIGARCH Comput. Archit. News 30(1): 2-4 (2002) - [c16]Changkyu Kim, Doug Burger, Stephen W. Keckler:
An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. ASPLOS 2002: 211-222 - [c15]Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler, Doug Burger, Lorenzo Alvisi:
Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic. DSN 2002: 389-398 - [c14]M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas:
The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays. ISCA 2002: 14-24 - 2001
- [j8]Wei-Fen Lin, Steven K. Reinhardt, Doug Burger:
Designing a Modern Memory Hierarchy with Hardware Prefetching. IEEE Trans. Computers 50(11): 1202-1218 (2001) - [c13]Jaehyuk Huh, Doug Burger, Stephen W. Keckler:
Exploring the Design Space of Future CMPs. IEEE PACT 2001: 199-210 - [c12]Wei-Fen Lin, Steven K. Reinhardt, Doug Burger:
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design. HPCA 2001: 301-312 - [c11]Wei-Fen Lin, Steven K. Reinhardt, Doug Burger, Thomas R. Puzak:
Filtering Superfluous Prefetches Using Density Vectors. ICCD 2001: 124-132 - [c10]Heather Hanson, M. S. Hrishikesh, Vikas Agarwal, Stephen W. Keckler, Doug Burger:
Static Energy Reduction Techniques for Microprocessor Caches. ICCD 2001: 276-283 - [c9]Rajagopalan Desikan, Doug Burger, Stephen W. Keckler:
Measuring Experimental Error in Microprocessor Simulation. ISCA 2001: 266-277 - [c8]Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, Stephen W. Keckler:
A design space evaluation of grid processor architectures. MICRO 2001: 40-51 - 2000
- [c7]Vikas Agarwal, M. S. Hrishikesh, Stephen W. Keckler, Doug Burger:
Clock rate versus IPC: the end of the road for conventional microarchitectures. ISCA 2000: 248-259
1990 – 1999
- 1999
- [j7]Stefanos Kaxiras, Doug Burger, James R. Goodman:
DataScalar: A memory-centric approach to computing. J. Syst. Archit. 45(12-13): 1001-1022 (1999) - 1997
- [j6]Doug Burger, James R. Goodman:
Billion-Transistor Architectures - Guest Editors' Introduction. Computer 30(9): 46-49 (1997) - [j5]Sarita V. Adve, Doug Burger, Rudolf Eigenmann, Alasdair Rawsthorne, Michael D. Smith, Catherine H. Gebotys, Mahmut T. Kandemir, David J. Lilja, Alok N. Choudhary, Jesse Zhixi Fang, Pen-Chung Yew:
Changing Interaction of Compiler and Architecture. Computer 30(12): 51-58 (1997) - [j4]Doug Burger, James R. Goodman, Alain Kägi:
Limited bandwidth to affect processor design. IEEE Micro 17(6): 55-62 (1997) - [j3]Doug Burger, Todd M. Austin:
The SimpleScalar tool set, version 2.0. SIGARCH Comput. Archit. News 25(3): 13-25 (1997) - [c6]Alain Kägi, Doug Burger, James R. Goodman:
Efficient Synchronization: Let Them Eat QOLB. ISCA 1997: 170-180 - [c5]Doug Burger, Stefanos Kaxiras, James R. Goodman:
DataScalar Architectures. ISCA 1997: 338-349 - [r1]Doug Burger, James R. Goodman, Gurindar S. Sohi:
Memory Systems. The Computer Science and Engineering Handbook 1997: 447-461 - 1996
- [j2]Doug Burger:
Memory Systems. ACM Comput. Surv. 28(1): 63-65 (1996) - [j1]Doug Burger, Rahmat S. Hyder, Barton P. Miller, David A. Wood:
Paging tradeoffs in distributed-shared-memory multiprocessors. J. Supercomput. 10(1): 87-104 (1996) - [c4]Doug Burger, James R. Goodman, Alain Kägi:
Memory Bandwidth Limitations of Future Microprocessors. ISCA 1996: 78-89 - 1995
- [c3]Alain Kägi, Nagi Aboulenein, Doug Burger, James R. Goodman:
Techniques for Reducing Overheads of Shared-Memory Multiprocessing. International Conference on Supercomputing 1995: 11-20 - [c2]Doug Burger, David A. Wood:
Accuracy vs. performance in parallel simulation of interconnection networks. IPPS 1995: 22-31 - 1994
- [c1]Doug Burger, Rahmat S. Hyder, Barton P. Miller, David A. Wood:
Paging tradeoffs in distributed-shared-memory multiprocessors. SC 1994: 590-599
Coauthor Index
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