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2010 – 2019
- 2017
[c17]Elizabeth Reed, Alaa R. Alameldeen, Helia Naeimi, Patrick Stolt:
Probabilistic replacement strategies for improving the lifetimes of NVM-based caches. MEMSYS 2017: 166-176- 2016
- [j4]Ashwin Chintaluri, Helia Naeimi, Suriyaprakash Natarajan, Arijit Raychowdhury:
Analysis of Defects and Variations in Embedded Spin Transfer Torque (STT) MRAM Arrays. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(3): 319-329 (2016) - [c16]Nitin Rathi, Swaroop Ghosh, Anirudh Iyengar, Helia Naeimi:
Data privacy in non-volatile cache: Challenges, attack models and solutions. ASP-DAC 2016: 348-353 - [c15]Anirudh Iyengar, Swaroop Ghosh, Nitin Rathi, Helia Naeimi:
Side channel attacks on STTRAM and low-overhead countermeasures. DFT 2016: 141-146 - [c14]Fabian Oboril, Fazal Hameed
, Rajendra Bishnoi, Ali Ahari, Helia Naeimi, Mehdi Baradaran Tahoori:
Normally-OFF STT-MRAM Cache with Zero-Byte Compression for Energy Efficient Last-Level Caches. ISLPED 2016: 236-241 - [i4]Nitin Rathi, Asmit De, Helia Naeimi, Swaroop Ghosh:
Cache Bypassing and Checkpointing to Circumvent Data Security Attacks on STTRAM. CoRR abs/1603.06227 (2016) - [i3]Nitin Rathi, Helia Naeimi, Swaroop Ghosh:
Side Channel Attacks on STTRAM and Low-Overhead Countermeasures. CoRR abs/1603.06675 (2016) - [i2]Ralph Nathan, Helia Naeimi, Daniel J. Sorin, Xiaobai Sun:
Profile-Driven Automated Mixed Precision. CoRR abs/1606.00251 (2016) - 2015
- [c13]Ashwin Chintaluri, Abhinav Parihar, Suriyaprakash Natarajan, Helia Naeimi, Arijit Raychowdhury:
A Model Study of Defects and Faults in Embedded Spin Transfer Torque (STT) MRAM Arrays. ATS 2015: 187-192 - 2014
- [c12]Siva Kumar Sastry Hari, Radha Venkatagiri, Sarita V. Adve, Helia Naeimi:
GangES: Gang error simulation for hardware resiliency evaluation. ISCA 2014: 61-72 - [c11]Ralph Nathan, Bryan Anthonio, Shih-Lien Lu, Helia Naeimi, Daniel J. Sorin, Xiaobai Sun:
Recycled Error Bits: Energy-Efficient Architectural Support for Floating Point Accuracy. SC 2014: 117-127 - 2013
- [j3]Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi, Pradeep Ramachandran:
Relyzer: Application Resiliency Analyzer for Transient Faults. IEEE Micro 33(3): 58-66 (2013) - [c10]Helia Naeimi, Suriya Natarajan, Kushagra Vaid, Prabhakar Kudva, Mahesh Natu:
Innovative practices session 5C: Cloud atlas - Unreliability through massive connectivity. VTS 2013: 1 - [i1]Ralph Nathan, Bryan Anthonio, Shih-Lien Lu, Helia Naeimi, Daniel J. Sorin, Xiaobai Sun:
Recycled Error Bits: Energy-Efficient Architectural Support for Higher Precision Floating Point. CoRR abs/1309.7321 (2013) - 2012
- [c9]Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi, Pradeep Ramachandran:
Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults. ASPLOS 2012: 123-134 - [c8]Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi:
Low-cost program-level detectors for reducing silent data corruptions. DSN 2012: 1-12 - 2011
- [c7]Chia-Hsiang Chen, Yejoong Kim, Zhengya Zhang, David T. Blaauw, Dennis Sylvester, Helia Naeimi, Sumeet Sandhu:
A confidence-driven model for error-resilient computing. DATE 2011: 1608-1613 - 2010
- [c6]Nicholas P. Carter, Helia Naeimi, Donald S. Gardner:
Design techniques for cross-layer resilience. DATE 2010: 1023-1028 - [c5]Ted Hong, Yanjing Li, Sung-Boem Park, Diana Mui, David Lin, Ziyad Abdel Kaleq, Nagib Hakim, Helia Naeimi, Donald S. Gardner, Subhasish Mitra:
QED: Quick Error Detection tests for effective post-silicon validation. ITC 2010: 154-163
2000 – 2009
- 2009
- [j2]Helia Naeimi, André DeHon:
Fault Secure Encoder and Decoder for NanoMemory Applications. IEEE Trans. Very Large Scale Integr. Syst. 17(4): 473-486 (2009) - 2008
- [b1]Helia Naeimi:
Reliable Integration of Terascale Systems with Nanoscale Devices. California Institute of Technology, USA, 2008 - 2007
- [c4]Helia Naeimi, André DeHon:
Fault Secure Encoder and Decoder for Memory Applications. DFT 2007: 409-417 - [c3]Helia Naeimi, André DeHon:
Fault tolerant nano-memory with fault secure encoder and decoder. Nano-Net 2007: 2 - 2005
- [j1]André DeHon, Helia Naeimi:
Seven Strategies for Tolerating Highly Defective Fabrication. IEEE Des. Test Comput. 22(4): 306-315 (2005) - 2004
- [c2]André DeHon, Joshua Adams, Michael DeLorimier, Nachiket Kapre, Yuki Matsuda, Helia Naeimi, Michael C. Vanier, Michael G. Wrighton:
Design Patterns for Reconfigurable Computing. FCCM 2004: 13-23 - [c1]Helia Naeimi, André DeHon:
A greedy algorithm for tolerating defective crosspoints in nanoPLA design. FPT 2004: 49-56
Coauthor Index
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