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Jainaveen Sundaram
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2020 – today
- 2024
- [c6]Vinayak Honkote, Ragh Kuttappa, Jainaveen Sundaram, Satish Yada, Chinnusamy Kalimuthu, Juhi Patil, Richard Lee, Cristan Paulino, Paolo A. Aseron, Trang Nguyen, Amreesh Rao, Dileep Kurian, Mingming Xu, Yan Song, Tanay Karnik, Anuradha Srinivasan, Vivek De:
A 3.2GHz-15GHz Low Jitter Resonant Clock Featuring Rotary Traveling Wave Oscillators in Intel 4 CMOS for 3D Heterogeneous Multi-Die Systems. VLSI Technology and Circuits 2024: 1-2 - [i1]Jainaveen Sundaram, Ravishankar Iyer:
LLaVaOLMoBitnet1B: Ternary LLM goes Multimodal! CoRR abs/2408.13402 (2024) - 2023
- [c5]Prerna Budhkar, Navneet Rao, Jainaveen Sundaram, Tanay Karnik:
CPU Microarchitectural Performance Analysis of SVT-AV1 Encoder. ICIP 2023: 3045-3049 - 2022
- [c4]Ragh Kuttappa, Baris Taskin, Vinayak Honkote, Satish Yada, Jainaveen Sundaram, Dileep Kurian, Tanay Karnik, Anuradha Srinivasan:
Resonant Rotary Clock Synchronization with Active and Passive Silicon Interposer. ISCAS 2022: 692-696 - 2021
- [c3]Jainaveen Sundaram, Srivatsa Rangachar Srinivasa, Dileep Kurian, Indranil Chakraborty, Sirisha Rani Kale, Nilesh Jain, Tanay Karnik, Ravi R. Iyer, Anuradha Srinivasan:
A 93 TOPS/Watt Near-Memory Reconfigurable SAD Accelerator for HEVC/AV1/JEM Encoding. DATE 2021: 1400-1403 - [c2]Jainaveen Sundaram, Srinivasan Gopal, Thomas P. Thomas, Edward Burton, Erika Ramirez:
A Reconfigurable Asynchronous SERDES for Heterogenous Chiplet Interconnects. ISQED 2021: 542-546 - [c1]Srivatsa Srinivasa, Akshay Krishna Ramanathan, Jainaveen Sundaram, Dileep Kurian, Srinivasan Gopal, Nilesh Jain, Anuradha Srinivasan, Ravi R. Iyer, Vijaykrishnan Narayanan, Tanay Karnik:
Trends and Opportunities for SRAM Based In-Memory and Near-Memory Computation. ISQED 2021: 547-552
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last updated on 2024-10-18 20:27 CEST by the dblp team
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