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ORCIDPaul R. Gray
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2000 – 2009
- 2006
[j22]Naratip Wongkomet, Luns Tee, Paul R. Gray:
A $+$31.5 dBm CMOS RF Doherty Power Amplifier for Wireless Communications. IEEE J. Solid State Circuits 41(12): 2852-2859 (2006)- [c9]Naratip Wongkomet, Luns Tee, Paul R. Gray:
A 1.7GHz 1.5W CMOS RF Doherty Power Amplifier for Wireless Communications. ISSCC 2006: 1962-1971 - 2005
- [c8]Yun Chiu, Borivoje Nikolic
, Paul R. Gray:
Scaling of analog-to-digital converters into ultra-deep-submicron CMOS. CICC 2005: 375-382 - 2004
- [j21]Yun Chiu, Paul R. Gray, Borivoje Nikolic:
A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR. IEEE J. Solid State Circuits 39(12): 2139-2151 (2004) - [j20]Yun Chiu, Cheongyuen W. Tsang, Borivoje Nikolic, Paul R. Gray:
Least mean square adaptive digital background calibration of pipelined analog-to-digital converters. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(1): 38-46 (2004) - 2001
- [j19]Jeffrey A. Weldon, R. Sekhar Narayanaswami, Jacques Christophe Rudell, Li Lin, Masanori Otsuka, Sébastien Dedieu, Luns Tee, King-Chun Tsai, Cheol-Woong Lee, Paul R. Gray:
A 1.75-GHz highly integrated narrow-band CMOS transmitter with harmonic-rejection mixers. IEEE J. Solid State Circuits 36(12): 2003-2015 (2001) - 2000
- [j18]George Chien, Paul R. Gray:
A 900-MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications. IEEE J. Solid State Circuits 35(12): 1996-1999 (2000)
1990 – 1999
- 1999
- [j17]Andrew M. Abo, Paul R. Gray:
A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter. IEEE J. Solid State Circuits 34(5): 599-606 (1999) - [j16]King-Chun Tsai, Paul R. Gray:
A 1.9-GHz, 1-W CMOS class-E power amplifier for wireless communications. IEEE J. Solid State Circuits 34(7): 962-970 (1999) - 1998
- [j15]Keith K. Onodera, Paul R. Gray:
A 75-mW 128-MHz DS-CDMA baseband demodulator for high-speed wireless applications [LANs]. IEEE J. Solid State Circuits 33(5): 753-761 (1998) - [j14]Arnold R. Feldman, Bernhard E. Boser, Paul R. Gray:
A 13-bit, 1.4-MS/s sigma-delta modulator for RF baseband channel applications. IEEE J. Solid State Circuits 33(10): 1462-1469 (1998) - [c7]Arnold R. Feldman, Bernhard E. Boser, Paul R. Gray:
A 13 bit, 1.4 MS/s, 3.3 V sigma-delta modulator for RF baseband channel applications. CICC 1998: 229-232 - [c6]Jacques Christophe Rudell, Jia-Jiunn Ou, R. Sekhar Narayanaswami, George Chien, Jeffrey A. Weldon, Li Lin, King-Chun Tsai, Luns Tee, Kelvin Khoo, Danelle Au, Troy Robinson, Danilo Gerna, Masanori Otsuka, Paul R. Gray:
Recent developments in high integration multi-standard CMOS transceivers for personal communication systems. ISLPED 1998: 149-154 - 1997
- [j13]Jacques C. Rudell, Jia-Jiunn Ou, Thomas Byunghak Cho, George Chien, Francesco Brianti, Jeffrey A. Weldon, Paul R. Gray:
A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications. IEEE J. Solid State Circuits 32(11): 2071-2088 (1997) - 1996
- [j12]David W. Cline, Paul R. Gray:
A power optimized 13-b 5 Msamples/s pipelined analog-to-digital converter in 1.2 μm CMOS. IEEE J. Solid State Circuits 31(3): 294-303 (1996) - [j11]Robert R. Neff, Paul R. Gray, Alberto L. Sangiovanni-Vincentelli:
A module generator for high-speed CMOS current output digital/analog converters. IEEE J. Solid State Circuits 31(3): 448-451 (1996) - 1995
- [j10]Thomas Byunghak Cho, Paul R. Gray:
A 10 b, 20 Msample/s, 35 mW pipeline A/D converter. IEEE J. Solid State Circuits 30(3): 166-172 (1995) - [j9]Caesar S. H. Wong, Jacques C. Rudell, Gregory T. Uehara, Paul R. Gray:
A 50 MHz eight-tap adaptive equalizer for partial-response channels. IEEE J. Solid State Circuits 30(3): 228-234 (1995) - 1994
- [j8]Gregory T. Uehara, Paul R. Gray:
A 100 MHz A/D interface for PRML magnetic disk read channels. IEEE J. Solid State Circuits 29(12): 1606-1613 (1994) - [c5]Todd C. Weigandt, Beomsup Kim, Paul R. Gray:
Analysis of Timing Jitter in CMOS Ring Oscillators. ISCAS 1994: 27-30 - [c4]Beomsup Kim, Todd C. Weigandt, Paul R. Gray:
PLL/DLL System Noise Analysis for Low Jitter Clock Synthesizer Design. ISCAS 1994: 31-34 - 1991
- [c3]Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli, Georges G. E. Gielen, Paul R. Gray:
A Behavioral Representation for Nyquist Rate A/D Converters. ICCAD 1991: 386-389 - 1990
- [j7]Han Young Koh, Carlo H. Séquin, Paul R. Gray:
OPASYN: a compiler for CMOS operational amplifiers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(2): 113-125 (1990) - [c2]Gani Jusuf, Paul R. Gray, Alberto L. Sangiovanni-Vincentelli:
CADICS - Cyclic Analog-to-Digital Converter Synthesis. ICCAD 1990: 286-289
1980 – 1989
- 1989
- [j6]Sui-Ping Shieh, Chorng-Kuang Wang, Rinaldo Castello, Paul R. Gray:
A scalable switched-capacitor filter implemented in 1.25- mu m technology. IEEE J. Solid State Circuits 24(1): 174-177 (1989) - [j5]Joey Doernberg, Paul R. Gray, David A. Hodges:
A 10-bit 5-Msample/s CMOS two-step flash ADC. IEEE J. Solid State Circuits 24(2): 241-249 (1989) - 1988
- [j4]Sehat Sutarja, Paul R. Gray:
A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter. IEEE J. Solid State Circuits 23(6): 1316-1323 (1988) - [j3]Bosco H. Leung, Robert R. Neff, Paul R. Gray, Robert W. Brodersen:
Area-efficient multichannel oversampled PCM voice-band coder. IEEE J. Solid State Circuits 23(6): 1351-1357 (1988) - [j2]Carlos A. Laber, Paul R. Gray:
A positive-feedback transconductance amplifier with applications to high-frequency, high-Q CMOS switched-capacitor filters. IEEE J. Solid State Circuits 23(6): 1370-1378 (1988) - [c1]Han Young Koh, Carlo H. Séquin, Paul R. Gray:
Automatic layout generation for CMOS operational amplifiers. ICCAD 1988: 548-551 - 1980
- [j1]Paul R. Gray, David G. Messerschmitt:
Integrated circuits for local digital switching line interfaces. IEEE Commun. Mag. 18(3): 12-23 (1980)
Coauthor Index
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