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ORCIDPraveen Vishakantaiah
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2000 – 2009
- 2001
[c12]Kee Sup Kim, Rathish Jayabharathi, Craig Carstens, Praveen Vishakantaiah, Derek Feltham, Adrian Carbine:
DPDAT: data path direct access testing. ITC 2001: 188-195- [c11]Venkatram Krishnaswamy, A. B. Ma, Praveen Vishakantaiah:
A study of bridging defect probabilities on a Pentium (TM) 4 CPU. ITC 2001: 688-695 - 2000
- [c10]Yiorgos Makris, Alex Orailoglu, Praveen Vishakantaiah:
Modular test generation and concurrent transparency-based test translation using gate-level ATPG. CICC 2000: 75-78 - [c9]Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah:
Transparency-based hierarchical test generation for modular RTL designs. ISCAS 2000: 689-692
1990 – 1999
- 1999
- [c8]Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah:
TRANSPARENT: a system for RTL testability analysis, DFT guidance and hierarchical test generation. CICC 1999: 159-162 - 1996
- [c7]Sankaran Karthik, Mark Aitken, Glidden Martin, Srinivasu Pappula, Bob Stettler, Praveen Vishakantaiah, Manuel A. d'Abreu, Jacob A. Abraham:
Distributed Mixed Level Logic and Fault Simulation on the Pentium® Pro Microprocessor. ITC 1996: 160-166 - 1994
- [c6]Thomas Thomas, Praveen Vishakantaiah, Jacob A. Abraham:
Impact of behavioral modifications for testability. VTS 1994: 427-432 - 1993
- [c5]Praveen Vishakantaiah, Jacob A. Abraham:
Impact of Behavioral Learning on the Compilation of Sequential Circuit Tests. FTCS 1993: 370-379 - [c4]Praveen Vishakantaiah, Thomas Thomas, Jacob A. Abraham, Magdy S. Abadir:
AMBIANT: Automatic Generation of Behavioral Modifications for Testability. ICCD 1993: 63-66 - [c3]Praveen Vishakantaiah, Jacob A. Abraham, Daniel G. Saab:
CHEETA: Composition of Hierarchical Sequential Tests Using ATKET. ITC 1993: 606-615 - [c2]Kamal K. Varma, Praveen Vishakantaiah, Jacob A. Abraham:
Generation of testable designs from behavioral descriptions using high level synthesis tools. VTS 1993: 124-130 - 1992
- [c1]Praveen Vishakantaiah, Jacob A. Abraham, Magdy S. Abadir:
Automatic Test Knowledge Extraction from VHDL (ATKET). DAC 1992: 273-278
Coauthor Index
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