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Hans M. Jacobson
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2020 – today
- 2023
- [c21]Karthik Swaminathan, Ramon Bertran, Doug Balazich, Alper Buyuktosunoglu, Arvind Haran, Sean M. Carey, Karl Anderson, Hans M. Jacobson, Matthias Pflanz, Pradip Bose:
Characterization and Exploration of Latch Checkers for Efficient RAS Protection. DSN-S 2023: 63-69 - 2021
- [c20]Karthik Swaminathan, Ramon Bertran, Hans M. Jacobson, Pradip Bose, Matthias Pflanz, Doug Balazich:
SERMiner : A Framework for Early-stage Reliability Estimation for IBM Processors. DSN (Supplements) 2021: 61-64 - [c19]Brian W. Thompto, Dung Q. Nguyen, José E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Müller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose:
Energy Efficiency Boost in the AI-Infused POWER10 Processor. ISCA 2021: 29-42
2010 – 2019
- 2019
- [c18]Karthik Swaminathan, Ramon Bertran, Hans M. Jacobson, Prabhakar Kudva, Pradip Bose:
Generation of Stressmarks for Early Stage Soft-Error Modeling. DSN (Supplements) 2019: 42-48 - 2017
- [c17]Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler:
Very Low Voltage (VLV) Design. ICCD 2017: 601-604 - 2015
- [j7]Ravi Nair, Samuel Antão, Carlo Bertolli, Pradip Bose, José R. Brunheroto, Tong Chen, Chen-Yong Cher, Carlos H. A. Costa, J. Doi, Constantinos Evangelinos, Bruce M. Fleischer, Thomas W. Fox, Diego S. Gallo, Leopold Grinberg, John A. Gunnels, Arpith C. Jacob, P. Jacob, Hans M. Jacobson, Tejas Karkhanis, C. Kim, Jaime H. Moreno, John K. O'Brien, Martin Ohmacht, Yoonho Park, Daniel A. Prener, Bryan S. Rosenburg, Kyung Dong Ryu, Olivier Sallenave, Mauricio J. Serrano, P. D. M. Siegl, Krishnan Sugavanam, Zehra Sura:
Active Memory Cube: A processing-in-memory architecture for exascale systems. IBM J. Res. Dev. 59(2/3) (2015) - [c16]Sam Likun Xi, Hans M. Jacobson, Pradip Bose, Gu-Yeon Wei, David M. Brooks:
Quantifying sources of error in McPAT and potential impacts on architectural studies. HPCA 2015: 577-589 - 2014
- [c15]Hans M. Jacobson, Arun Joseph, Dharmesh Parikh, Pradip Bose, Alper Buyuktosunoglu:
Empirically derived abstractions in uncore power modeling for a server-class processor chip. ISLPED 2014: 147-152 - 2013
- [j6]Krishnan Sugavanam, Chen-Yong Cher, John A. Gunnels, Ruud A. Haring, Philip Heidelberger, Hans M. Jacobson, Moyra K. McManus, D. P. Paulsen, David L. Satterfield, Yutaka Sugawara, Robert Walkup:
Design for low power and power management in IBM Blue Gene/Q. IBM J. Res. Dev. 57(1/2): 3 (2013) - [j5]Ramon Bertran, Yutaka Sugawara, Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose:
Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems. IBM J. Res. Dev. 57(1/2): 4 (2013) - 2012
- [c14]Pradip Bose, Alper Buyuktosunoglu, John A. Darringer, Meeta Sharma Gupta, Michael B. Healy, Hans M. Jacobson, Indira Nair, Jude A. Rivers, Jeonghee Shin, Augusto Vega, Alan J. Weger:
Power management of multi-core chips: Challenges and pitfalls. DATE 2012: 977-982 - 2011
- [c13]Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, Richard J. Eickemeyer:
Abstraction and microarchitecture scaling in early-stage power modeling. HPCA 2011: 394-405 - 2010
- [c12]Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban:
Power-efficient, reliable microprocessor architectures: modeling and design methods. ACM Great Lakes Symposium on VLSI 2010: 299-304
2000 – 2009
- 2005
- [c11]Hans M. Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor V. Zyuban, Richard J. Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, Joel M. Tendler:
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors. HPCA 2005: 238-242 - 2004
- [b1]Hans M. Jacobson:
Interlocked Synchronous Pipelines. University of Utah, USA, 2004 - [c10]Hans M. Jacobson:
Improved clock-gating through transparent pipelining. ISLPED 2004: 26-31 - [c9]Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan, Victor V. Zyuban, Hans M. Jacobson, Pradip Bose:
Microarchitectural techniques for power gating of execution units. ISLPED 2004: 32-37 - 2002
- [j4]Hans M. Jacobson, Chris J. Myers:
Efficient algorithms for exact two-level hazard-free logic minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(11): 1269-1283 (2002) - [c8]Hans M. Jacobson, Prabhakar Kudva, Pradip Bose, Peter W. Cook, Stanley Schuster:
Synchronous Interlocked Pipelines. ASYNC 2002: 3-12 - [c7]Pradip Bose, David M. Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas:
Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS 2002: 1-17 - 2001
- [c6]Chris J. Myers, Hans M. Jacobson:
Efficient Exact Two-Level Hazard-Free Logic Minimization. ASYNC 2001: 64-73 - 2000
- [j3]David M. Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook:
Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. IEEE Micro 20(6): 26-44 (2000) - [c5]Hans M. Jacobson, Erik Brunvand, Ganesh Gopalakrishnan, Prabhakar Kudva:
High-Level Asynchronous System Design Using the ACK Framework. ASYNC 2000: 93-103 - [c4]Hans M. Jacobson, Chris J. Myers, Ganesh Gopalakrishnan:
Achieving Fast and Exact Hazard-Free Logic Minimization of Extended Burst-Mode gC Finite State Machines. ICCAD 2000: 303-310
1990 – 1999
- 1999
- [j2]Hans M. Jacobson, Ganesh Gopalakrishnan:
Application-specific programmable control for high-performance asynchronous circuits. Proc. IEEE 87(2): 319-331 (1999) - [j1]Hans M. Jacobson, Ganesh Gopalakrishnan:
Corrections To application-specific Programmable Control For High-performance Asynchronous Circuits. Proc. IEEE 87(3): 525 (1999) - 1997
- [c3]Hans M. Jacobson, Ganesh Gopalakrishnan:
Asynchronous Microengines for Efficient High-level Control. ARVLSI 1997: 201-218 - 1996
- [c2]Prabhakar Kudva, Ganesh Gopalakrishnan, Hans M. Jacobson:
A Technique for Synthesizing Distributed Burst-mode Circuits. DAC 1996: 67-70 - [c1]Prabhakar Kudva, Ganesh Gopalakrishnan, Hans M. Jacobson, Steven M. Nowick:
Synthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes. DAC 1996: 77-82
Coauthor Index
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