"Two Modeling Techniques For CMOS Circuits To Enhance Test Generation And ..."

Kuen-Jong Lee, Jing-Jou Tang (1996)

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DOI: 10.1109/ATS.1996.555154

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Kuen-Jong Lee, Jing-Jou Tang:
Two Modeling Techniques For CMOS Circuits To Enhance Test Generation And Fault Simulation For Bridging Faults. Asian Test Symposium 1996: 165-171

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