"A high speed and energy efficient full adder design using complementary ..."

Jin-Fa Lin et al. (2006)

> Home

Details and statistics

DOI: 10.1109/ISCAS.2006.1693182

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/LinHSH06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/LinHSH06
Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, Cheng-Che Ho:
A high speed and energy efficient full adder design using complementary & level restoring carry logic. ISCAS 2006

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.