1459 results about "Single crystal substrate" patented technology

Disclosed is a natural-superlattice homologous single-crystal thin film, which includes a complex oxide which is epitaxially grown on either one of a ZnO epitaxial thin film formed on a single-crystal substrate, the single-crystal substrate after disappearance of the ZnO epitaxial thin film and a ZnO single crystal. The complex oxide is expressed by the formula: M1M2O3 (ZnO)m, wherein M1 is at least one selected from the group consisting of Ga, Fe, Sc, In, Lu, Yb, Tm, Er, Ho and Y, M2 is at least one selected from the group consisting of Mn, Fe, Ga, In and Al, and m is a natural number of 1 or more. A natural-superlattice homologous single-crystal thin film formed by depositing the complex oxide and subjecting the obtained layered film to a thermal anneal treatment can be used in optimal devices, electronic devices and X-ray optical devices.

A freestanding GaN single crystal substrate is made by the steps of preparing a (111) GaAs single crystal substrate, forming a mask having periodically arranged windows on the (111) GaAs substrate, making thin GaN buffer layers on the GaAs substrate in the windows of the mask, growing a GaN epitaxial layer on the buffer layers and the mask by an HVPE or an MOC, eliminating the GaAs substrate and the mask away and obtaining a freestanding GaN single crystal substrate. The GaN single crystal has a diameter larger than 20 mm and a thickness more than 0.07 mm, being freestanding and substantially distortion-free.

A white color or neutral color LED having an n-type ZnSe single crystal substrate doped with I, Cl, Br, Al, Ga or In as SA-emission centers and an epitaxial film structure including a ZnSe, ZnCdSe or ZnSeTe active layer and a pn-junction. The active layer emits blue or bluegreen light. The SA-emission centers in the ZnSe substrate convert blue or bluegreen light to yellow or orange SA-emission. The blue or bluegreen light from the epitaxial film structure and the yellow or orange light from the ZnSe substrate synthesize white color light or neutral color light between red and blue.

Disclosed is a natural-superlattice homologous single-crystal thin film, which comprises a complex oxide which is epitaxially grown on either one of a ZnO epitaxial thin film formed on a single-crystal substrate, the single-crystal substrate after disappearance of the ZnO epitaxial thin film and a ZnO single crystal. The complex oxide is expressed by the a formula: M1M2O3 (ZnO)m, wherein M1 is at least one selected from the group consisting of Ga, Fe, Sc, In, Lu, Yb, Tm, Er, Ho and Y, M2 is at least one selected from the group consisting of Mn, Fe, Ga, In and Al, and m is a natural number of 1 or more. A natural-superlattice homologous single-crystal thin film formed by depositing the complex oxide and subjecting the obtained layered film to a thermal anneal treatment can be used in optimal devices, electronic devices and X-ray optical devices.

GaN single crystal substrates are produced by slicing a GaN single crystal ingot in the planes parallel to the growing direction. Penetration dislocations which have been generated in the growing direction extend mainly in the bulk of the GaN substrate. A few of the threading dislocations appear on the surface of the GaN substrate. GaN substrates of low-dislocation density are obtained.

A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and facet valleys rooted upon the mask stripes, maintaining the facet hills and facet valleys, producing voluminous defect accumulating regions (H) accompanying the valleys, yielding low dislocation single crystal regions (Z) following the facets, making C-plane growth regions (Y) following flat tops between the facets, gathering dislocations on the facets into the valleys by the action of the growing facets, reducing dislocations in the low dislocation single crystal regions (Z) and the C-plane growth regions (Y), and accumulating the dislocations in cores (S) or interfaces (K) of the voluminous defect accumulating regions (H).

A GaN substrate comprises a GaN single crystal substrate, an AlxGa1-xN intermediate layer (0<x<=1) epitaxially grown on the substrate, and an GaN epitaxial layer grown on the intermediate layer. The intermediate layer is made of AlGaN and this AlGaN grows over the entire surface of the substrate with contaminants thereon and high dislocation regions therein. Thus, the intermediate layer is normally grown on the substrate, and a growth surface of the intermediate layer can be made flat. Since the growth surface is flat, a growth surface of the GaN epitaxial layer epitaxially grown on the intermediate layer is also flat.

An electronic device comprises a body including a single crystal region on a major surface of the body. The single crystal region has a hexagonal crystal lattice that is substantially lattice-matched to graphene, and a at least one epitaxial layer of graphene is disposed on the single crystal region. In a currently preferred embodiment, the single crystal region comprises multilayered hexagonal BN. A method of making such an electronic device comprises the steps of: (a) providing a body including a single crystal region on a major surface of the body. The single crystal region has a hexagonal crystal lattice that is substantially lattice-matched to graphene, and (b) epitaxially forming a at least one graphene layer on that region. In a currently preferred embodiment, step (a) further includes the steps of (a1) providing a single crystal substrate of graphite and (a2) epitaxially forming multilayered single crystal hexagonal BN on the substrate. The hexagonal BN layer has a surface region substantially lattice-matched to graphene, and step (b) includes epitaxially forming at least one graphene layer on the surface region of the hexagonal BN layer. Applications to FETs are described.

A monolithic integrated 3-axis accelerometer chip includes a single crystal substrate, the substrate including at least one single crystal membrane layer portion. A single sensor microstructure made from the single crystal membrane senses acceleration in each of the three orthogonal directions. At least one electronic circuit can also be disposed on the chip, such as a circuit for driving, detecting, controlling and signal processing.

The present invention provides a silicon carbide substrate, an epitaxial layer provided substrate, a semiconductor device, and a method for manufacturing the silicon carbide substrate, each of which achieves reduced on-resistance. The silicon carbide substrate is a silicon carbide substrate having a main surface, and includes: a SiC single-crystal substrate formed in at least a portion of the main surface; and a base member disposed to surround the SiC single-crystal substrate. The base member includes a boundary region and a base region. The boundary region is adjacent to the SiC single-crystal substrate in a direction along the main surface, and has a crystal grain boundary therein. The base region is adjacent to the SiC single-crystal substrate in a direction perpendicular to the main surface, and has an impurity concentration higher than that of the SiC single-crystal substrate.

A process for selectively freeing an epitaxial layer from a single crystal substrate upon which it was grown, by providing a first substrate; depositing a separation layer on the first substrate; depositing on the separation layer a sequence of layers of semiconductor material forming a solar cell; mounting and bonding a thin flexible support having a coefficient of thermal expansion substantially greater than that of the adjacent semiconductor material on top of the sequence of layers at an elevated temperature; and etching the separation layer while the temperature of the support and layers of semiconductor material decrease, so that the support and the attached layer curls away from the first substrate in view of their differences in coefficient of thermal expansion, so as to remove the epitaxial layer from the substrate.

A polycrystalline Si thin film and a single crystal Si thin film are formed on an SiO2 film deposited on an insulating substrate. A polycrystalline Si layer is grown by thermally crystallizing an amorphous Si thin film so as to form the polycrystalline Si thin film. A single crystal Si substrate, having (a) an SiO2 film thereon and (b) a hydrogen ion implantation portion therein, is bonded to an area of the polycrystalline Si thin film that has been subjected to etching removal, and is subjected to a heating process. Then, the single crystal Si substrate is divided at the hydrogen ion implantation portion in an exfoliating manner, so as to form the single crystal Si thin film. As a result, it is possible to provide a large-size semiconductor device, having the single crystal Si thin film, whose property is stable, at a low cost.

According to the present invention, there is provided a manufacturing method of a strained Si substrate including at least steps of: forming a lattice-relaxed SiGe layer on a silicon single crystal substrate; flattening a surface of the SiGe layer by CMP; and forming a strained Si layer on the surface of the flattened SiGe layer, wherein the method comprises steps of: subjecting the surface of the SiGe layer to SC1 cleaning, before forming the strained Si layer on the lattice-relaxed SiGe layer surface that is flattened; heat-treating the substrate having the SiGe layer after being subjected to SC1 cleaning in a hydrogen-containing atmosphere at 800° C. or higher; immediately forming a protective Si layer on the SiGe layer surface on the heat-treated substrate, without lowering the temperature below 800° C. after the heat treatment; and forming the strained Si layer on the surface of the protective Si layer at a temperature lower than the temperature of forming the protective Si layer. Thereby, a manufacturing method of a strained Si substrate having low surface roughness, threading dislocation density and low particle level can be provided.

A semiconductor device includes a single crystal substrate and a dielectric layer overlying the substrate. The dielectric layer includes at least one opening having a first portion and an overlying second portion. The first portion has a depth and width, such that an aspect ratio of the depth to width is greater than one. The semiconductor device further includes a first material having a first portion and a second portion, the first portion of the first material filling the first portion of the at least one opening. Defects for relaxing strain at an interface between the first material and the substrate material exist only within the first portion of the first material due to the aspect ratio being greater than one. The second portion of the first material is substantially defect free. Furthermore, the second portion of the first material and an overlying second material different than the first material fill the overlying second portion of the at least one opening. The second material has a thickness which is less than a critical thickness to maintain the second material in a strained state. The strained second material functions as a channel for charge carriers.

A semiconductor device includes a single crystal substrate and a dielectric layer overlying the substrate. The dielectric layer includes at least one opening having a first portion and an overlying second portion. The first portion has a depth and width, such that an aspect ratio of the depth to width is greater than one. The semiconductor device further includes a first material having a first portion and a second portion, the first portion of the first material filling the first portion of the at least one opening. Defects for relaxing strain at an interface between the first material and the substrate material exist only within the first portion of the first material due to the aspect ratio being greater than one. The second portion of the first material is substantially defect free. Furthermore, the second portion of the first material and an overlying second material different than the first material fill the overlying second portion of the at least one opening. The second material has a thickness which is less than a critical thickness to maintain the second material in a strained state. The strained second material functions as a channel for charge carriers.

GaN single crystal substrates are produced by slicing a GaN single crystal ingot in the planes parallel to the growing direction. Penetration dislocations which have been generated in the growing direction extend mainly in the bulk of the GaN substrate. A few of the threading dislocations appear on the surface of the GaN substrate. GaN substrates of low-dislocation density are obtained.

An n-type GaN substrate having a safe n-type dopant instead of Si which is introduced by perilous silane gas. The safe n-dopant is oxygen. An oxygen doped n-type GaN free-standing crystal is made by forming a mask on a GaAs substrate, making apertures on the mask for revealing the undercoat GaAs, growing GaN films through the apertures of the mask epitaxially on the GaAs substrate from a material gas including oxygen, further growing the GaN film also upon the mask for covering the mask, eliminating the GaAs substrate and the mask, and isolating a freestanding GaN single crystal. The GaN is an n-type crystal having carriers in proportion to the oxygen concentration.

The method of making a GaN single crystal substrate comprises a mask layer forming step of forming on a GaAs substrate 2 a mask layer 8 having a plurality of opening windows 10 disposed separate from each other; and an epitaxial layer growing step of growing on the mask layer 8 an epitaxial layer 12 made of GaN.

The invention relates to a method for the production of a monocrystalline layer on a substrate with a non-adapted lattice. To this end, a monocrystalline substrate with a buried amply defective layer and a monocrystalline layer produce thereon are used. The buried amply defective layer can be produced by hydrogen implantation.

A single crystal substrate and method of fabricating the same are provided. The single crystal substrate includes an insulator having a window exposing a portion of a substrate, a selective epitaxial growth layer formed on the portion of the substrate exposed through the window and a single crystalline layer formed on the insulator and the selective epitaxial growth layer using the selective epitaxial growth layer as an epitaxial seed layer.

A self-standing gallium nitride-based semiconductor single crystal substrate has a surface (Ga-face) mirror-polished, and a rear surface (N-face) having an arithmetic mean roughness Ra of 1 micrometer or more and 10 micrometers or less. A nitride semiconductor device is fabricated such that, before the gallium nitride-based semiconductor single crystal substrate is attached to a substrate holder of a vapor phase growth apparatus, the substrate is adjusted such that its rear surface (N-face) has a arithmetic mean roughness Ra to be in face-to-face contact with the substrate holder.

According to the present invention, there is provided an SiC epitaxial wafer which reduces triangular defects and stacking faults, which is highly uniform in carrier concentration and film thickness, and which is free of step bunching, and its method of manufacture. The SiC epitaxial wafer of the present invention is an SiC epitaxial wafer in which an SiC epitaxial layer is formed on a 4H—SiC single crystal substrate that is tilted at an off angle of 0.4°-5°, wherein the density of triangular-shaped defects of said SiC epitaxial layer is 1 defect / cm2 or less.

In a method of manufacturing a piezoelectric device, a compressive stress film is formed on a back surface of a piezoelectric single crystal substrate opposite to a surface on an ion-implanted side. The compressive stress film compresses the surface on the ion-implanted side of the piezoelectric single crystal substrate. The compressive stress produced by the compressive stress film is applied to half of the piezoelectric single crystal substrate on the ion-implanted side with respect to the center line of the thickness of the piezoelectric single crystal substrate to prevent the piezoelectric single crystal substrate from warping. A supporting substrate is then bonded to the surface of a bonding film on the flat piezoelectric single crystal substrate. The joined body of the piezoelectric single crystal substrate and the supporting substrate is then heated to initiate isolation at the ion-implanted portion as the isolation plane.

A MOS or CMOS based photoconductor on active pixel image sensor. Thin layers of semi-conductor material, doped to PIN or NIP photoconducting layers, located above MOS and / or CMOS pixel circuits produce an array of layered photodiodes. Positive and negative charges produced in the layered photodiodes are collected and stored as electrical charges in the MOS and / or CMOS pixel circuits. The present invention also provides additional MOS or CMOS circuits for reading out the charges and for converting the charges into images. With the layered photodiode of each pixel fabricated as continuous layers of charge generating material on top of the MOS and / or CMOS pixel circuits, extremely small pixels are possible with almost 100 percent packing factors. MOS and CMOS fabrication techniques permit sensor fabrication at very low costs. In preferred embodiments all of the sensor circuits are incorporated on or in a single crystalline substrate along with the sensor pixel circuits. Techniques are disclosed for tailoring the spectral response of the sensor for particular applications.

A process for selectively freeing an epitaxial layer from a single crystal substrate upon which it was grown, by providing a first substrate; depositing a separation layer on said first substrate; depositing on said separation layer a sequence of layers of semiconductor material forming a solar cell; mounting and bonding a surrogate substrate on top of the sequence of layers; attaching a connecting link element to at least two opposed points on the periphery of the surrogate substrate; and etching said separation layer while applying tension to said link element so as to remove said epitaxial layer from said first substrate.

A light emitting device having a phosphor substrate, which comprises nitride containing at least one element selected from Group XIII (IUPAC 1989) having a general formula XN, wherein X is at least one element selected from B, Al, Ga and In, a general formula XN:Y, wherein X is at least one element selected from B, Al, Ga and In, and Y is at least one element selected from Be, Mg, Ca, Sr, Ba, Zn, Cd and Hg, or a general formula XN:Y,Z, wherein X is at least one element selected from B, Al, Ga and In, Y is at least one element selected from Be, Mg, Ca, Sr, Ba, Zn, Cd and Hg, and Z is at least one element selected from C, Si, Ge, Sn, Pb, O and S. The phosphor substrate is prepared by crystallization from supercritical ammonia-containing solution and the light emitting device is formed by a vapor phase growth on the phosphor substrate so as to obtain a light emitting device which has a wavelength distribution emitting a white light etc. and a good yield.

A grating based line narrowing unit for gas discharge lasers with increased beam expansion to produce smaller bandwidths. The grating has a grating surface larger than 100 cm.sup.2 and is a replica grating produced from a master grating produced with a lithography process on a single crystal substrate. In preferred embodiments, a beam from the chamber of the laser is expanded with four prism beam expanders. The large grating, much larger than gratings historically produced from diamond lined gratings, permit substantial reductions in bandwidth while maintaining laser efficiency. A narrow band of wavelengths in the expanded beam is reflected from a grating in a Littrow configuration back via the bi-directional beam expanders into the laser chamber for amplification.

It is an object of the present invention to provide a manufacturing method of a single crystal substrate and to provide an internal modified layer-forming single crystal member, each of which is capable of easily manufacturing a relatively large and thin single crystal substrate. The manufacturing method of a single crystal substrate includes: the step of arranging a condensing lens (15), which emits laser beams (B) and corrects aberration caused by a refractive index of a single crystal member (10), contactlessly on the single crystal member (10); the step of irradiating the laser beams onto a surface (10t) of the single crystal member (10), and condensing the laser beams into an inside of the single crystal member; the step of moving the condensing lens (15) and the single crystal member (10) relatively to each other, and forming a two-dimensional modified layer (12) in the inside of the single crystal member (10); and the step of exfoliating a single crystal layer, which is formed by being divided by the modified layer (12), from the modified layer (12), thereby forming a single crystal substrate.

A compound semiconductor substrate which inhibits the generation of a crack or a warp and is preferable for a normally-off type high breakdown voltage device, arranged that a multilayer buffer layer 2 in which AlxGa1-xN single crystal layers (0.6≦X≦1.0) 21 containing carbon from 1×1018 atoms / cm3 to 1×1021 atoms / cm3 and AlyGa1-yN single crystal layers (0.1≦y≦0.5) 22 containing carbon from 1×1017 atoms / cm3 to 1×1021 atoms / cm3 are alternately and repeatedly stacked in order, and a nitride active layer 3 provided with an electron transport layer 31 having a carbon concentration of 5×1017 atoms / cm3 or less and an electron supply layer 32 are deposited on a Si single crystal substrate 1 in order. The carbon concentrations of the AlxGa1-xN single crystal layers 21 and that of the AlyGa1-yN single crystal layers 22 respectively decrease from the substrate 1 side towards the above-mentioned active layer 3 side. In this way, the compound semiconductor substrate is produced.

Semiconductor structures and devices based thereon include an aluminum nitride single-crystal substrate and at least one layer epitaxially grown thereover. The epitaxial layer may comprise at least one of AlN, GaN, InN, or any binary or tertiary alloy combination thereof, and have an average dislocation density within the semiconductor heterostructure is less than about 106 cm−2.