D D D D D D D D D: Description

UCC25705, UCC25706, UCC35705, UCC35706
HIGHSPEED VOLTAGE MODE PULSE WIDTH MODULATOR

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

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D Greater Than 4-MHz Operation
D Integrated Oscillator / Voltage Feed Forward
Compensation
D >4:1 Input Voltage Range
D 25-ns Current Limit Delay
D Programmable Maximum Duty Cycle Clamp
D Optocoupler Interface
D 50-A Start-Up Current
D 4.2-mA Operating Current @ 1 MHz
D Smallest Footprint of the 8-pin MSOP
Package Minimizes Board Area and Height

description
The UCC35705 and UCC35706 devices are 8-pin voltage mode primary side controllers with fast over-current
protection. These devices are used as core high-speed building blocks in high performance isolated and non-isolated
power converters.
UCC35705/UCC35706 devices feature a high speed oscillator with integrated feed-forward compensation for
improved converter performance. A typical current sense to output delay time of 25 ns provides fast response to
overload conditions. The IC also provides an accurate programmable maximum duty cycle clamp for increased
protection which can also be disabled for the oscillator to run at maximum possible duty cycle.
Two UVLO options are offered. The UCC35705 with lower turn-on voltage is intended for dc-to-dc converters while
the higher turn-on voltage and the wider UVLO range of the UCC35706 is better suited for offline applications.
The UCC35705/UCC35706 family is offered in 8-pin MSOP (DGK), SOIC (D) and PDIP (P) packages.
typical application schematic
UDG-99181
VDD
OUT
GND
RC
ILIM
VFF
DISCH
UCC35705/6
+
V
OUT
+
V
IN
SOFT
START
CIRCUIT
4
5
3
6
8
7
1
TPS2829
FB 2
MODE = 1
FET DRIVER
Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
ILIM
FB
VFF
DISCH
VDD
OUT
GND
RC
D, OR P PACKAGE
(TOP VIEW)
ILIM
2
1
4
3
7
8
5
6
FB
VFF
DISCH
VDD
OUT
GND
RC
DGK PACKAGE
(TOP VIEW)
UCC25705, UCC25706, UCC35705, UCC35706


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absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage 15 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage (VFF,RC,ILIM) 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage (FB) 15 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current (DISCH) 1 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current (OUT) dc 20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature, T
stg
65C to 150C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction temperature, T
J
55C to 150C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature (soldering, 10 sec.) 300C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Power
Supply Control Data Book (TI Literature Number SLUD003) for thermal limitations and considerations of packages.
AVAILABLE OPTIONS
Packaged Devices
T
A
= T
J
UVLO Option
SOIC-8
Small Outline (D)
PDIP-8
Plastic Dip (P)
MSOP-8
Small Outline
(DGK)
40C to 85C
8.8V/8V UCC25705D UCC25705P UCC25705DGK
40C to 85C
12V/8V UCC25706D UCC25706P UCC25706DGK
0C to 70C
8.8V/8V UCC35705D UCC35705P UCC35705DGK
0C to 70C
12V/8V UCC35706D UCC35706P UCC35706DGK
D (SOIC8) and DGK (MSOP8) packages are available taped and reeled. Add R suffix to device type (e.g.
UCC35705DR) to order quantities of 2500 devices per reel for SOIC-8 and 2000 devices per reel for the MSOP-8.
electrical characteristics, V
DD
= 11 V, V
IN
= 30 V, R
T
= 47 k, R
DISCH
= 400 k, R
FF
= 14 k, C
T
= 220 pF,
C
VDD
= 0.1 F, and no load on the outputs, 0C T
A
70C for the UCC3570x and 40C T
A
85C
for the UCC2570x, T
A
= T
J
, (unless otherwise specified)
UVLO section (UCCx5705)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Start threshold 8.0 8.8 9.6 V
Stop threshold 7.4 8.2 9.0 V
Hysteresis 0.3 0.6 1.0 V
UVLO section (UCCx5706)
Start threshold 11.2 12.0 12.8 V
Stop threshold 7.2 8.0 8.8 V
Hysteresis 3.5 4.0 4.5 V
supply current section
Start-up current V
DD
= UVLO start 1 V, V
DD
comparator off 30 90 A
I
DD
active V
DD
comparator on, oscillator running at 1 MHz 4.2 5.0 mA
UCC25705, UCC25706, UCC35705, UCC35706


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electrical characteristics, V
DD
= 11 V, V
IN
= 30 V, R
T
= 47 k, R
DISCH
= 400 k, R
FF
= 14 k, C
T
= 220 pF,
C
VDD
= 0.1 F, and no load on the outputs, 0C T
A
70C for the UCC3570x and 40C T
A
85C
for the UCC2570x, T
A
= T
J
, (unless otherwise specified)
line sense section
Low line comparator threshold 0.95 1.00 1.05 V
Input bias current (VFF) 100 100 nA
oscillator section
Frequency VFF = 1.2 V to 4.8 V 0.9 1.0 1.1 MHz
CT peak oltage
VFF = 1.2 V, See Note 1 1.2 V
CT peak voltage
VFF = 4.8 V, See Note 1 4.8 V
CT valley voltage See Note 1 0 V
NOTE 1: Ensured by design. Not production tested.
current limit section
Input bias current 0.2 0.2 1 A
Current limit threshold 180 200 220 mV
Propagation delay, ILIM to OUT 50 mV overdrive 25 35 ns
pulse width modulator section
FB input impedance V
FB
= 3 V 30 50 90 k
Minimum duty cycle V
FB
< 2 V 0 %
Ma im m d t c cle
V
FB
= V
DD
, F
OSC
= 1 MHz 70 75 80 %
Maximum duty cycle
V
DISCH
= 0 V, F
OSC
= 1 MHz 93 %
PWM gain VFF = 2.5 V, MODE = 1 12 %/V
Propagation delay, PWM to OUT 65 120 ns
output section
VOH I
OUT
= 5 mA, V
DD
output 0.3 0.6 V
VOL I
OUT
= 5 mA 0.15 0.4 V
Rise time C
LOAD
= 50 pF 10 25 ns
Fall time C
LOAD
= 50 pF 10 25 ns
UCC25705, UCC25706, UCC35705, UCC35706


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pin descriptions
DISCH: A resistor to VIN sets the oscillator discharge current programming a maximum duty cycle. When grounded,
an internal comparator switches the oscillator to a quick discharge mode. A small 100-pF capacitor between DISCH
and GND may reduce oscillator jitter without impacting feed-forward performance. I
DISCH
must be between 25 A
and 250 A over the entire V
IN
range.
FB: Input to the PWM comparator. This pin is intended to interface with an optocoupler. Input impedance is 50-k
typical.
GND: Ground return pin.
ILIM: Provides a pulse-by-pulse current limit by terminating the PWM pulse when the input is above 200 mV. This
provides a high speed (25 ns typical) path to reset the PWM latch, allowing for a pulse-by-pulse current limit.
OUT: The output is intended to drive an external FET driver or other high impedance circuits, but is not intended to
directly drive a power MOSFET. This improves the controllers noise immunity. The output resistance of the PWM
controller, typically 60 pull-up and 30 pull-down, will result in excessive rise and fall times if a power MOSFET
is directly driven at the speeds for which the UCC35705/6 is optimized.
RC: The oscillator can be configured to provide a maximum duty cycle clamp. In this mode the ontime is set by RT
and CT, while the off-time is set by RDISCH and CT. Since the voltage ramp on CT is proportional to VIN, feed-forward
action is obtained. Since the peak oscillator voltage is also proportional to VIN, constant frequency operation is
maintained over the full power supply input range. When the DISCH pin is grounded, the duty cycle clamp is disabled.
The RC pin then provides a low impedance path to ground CT during the off time.
VDD: Power supply pin. This pin should be bypassed with a 0.1-F capacitor for proper operation. The undervoltage
lockout function of the UCC35705/6 allows for a low current startup mode and ensures that all circuits become active
in a known state. The UVLO thresholds on the UCC35705 are appropriate for a dc-to-dc converter application. The
wider UVLO hysteresis of the UCC35706 (typically 4 V) is optimized for a bootstrap startup mode from a high
impedance source.
VFF: The feed-forward pin provides the controller with a voltage proportional to the power supply input voltage. When
the oscillator is providing a duty cycle clamp, a current of 2 I
DISCH
is sourced from the VFF pin. A single resistor
RFF between VFF and GND then set VFF to:
VFF [VIN
2 R
FF
2 R
FF
)R
DISCH
When the DISCH pin is grounded and the duty cycle clamp is not used, the internal current source is disabled and
a resistor divider from VIN is used to set VFF. In either case, when the voltage on VFF is less than 1.0 V, both the
output and oscillator are disabled.
UCC25705, UCC25706, UCC35705, UCC35706


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pin descriptions (continued)
7
2
5
8
OUT
VDD
6 GND
S Q
Q RD
RD
RD
1 ILIM
200 mV
CURRENT LIMIT
1 pF 20 k
30 k
+
0.7 V
PWM
S Q
Q RD
CLK
PWM
LATCH
100 mV
2 * I (MODE=1)
0 (MODE = 0)
LOW LINE
1.0 V
30 * I (MODE=1)
80 (MODE = 0)
I
RC
VFF
FB
3
DISCH 4
50 mV
VDD
MODE
UCC35705 (8.8 V/8 V)
UCC35706 (12 V/8 V)
UVLO
+
Figure 1. Block Diagram

FUNCTIONAL DESCRIPTION
oscillator and PWM
The oscillator can be programmed to provide a duty cycle clamp or be configured to run at the maximum possible
duty cycle.
The PWM latch is set during the oscillator discharge and is reset by the PWM comparator when the C
T
waveform
is greater than the feedback voltage. The voltage at the FB pin is attenuated before it is applied to the PWM
comparator. The oscillator ramp is shifted by approximately 0.65-V at room temperature at the PWM comparator. The
offset has a temperature coefficient of approximately 2 mV/C.
The ILIM comparator adds a pulse by pulse current limit by resetting the PWM latch when V
ILIM
> 200 mV. The PWM
latch is also reset by a low line condition (V
FF
<1.0 V).
All reset conditions are dominant; asserting any output will force a zero duty cycle output.
oscillator with duty cycle clamp (MODE = 1)
The timing capacitor CT is charged from ground to VFF through RT. The discharge path is through an on-chip current
sink that has a value of 30 I
DISCH
, where I
DISCH
is the current through the external resistor RDISCH. Since the
charge and discharge currents are both proportional to VIN, their ratio, and the maximum duty cycle remains constant
as VIN varies.
UCC25705, UCC25706, UCC35705, UCC35706


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4 5
RC DISCH
3
VFF
R
FF
2 * I
DISCH
R
DISCH
R
T
C
T
V
IN
30 * I
DISCH
VDD
I
DISCH
Figure 2. Duty Cycle Clamp (MODE = 1)
The on-time is approximately:
T
ON
+TR
T
C
T
where T+
V
FF
V
IN
[
2 R
FF
R
DISCH
The off-time is:
T
OFF
+T
C
T
R
T
R
DISCH
30
R
T
*R
DISCH
The frequency is:

f +
1
TR
T
C
T

1
1 )
R
DISCH
30R
T
*R
DISCH
The maximum duty cycle is:

Duty Cycle +
T
ON
T
ON
)T
OFF
+1 *
R
DISCH
30 R
T
UCC25705, UCC25706, UCC35705, UCC35706



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component selection for oscillator with duty cycle clamp (MODE = 1)
For a power converter with the following specifications:
D V
IN(min)
= 18 V
D V
IN(max)
= 75 V
D V
IN(shutdown)
= 15 V
D F
OSC
= 1 MHz
D D
MAX
= 0.78 at V
IN(min)
In this mode, the on-time is approximately:
D T
ON(max)
= 780 ns
D T
OFF(min)
= 220 ns
D V
FF(min)
=
18
15
= 1.20 V
(1) Pick C
T
= 220 pF.
(2) Calculate R
T
.
R
T
+
V
IN
min
T
ON(max)
V
FF
min
C
T
R
T
= 51.1 k
(3) R
DISCH
R
DISCH
+
30 R
T
1 )
V
FF(min)
V
IN(min)
R
T
C
T
T
OFF(min)
R
DISCH
= 383 k.
I
DISCH
must be between 25 A and 250 A over the entire VIN range.
With the calculated values, I
DISCH
ranges from 44 A to 193 A, within the allowable range. If I
DISCH
is too high, C
T
must be decreased.
(4) R
FF
R
FF
+
V
FF(min)
R
DISCH
2
V
IN(min)
*1
The nearest 1% standard value to the calculated value is 13.7 k.

UCC25705, UCC25706, UCC35705, UCC35706


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oscillator without duty cycle clamp (MODE = 0)
In this mode, the timing capacitor is discharged through a low impedance directly to ground. The DISCH pin is
externally grounded. A comparator connected to DISCH senses the ground connection and disables both the
discharge current source and VFF current source. A resistor divider is now required to set VFF.
4 5
RC DISCH
3 VFF
R
T
C
T
V
IN
Figure 3. Ocsillator Without Clamp (MODE = 0)
In this mode, the on-time is approximately:
T
ON
+TR
T
C
T
where T+
V
FF
V
IN
The off-time is:
T
OFF
[75 ns
The frequency is:
f +
1
TR
T
C
T
)75 ns
UCC25705, UCC25706, UCC35705, UCC35706


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component selection for oscillator without duty cycle clamp (MODE = 0)
For a power converter with the following specifications:
D V
IN(min)
= 18 V
D V
IN(max)
= 75 V
D V
IN(shutdown)
= 15 V
D F
OSC
= 1 MHz
With these specifications,
V
FF(min)
+
18
15
+1.2 V
(1) Pick C
T
= 220 pF
(2) Calculate R
T
.
R
T
+
V
IN(min)
V
FF(min)
1
F
OSC
*75 ns
C
T
TYPICAL CHARACTERISTICS
Figure 4
50 25 0 25 50 75 100 125
Temperature
8.0
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
UCC35705 UVLO THRESHOLDS
vs
TEMPERATURE
C
U
V
L
O

T
h
r
e
s
h
o
l
d
s

V
Figure 5
50 25 0 25 50 75 100 125
Temperature
7
8
9
10
11
12
13
C
U
V
L
O

T
h
r
e
s
h
o
l
d
s

V
UCC35706 UVLO THRESHOLDS
vs
TEMPERATURE
UCC25705, UCC25706, UCC35705, UCC35706


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Figure 6
50 25 0 25 50 75 100 125
Temperature
3.8
4.0
4.2
4.3
4.5
4.7
4.8
3.9
4.1
4.4
4.6
C
I
D
D

m
A
OPERATING CURRENT (AT 1mHz)
vs
TEMPERATURE
Figure 7
50 25 0 25 50 75 100 125
Temperature
0.65
0.97
0.99
1.00
1.02
1.04
1.05
0.96
0.98
1.01
1.03
C
L
o
w
-
L
i
n
e

T
h
r
e
s
h
o
l
d

V
LOW-LINE THRESHOLD
vs.
TEMPERATURE
Figure 8
50 25 25 50 75 100 125
Temperature
0.90
1.00
1.10
0.95
1.05
O
s
c
i
l
l
a
t
o
r

F
r
e
q
u
e
n
c
y

M
H
z
OSCILLATOR FREQUENCY
vs
TEMPERATURE
C
0
Figure 9
50 25 0 25 50 75 100 125
Temperature
68
76
82
70
78
72
74
80
C
P
r
o
g
r
a
m
m
a
b
l
e

M
a
x
i
m
u
m

D
u
t
y

C
y
c
l
e

%
PROGRAMMABLE MAXIMUM
DUTY CYCLE
vs
TEMPERATURE
UCC25705, UCC25706, UCC35705, UCC35706


11
www.ti.com
Figure 10
50 25 0 25 50 75 100 125
Temperature
180
200
220
185
205
190
195
210
215
C
C
u
r
r
e
n
t
-
L
i
m
i
t

T
h
r
e
s
h
o
l
d

m
V
CURRENT-LIMIT THRESHOLD
vs
TEMPERATURE
Figure 11
50 25 0 25 50 75 100 125
Temperature
15
25
35
17
29
19
23
31
33
21
27
C
C
u
r
r
e
n
t
-
L
i
m
i
t

P
r
o
p

D
e
l
a
y

n
s
CURRENT-LIMIT PROP DELAY
vs
TEMPERATURE
UCC25705, UCC25706, UCC35705, UCC35706


12
www.ti.com
MECHANICAL DATA
Detailed package drawing for MSOP-8 (DGK) is shown below. For SOIC-8 (D) and PDIP-8 (P) package drawings,
consult Packaging Section of the Power Supply Control Data Book (TI Literature Number SLUD003).
DGK (MSOP-8) MINI SMALL OUTLINE PACKAGE
0,69
0,41
0,25
0,15 NOM
Gage Plane
4073329/B 04/98
4,98
0,25
5
3,05
4,78 2,95
8
4
3,05
2,95
1
0,38
1,07 MAX
Seating Plane
0,65 M 0,25
06
0,10
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-187
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
UCC25705D ACTIVE SOIC D 8 75 None CU NIPDAU Level-1-220C-UNLIM
UCC25705DGK ACTIVE MSOP DGK 8 80 None CU NIPDAU Level-1-220C-UNLIM
UCC25705DGKTR ACTIVE MSOP DGK 8 2500 None CU NIPDAU Level-1-220C-UNLIM
UCC25705DTR ACTIVE SOIC D 8 2500 None CU NIPDAU Level-1-220C-UNLIM
UCC25705P ACTIVE PDIP P 8 50 Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
UCC25705PG4 ACTIVE PDIP P 8 50 None Call TI Call TI
UCC25706DGK ACTIVE MSOP DGK 8 80 None CU NIPDAU Level-1-220C-UNLIM
UCC25706DGKTR ACTIVE MSOP DGK 8 2500 None CU NIPDAU Level-1-220C-UNLIM
(RoHS)
UCC25706PG4 ACTIVE PDIP P 8 50 None Call TI Call TI
UCC35705DGK ACTIVE MSOP DGK 8 80 None CU SNPB Level-1-220C-UNLIM
UCC35705DGKTR ACTIVE MSOP DGK 8 2500 None CU SNPB Level-1-220C-UNLIM
(RoHS)
UCC35706DGK ACTIVE MSOP DGK 8 100 None CU SNPB Level-1-220C-UNLIM
UCC35706DGKTR ACTIVE MSOP DGK 8 2500 None CU SNPB Level-1-220C-UNLIM
(RoHS)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
PACKAGE OPTION ADDENDUM
www.ti.com 11-Mar-2005
Addendum-Page 1
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 11-Mar-2005
Addendum-Page 2
MECHANICAL DATA
MPDI001A JANUARY 1995 REVISED JUNE 1999
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE
8
4
0.015 (0,38)
Gage Plane
0.325 (8,26)
0.300 (7,62)
0.010 (0,25) NOM
MAX
0.430 (10,92)
4040082/D 05/98
0.200 (5,08) MAX
0.125 (3,18) MIN
5
0.355 (9,02)
0.020 (0,51) MIN
0.070 (1,78) MAX
0.240 (6,10)
0.260 (6,60)
0.400 (10,60)
1
0.015 (0,38)
0.021 (0,53)
Seating Plane
M 0.010 (0,25)
0.100 (2,54)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
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D D D D D D D D D: Description

Uploaded by

D D D D D D D D D: Description

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UCC25705, UCC25706, UCC35705, UCC35706

HIGHSPEED VOLTAGE MODE PULSE WIDTH MODULATOR

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

Figure 1. Block Diagram

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

The frequency is:

The maximum duty cycle is:

UCC25705, UCC25706, UCC35705, UCC35706

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

The nearest 1% standard value to the calculated value is 13.7 k.

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

SLUS473A NOVEMBER 1999 REVISED MARCH 2001

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