Q551.1e La
Q551.1e La
Q551.1e La
Q551.1E
LA
18750_000_100413.eps
100921
©
Copyright 2010 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by ER-MB/EL 1069 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18754
2010-Oct-01
EN 2 1. Q551.1E LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0 Manual xxxx xxx xxxx.3
• First release. • All chapters: added CTNs to the manual, see Table 2-1.
Manual xxxx xxx xxxx.1 • Chapter 5: added UART logging section 5.8.8.
• All chapters: layout changes. • Chapter 5: added SSB start-up diagram Figure 5-13.
• Chapter 7: added SSB Cell layout drawings.
• Chapter 10: added SRP list drawings. Manual xxxx xxx xxxx.4
• All chapters: added CTNs to the manual, see Table 2-1.
Manual xxxx xxx xxxx.2 • Chapter 5: added section 5.8.3 AV PIP.
• All chapters: added CTNs to the manual, see Table 2-1.
Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).
For on-line product support please use the CTN links in Table
2-1. Here is product information available, as well as getting
started, user manuals, frequently asked questions and
software & drivers.
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Technical Specifications, Diversity, and Connections Q551.1E LA 2. EN 3
SSB 2 4 7 9 10
Mecha-
nics Descriptions Schematics
B09 (non-DVBS-conn.)
B03 (DC/DC / Class D)
Connection Overview
Assembly Removal
B08 (DVBS-Supp.)
B11 (TCON-LGD)
B14 (TCON-SHP)
B02 (PNX85500)
B13 (Ambilight)
Wiring Diagram
3104 313 xxxxx
B07 (DVBS-FE)
Wire Dressing
B01 (Tuner)
AmbiLight
B05 (DDR)
B04 (I/O)
TCON
Tuner
PSU
CTN Styling
32PFL8605H/12 Monet 64064 2-2 4-2 4.7 7.2 7.5.1 7.11 7.12 9-1 10-1 10-11 10-16 10-20 10-24 10-28 10-32 - - - - 10-45 10-48 - -
11-1 64065 10-7 10-13 10-46
32PFL8605H/60 Monet 64064 2-2 4-2 4.7 7.2 7.5.1 7.11 7.12 9-1 10-1 10-11 10-16 10-20 10-24 10-28 10-32 - - - - 10-45 10-48 - -
11-1 64065 10-7 10-13 10-46
32PFL8605K/02 Monet 64015 2-2 4-2 4.7 7.2 7.5.1 7.11 7.12 9-1 10-1 10-11 10-16 10-20 10-24 10-28 10-32 - 10-38 10-40 - 10-46 10-50 - -
11-1 10-7 10-13
32PFL8605M/08 Monet 64065 2-2 4-2 4.7 7.2 7.5.1 7.11 7.12 9-1 10-1 10-11 10-16 10-20 10-24 10-28 10-32 - - - - 10-46 10-48 - -
11-1 10-7 10-13
32PFL9705H/12 Rubens 64502 2-3 4-3 4.8 7.2 7.5.1 7.11 7.12 9-5 10-3 - 10-18 10-22 10-25 10-30 10-32 - - - - - 10-52 10-55 10-67
11-5 64503 10-4 10-23 10-26 10-31 10-53 10-56
32PFL9705H/60 Rubens 64502 2-3 4-3 4.8 7.2 7.5.1 7.11 7.12 9-5 10-3 - 10-18 10-22 10-25 10-30 10-32 - - - - - 10-52 10-55 10-67
11-5 64503 10-4 10-23 10-26 10-31 10-53 10-56
32PFL9705K/02 Rubens 64532 2-3 4-3 4.8 7.2 7.5.1 7.11 7.12 9-5 10-3 - 10-18 10-22 10-25 10-30 10-32 - 10-39 10-41 - - 10-51 10-54 10-67
11-5 10-4
32PFL9705M/08 Rubens 64502 2-3 4-3 4.8 7.2 7.5.1 7.11 7.12 9-5 10-3 - 10-18 10-22 10-25 10-30 10-32 - - - - - 10-52 10-55 10-67
11-5 64503 10-4 10-23 10-26 10-31 10-53 10-56
37PFL8605H/12 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-2 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-2 64513 10-8 10-14 10-19 10-23 10-26 10-31 10-36
37PFL8605H/60 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-2 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-2 64513 10-8 10-14 10-19 10-23 10-26 10-31 10-36
37PFL8605K/02 Monet 64522 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-2 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-36 10-39 10-41 10-44 - - - -
11-2 10-8 10-14
37PFL8605M/08 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-2 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-2 64513 10-8 10-14 10-19 10-23 10-26 10-31 10-36
40PFL8605H/12 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-8 10-14 10-19 10-23 10-26 10-31 10-36
40PFL8605H/60 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-8 10-14 10-19 10-23 10-26 10-31 10-36
40PFL8605K/02 Monet 64522 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-36 10-39 10-41 10-44 - - - -
11-3 10-8 10-14
40PFL8605M/08 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-8 10-14 10-19 10-23 10-26 10-31 10-36
40PFL9705H/12 Rubens 64512 2-3 4-3 4.8 7.2 7.5.1 7.11 - 9-6 10-1 - 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - 10-68
11-6 64513 10-4 10-19 10-23 10-26 10-31 10-36
10-5
10-8
40PFL9705H/60 Rubens 64512 2-3 4-3 4.8 7.2 7.5.1 7.11 - 9-6 10-1 - 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - 10-68
11-6 64513 10-4 10-19 10-23 10-26 10-31 10-36
10-5
10-8
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EN 4 2. Q551.1E LA Technical Specifications, Diversity, and Connections
SSB 2 4 7 9 10
Mecha-
nics Descriptions Schematics
B09 (non-DVBS-conn.)
B03 (DC/DC / Class D)
Connection Overview
Assembly Removal
B08 (DVBS-Supp.)
B11 (TCON-LGD)
B14 (TCON-SHP)
B02 (PNX85500)
Wiring Diagram
B13 (Ambilight)
3104 313 xxxxx
B07 (DVBS-FE)
Wire Dressing
B01 (Tuner)
AmbiLight
B05 (DDR)
B04 (I/O)
TCON
Tuner
PSU
CTN Styling
40PFL9705K/02 Rubens 64522 2-3 4-3 4.8 7.2 7.5.1 7.11 - 9-6 10-1 - 10-18 10-22 10-25 10-30 10-32 10-36 10-39 10-41 10-44 - - - 10-68
11-6 10-4
10-5
10-8
40PFL9705M/08 Rubens 64512 2-3 4-3 4.8 7.2 7.5.1 7.11 - 9-6 10-1 - 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-6 64513 10-4 10-19 10-23 10-26 10-31 10-36
10-5
10-8
42PFL6805H/12 Manet 64731 2-1 4-1 4.6 7.2 7.5.1 - - 9-4 - - 10-17 10-21 10-27 10-29 10-33 - - - - 10-47 10-49 - -
11-4
42PFL6805H/60 Manet 64731 2-1 4-1 4.6 7.2 7.5.1 - - 9-4 - - 10-17 10-21 10-27 10-29 10-33 - - - - 10-47 10-49 - -
11-4
46PFL8605H/12 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-9 10-13 10-19 10-23 10-26 10-31 10-36
46PFL8605H/60 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-9 10-13 10-19 10-23 10-26 10-31 10-36
46PFL8605K/02 Monet 64522 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-36 10-39 10-41 10-44 - - - -
11-3 10-9 10-13
46PFL8605M/08 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-9 10-13 10-19 10-23 10-26 10-31 10-36
46PFL8685H/12 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-9 10-13 10-19 10-23 10-26 10-31 10-36
46PFL8685K/02 Monet 64522 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-36 10-39 10-41 10-44 - - - -
11-3 10-9 10-13
46PFL8685M/08 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-9 10-13 10-19 10-23 10-26 10-31 10-36
46PFL9705H/12 Rubens 64512 2-3 4-3 4.8 7.2 7.5.1 7.11 - 9-7 10-1 - 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - 10-69
11-7 64513 10-2 10-19 10-23 10-26 10-31 10-36
10-3
10-4
10-9
46PFL9705H/60 Rubens 64512 2-3 4-3 4.8 7.2 7.5.1 7.11 - 9-7 10-1 - 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - 10-69
11-7 64513 10-2 10-19 10-23 10-26 10-31 10-36
10-3
10-4
10-9
46PFL9705K/02 Rubens 64522 2-3 4-3 4.8 7.2 7.5.1 7.11 - 9-7 10-1 - 10-18 10-22 10-25 10-30 10-32 10-36 10-39 10-41 10-44 - - - 10-69
11-7 10-2
10-3
10-4
10-9
46PFL9705M/08 Rubens 64512 2-3 4-3 4.8 7.2 7.5.1 7.11 - 9-7 10-1 - 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-7 64513 10-2 10-19 10-23 10-26 10-31 10-36
10-3
10-4
10-9
52PFL8605H/12 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-9 10-13 10-19 10-23 10-26 10-31 10-36
52PFL8605H/60 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-9 10-13 10-19 10-23 10-26 10-31 10-36
52PFL8605K/02 Monet 64523 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-19 10-23 10-26 10-31 10-32 10-36 10-39 10-41 10-44 - - - -
11-3 10-9 10-13
52PFL8605M/08 Monet 64512 2-2 4-2 4.7 7.2 7.5.1 7.11 - 9-3 10-1 10-11 10-18 10-22 10-25 10-30 10-32 10-35 - - 10-43 - - - -
11-3 64513 10-9 10-13 10-19 10-23 10-26 10-31 10-36
58PFL9955H/12 Rubens 64523 2-3 4-4 4.9 7.2 7.5.1 7.11 - 9-8 10-1 10-11 10-19 10-23 10-26 10-31 10-32 10-36 10-39 10-41 10-44 - - - 10-70
21:9 10-9 10-14
11-8
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Technical Specifications, Diversity, and Connections Q551.1E LA 2. EN 5
2.3 Connections
SIDE CONNECTORS
REAR CONNECTORS
6 7 8 9
BOTTOM CONNECTORS 3
10 11 12 12 13 14 15 16
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EN 6 2. Q551.1E LA Technical Specifications, Diversity, and Connections
SIDE CONNECTORS
REAR CONNECTORS
5 6 7 8 9
BOTTOM CONNECTORS 3
10 11 12 12 13 14 15 16
18750_117_100423.eps
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NETWORK
2
VGA SD CARD
SERVICE DVI HDMI
UART AUDIO IN
6 5 7 8 14 9
3
BOTTOM CONNECTORS (optional)
10 11 12 12 13 17 15 16
18750_001_100414.eps
100916
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Technical Specifications, Diversity, and Connections Q551.1E LA 2. EN 7
GND
13 10000_025_090121.eps
10000_049_100210.eps 090121
100210
Figure 2-7 Ethernet connector
Figure 2-4 SD-Card connector
1 - TD+ Transmit signal k
1 - DAT3/CS Signal jk 2 - TD- Transmit signal k
2 - CMD/DI Signal k 3 - RD+ Receive signal j
3 - GND1 Gnd H 4 - CT Centre Tap: DC level fixation
4 - Vdd Supply k 5 - CT Centre Tap: DC level fixation
5 - CLOCK Signal k 6 - RD- Receive signal j
6 - GND2 Gnd H 7 - GND Gnd H
7 - DAT0/D0 Signal jk 8 - GND Gnd H
8 - DAT1/IRQ Signal jk
9 - DAT2/NC Signal jk
6 - EXT2: Video RGB - In, CVBS - In/Out, Audio - In/Out
10 - CD Signal j
11 - GND Gnd H 20 2
12 - WP Signal j
13 - GND Gnd H
21
14 - GND Gnd H 1
10000_001_090121.eps
090121
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EN 8 2. Q551.1E LA Technical Specifications, Diversity, and Connections
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Precautions, Notes, and Abbreviation List Q551.1E LA 3. EN 9
The third digit in the serial number (example: 3.4 Abbreviation List
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the 0/6/12 SCART switch control signal on A/V
specific TV set. In general, it is possible that the same TV
board. 0 = loop through (AUX to TV),
model on the market is produced with e.g. two different types
6 = play 16 : 9 format, 12 = play 4 : 3
of displays, coming from two different suppliers. This will then format
result in sets which have the same CTN (Commercial Type
AARA Automatic Aspect Ratio Adaptation:
Number; e.g. 28PW9515/12) but which have a different B.O.M.
algorithm that adapts aspect ratio to
number. remove horizontal black bars; keeps
By looking at the third digit of the serial number, one can
the original aspect ratio
identify which B.O.M. is used for the TV set he is working with.
ACI Automatic Channel Installation:
If the third digit of the serial number contains the number “1” algorithm that installs TV channels
(example: AG1B033500001), then the TV set has been
directly from a cable network by
manufactured according to B.O.M. number 1. If the third digit is
means of a predefined TXT page
a “2” (example: AG2B0335000001), then the set has been ADC Analogue to Digital Converter
produced according to B.O.M. no. 2. This is important for
AFC Automatic Frequency Control: control
ordering the correct spare parts!
signal used to tune to the correct
For the third digit, the numbers 1...9 and the characters A...Z frequency
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
AGC Automatic Gain Control: algorithm that
indicated by the third digit of the serial number.
controls the video input of the feature
box
Identification: The bottom line of a type plate gives a 14-digit AM Amplitude Modulation
serial number. Digits 1 and 2 refer to the production centre (e.g. AP Asia Pacific
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers AR Aspect Ratio: 4 by 3 or 16 by 9
to the Service version change code, digits 5 and 6 refer to the ASF Auto Screen Fit: algorithm that adapts
production year, and digits 7 and 8 refer to production week (in aspect ratio to remove horizontal black
example below it is 2006 week 17). The 6 last digits contain the bars without discarding video
serial number. information
ATSC Advanced Television Systems
MODEL : 32PF9968/10 MADE IN BELGIUM Committee, the digital TV standard in
220-240V ~ 50/60Hz the USA
128W
ATV See Auto TV
PROD.NO: AG 1A0617 000001 VHF+S+H+UHF
Auto TV A hardware and software control
S BJ3.0E LA system that measures picture content,
and adapts image parameters in a
10000_024_090121.eps dynamic way
100105
AV External Audio Video
AVC Audio Video Controller
Figure 3-1 Serial number (example)
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
3.3.7 Board Level Repair (BLR) or Component Level Repair carrier distance is 5.5 MHz
(CLR) BDS Business Display Solutions (iTV)
BLR Board-Level Repair
If a board is defective, consult your repair procedure to decide BTSC Broadcast Television Standard
if the board has to be exchanged or if it should be repaired on Committee. Multiplex FM stereo sound
component level. system, originating from the USA and
If your repair procedure says the board should be exchanged used e.g. in LATAM and AP-NTSC
completely, do not solder on the defective board. Otherwise, it countries
cannot be returned to the O.E.M. supplier for back charging! B-TXT Blue TeleteXT
C Centre channel (audio)
3.3.8 Practical Service Precautions CEC Consumer Electronics Control bus:
remote control bus on HDMI
• It makes sense to avoid exposure to electrical shock. connections
While some sources are expected to have a possible CL Constant Level: audio output to
dangerous impact, others of quite high potential are of connect with an external amplifier
limited current and are sometimes held in less regard. CLR Component Level Repair
• Always respect voltages. While some may not be ComPair Computer aided rePair
dangerous in themselves, they can cause unexpected CP Connected Planet / Copy Protection
reactions that are best avoided. Before reaching into a CSM Customer Service Mode
powered TV set, it is best to test the high voltage insulation. CTI Color Transient Improvement:
It is easy to do, and is a good service precaution. manipulates steepness of chroma
transients
CVBS Composite Video Blanking and
Synchronization
DAC Digital to Analogue Converter
DBE Dynamic Bass Enhancement: extra
low frequency amplification
DCM Data Communication Module. Also
referred to as System Card or
Smartcard (for iTV).
DDC See “E-DDC”
D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz
DFI Dynamic Frame Insertion
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Precautions, Notes, and Abbreviation List Q551.1E LA 3. EN 11
DFU Directions For Use: owner's manual SDI), is a digitized video format used
DMR Digital Media Reader: card reader for broadcast grade video.
DMSD Digital Multi Standard Decoding Uncompressed digital component or
DNM Digital Natural Motion digital composite signals can be used.
DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,
reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.
DST Dealer Service Tool: special remote ITV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A “key” encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a “snow vision” mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP “software key” VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I2 C Inter IC bus software upgrade via RF transmission.
I2 D Inter IC Data bus Upgrade software is broadcasted in
I2 S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body PAL Phase Alternating Line. Color system
subcommittee of the International mainly used in West Europe (color
Telecommunication Union relating to carrier= 4.433619 MHz) and South
radio communication. ITU-656 (a.k.a. America (color carrier PAL M=
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EN 12 3. Q551.1E LA Precautions, Notes, and Abbreviation List
3.575612 MHz and PAL N= 3.582056 SVHS Super Video Home System
MHz) SW Software
PCB Printed Circuit Board (same as “PWB”) SWAN Spatial temporal Weighted Averaging
PCM Pulse Code Modulation Noise reduction
PDP Plasma Display Panel SXGA 1280 × 1024
PFC Power Factor Corrector (or Pre- TFT Thin Film Transistor
conditioner) THD Total Harmonic Distortion
PIP Picture In Picture TMDS Transmission Minimized Differential
PLL Phase Locked Loop. Used for e.g. Signalling
FST tuning systems. The customer TS Transport Stream
can give directly the desired frequency TXT TeleteXT
POD Point Of Deployment: a removable TXT-DW Dual Window with TeleteXT
CAM module, implementing the CA UI User Interface
system for a host (e.g. a TV-set) uP Microprocessor
POR Power On Reset, signal to reset the uP UXGA 1600 × 1200 (4:3)
PSDL Power Supply for Direct view LED V V-sync to the module
backlight with 2D-dimming VESA Video Electronics Standards
PSL Power Supply with integrated LED Association
drivers VGA 640 × 480 (4:3)
PSLS Power Supply with integrated LED VL Variable Level out: processed audio
drivers with added Scanning output toward external amplifier
functionality VSB Vestigial Side Band; modulation
PTC Positive Temperature Coefficient, method
non-linear resistor WYSIWYR What You See Is What You Record:
PWB Printed Wiring Board (same as “PCB”) record selection that follows main
PWM Pulse Width Modulation picture and sound
QRC Quasi Resonant Converter WXGA 1280 × 768 (15:9)
QTNR Quality Temporal Noise Reduction XTAL Quartz crystal
QVCP Quality Video Composition Processor XGA 1024 × 768 (4:3)
RAM Random Access Memory Y Luminance signal
RGB Red, Green, and Blue. The primary Y/C Luminance (Y) and Chrominance (C)
color signals for TV. By mixing levels signal
of R, G, and B, all colors (Y/C) are YPbPr Component video. Luminance and
reproduced. scaled color difference signals (B-Y
RC Remote Control and R-Y)
RC5 / RC6 Signal protocol from the remote YUV Component video
control receiver
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
SCL Serial Clock I2C
SCL-F CLock Signal on Fast I2C bus
SD Standard Definition
SDA Serial Data I2C
SDA-F DAta Signal on Fast I2C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
SSC Spread Spectrum Clocking, used to
reduce the effects of EMI
STB Set Top Box
STBY STand-BY
SVGA 800 × 600 (4:3)
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Mechanical Instructions Q551.1E LA 4. EN 13
4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Manet Styling (6000-series) Notes:
4.2 Cable Dressing Monet Styling (8000-series) • Figures below can deviate slightly from the actual situation,
4.3 Cable Dressing Rubens Styling (9000-series) due to the different set executions.
4.4 Cable Dressing Rubens 21:9 Styling (9955-series)
4.5 Service Positions
4.6 Assembly/Panel Removal Manet Styling (6000-series)
4.7 Assembly/Panel Removal Monet Styling (8000-series)
4.8 Assembly/Panel Removal Rubens Styling (9000-series)
4.9 Assembly/Panel Removal Rubens 21:9 Styling (9955-
series)
4.10 Set Re-assembly
18754_100_100922.eps
100922
Figure 4-1 Cable dressing 42PFL6805H/xx (applicable to all 6000 series sets)
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EN 14 4. Q551.1E LA Mechanical Instructions
18750_101_100414.eps
100414
Figure 4-2 Cable dressing 37PFL8605K/02 (applicable to all 8000 series sets)
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Mechanical Instructions Q551.1E LA 4. EN 15
18750_100_100414.eps
100414
Figure 4-3 Cable dressing 32PFL9705x/xx (applicable to all 9000 series sets)
18754_113_100930.eps
100930
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EN 16 4. Q551.1E LA Mechanical Instructions
Figure 4-4 Cable dressing 58PFL9955x/xx (applicable to all 9955 series sets)
For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
display. Caution: Failure to follow these guidelines can
seriously damage the display!
Ensure that ESD safe measures are taken.
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Mechanical Instructions Q551.1E LA 4. EN 17
4.6 Assembly/Panel Removal Manet Styling Refer to Figure 4-5 for details.
(6000-series)
1. Remove the stand using a hexagonal wrench.
The instructions apply to the 42PFL6805H/xx. 2. Remove all metric screws [1] of the rear cover.
3. Remove the remaining plastite screws [2] of the rear cover.
4. Lift the rear cover from the TV. Make sure that wires and
4.6.1 Rear Cover
flat coils are not damaged while lifting the rear cover from
the set.
Warning: Disconnect the mains power cord before you remove
the rear cover.
1 1
1 1 1
1 1 2
2 2
18754_101_100922.eps
100922
Figure 4-5 Rear cover 32PFL6805x/xx (applicable to all 6000 series sets)
Each speaker unit is mounted with two screws. Refer to Figure 4-7 for details.
When defective, replace the whole unit.
1
4.6.3 Stand support 2
2
Refer to Figure 4-6 for details.
1. Unplug the mains power connector [1] from the PSU and
release the cable from it’s clamp.
2. Remove all screws [2] of the stand support.
3. Slide the stand support down in the direction of the
arrows [3] and then lift the support from the set.
2 2
2 2
3 3
2 2
1
1
18750_102_100414.eps
2 100414
2
18754_102_100922.eps Figure 4-7 Main Power Supply
100922
1. Unplug all connectors [1].
Figure 4-6 Stand support 2. Remove the fixation screws [2].
3. Take the board out.
4.6.4 Mains Switch When defective, replace the whole unit.
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EN 18 4. Q551.1E LA Mechanical Instructions
4.6.6 Small Signal Board (SSB) Refer to Figure 4-8 for details.
1. Unplug all connectors [1].
2. Remove the fixation screws [2].
3. Release the clips from the bottom cover and slide it
downwards [3].
4 4. Release the clips from the side cover and slide it
sidewards [4].
2 1 1
2
4
2
2
3 3
18754_104_100922.eps
100922
2 2
2 2 2
2 2
2 2 2 2
18754_105_100922.eps
100922
Figure 4-9 Rear cover 32PFL6805x/xx (applicable to all 6000 series sets)
1. Remove the speakers as described earlier. 8. The front bezel is sticked to the screen with double sided
2. Remove the stand support as described earlier. thin foam tape. Gently release all tapes. Lift the bezel very
3. Remove the PSU as described earlier. carefully from the screen, while keeping the whole bezel
4. Remove the SSB as described earlier. horizontally. The screw bosses fitted to the bezel must be
5. Remove all cables [1], except screen power cables and the straight vertically lifted from their fitting wholes.
flat foil LVDS cables going in to the screen. When defective, replace the whole unit, including the IR/LED
6. Remove all screws [2] that fixate the front bezel. board.
7. Now turn the screen around and put it front forward at the
work top.
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Mechanical Instructions Q551.1E LA 4. EN 19
2
2 2
1 3
18754_106_100923.eps 2 2
100923
1
Figure 4-10 IR & LED board 18750_102_100414.eps
100414
The mains switch is mounted in the “leading edge” assembly. Refer to Figure 4-13 for details.
Refer to the exploded view in Chapter 11. Note: the Ambilight units are to be swapped on PWB level.
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EN 20 4. Q551.1E LA Mechanical Instructions
18750_104_100414.eps
100414
1
Figure 4-13 Ambilight units 1
1 1
1 1 1 1
2
18750_105_100414.eps
100414
18750_108_100415.eps
100415
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Mechanical Instructions Q551.1E LA 4. EN 21
1
4.8.1 Rear Cover
3
Warning: Disconnect the mains power cord before you remove
the rear cover.
Tweeters
6 4 6
Each tweeter unit is mounted with one screw.
When defective, replace the whole unit.
Subwoofer 5
The central subwoofer is located in the centre of the set, and is
mounted with three screws. 7 5
When defective, replace the whole unit.
18750_114_100415.eps
100415
4.8.3 Main Power Supply
Figure 4-21 Ambilight units
Refer to Figure 4-19 for details.
1. Remove the tweeters as described earlier.
2. Remove the IR/LED panel as described earlier.
3. Unplug the connector on the PSU panel [1].
2 2 4. Remove the screws [2] that secure the plastic rim.
5. Remove the brackets [3].
6. Unplug the flat foil(s) [4].
7. Release the clips [5] that secure the PWB.
2 2
8. Slide the PWB out of the set [6].
1
2 2
3
3
2
1
1
3
2 2 3
2
3
18750_110_100415.eps
100415
3
4 4
Figure 4-19 Main Power Supply 18750_111_100415.eps
100415
1. Unplug all connectors [1].
2. Remove the fixation screws [2]. Figure 4-22 SSB
3. Take the board out.
When defective, replace the whole unit. 1. Unplug all connectors [1].
2. Slide the side cover sidewards [2].
4.8.4 Ambilight Units 3. Remove the fixation screws [3].
4. Remove the bottom cover downwards [4].
Refer to Figure 4-20 and Figure 4-21 for details.
Note: the Ambilight units are to be swapped on PWB level. 4.8.6 IR & LED Board
18750_112_100415.eps 1
100415
1. Remove the IR/LED panel as described earlier. 1. Remove all boards as described earlier.
2. Remove the plastic rim as described earlier. 2. Remove the tweeters as described earlier.
The Keyboard Control Panel is constructed together with the 3. Remove the central subwoofer as described earlier.
stand support (“leading edge” assembly) and cannot be 4. Remove the tweeters as described earlier.
swapped separately. 5. Disconnect the Ambilight flat foils as described earlier.
When defective, replace the whole assembly. 6. Remove the WiFi antenna boards where applicable as
described earlier.
7. Remove the plastic rim as described earlier.
4.8.8 C-balancer Board
8. Tilt the metal rims [1] on top and both sides of the set as
shown in the picture.
Refer to Figure 4-24 for details. Now the LCD Panel can be lifted from the front cabinet.
4.9.2 Speakers
4.8.9 LCD Panel
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Mechanical Instructions Q551.1E LA 4. EN 23
3
2 2 3
2
1 1
1
3
2 2 2
3
4 4
18750_111_100415.eps
100415
2 2
Figure 4-27 SSB
1 1
2 2
2 2 2 2
18754_108_100923.eps
100923
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EN 24 4. Q551.1E LA Mechanical Instructions
18754_109_100923.eps
100923
2 2 2
Figure 4-29 Ambilight units
2 2 2
1. Remove the IR/LED panel as described earlier.
2. Remove the plastic rim as described earlier.
The Keyboard Control Panel is constructed together with the
stand support (“leading edge” assembly) and cannot be
swapped separately. 18754_111_100924.eps
100924
When defective, replace the whole assembly.
Figure 4-32 AV PIP board
4.9.8 C-balancer Board
1. Unplug all connectors [1].
Refer to Figure 4-24 for details. 2. Remove the fixation screws [2].
3. Take out the board.
18750_115_100415.eps
100415
2
3 3 18754_112_100924.eps
100924
1 1
Figure 4-33 WiFi board
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Mechanical Instructions Q551.1E LA 4. EN 25
Refer to Figure 4-25 for details. To re-assemble the whole set, execute all processes in reverse
order.
Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position.
• Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.
1
18750_116_100415.eps
100415
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EN 26 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old “MENU”
button is now called “HOME” (or is indicated by a “house” icon).
Purpose
• To create a pre-defined setting, to get the same
measurement results as given in this manual.
• To override SW protections detected by stand-by
processor and make the TV start up to the step just before
protection (a sort of automatic stepwise start-up). See
18770_249_100215.eps
section “5.3 Stepwise Start-up”. 100407
• To start the blinking LED procedure where only LAYER 2
errors are displayed. (see also section “5.5 Error Codes”). Figure 5-1 Service mode pad
Specifications After activating this mode, “SDM” will appear in the upper right
corner of the screen (when a picture is available).
Table 5-1 SDM default settings
How to Navigate
Default When the “MENU” (or “HOME”) button is pressed on the RC
Region Freq. (MHz) system transmitter, the TV set will toggle between the SDM and the
normal user menu.
Europe, AP(PAL/Multi) 475.25 PAL B/G
Europe, AP DVB-T 546.00 PID DVB-T
How to Exit SDM
Video: 0B 06 PID
Use one of the following methods:
PCR: 0B 06 PID
• Switch the set to STAND-BY via the RC-transmitter.
Audio: 0B 07
• Via a standard customer RC-transmitter: key in “00”-
sequence.
• All picture settings at 50% (brightness, colour, contrast).
• Sound volume at 25%.
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 27
5.2.2 Service Alignment Mode (SAM) button and “XXX” (where XXX is the 3 digit decimal display
code as mentioned on the sticker in the set). Make sure to key
Purpose in all three digits, also the leading zero’s. If the above action is
• To perform (software) alignments. successful, the front LED will go out as an indication that the
• To change option settings. RC sequence was correct. After the display option is changed
• To easily identify the used software version. in the NVM, the TV will go to the Stand-by mode. If the NVM
• To view operation hours. was corrupted or empty before this action, it will be initialized
• To display (or clear) the error code buffer. first (loaded with default values). This initializing can take up to
20 seconds.
How to Activate SAM
Via a standard RC transmitter: Key in the code “062596”
directly followed by the “INFO” or “OK” button. After activating
SAM with this method a service warning will appear on the
Display Option
screen, continue by pressing the “OK” button on the RC. Code
27mm
MODEL:
32PF9968/10
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EN 28 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
• NVM editor. For NET TV the set “type number” must be How to Activate CSM
entered correctly.
Also the production code (AG code) can be entered here Key in the code “123654” via the standard RC transmitter.
via the RC-transmitter. Note: Activation of the CSM is only possible if there is no (user)
Correct data can be found on the side/rear sticker. menu on the screen!
When CSM is activated and there is a USB stick connected to Software versions
the TV set, the software will dump the CSM content to the USB • Current main SW. Displays the build-in main software
stick. The file (CSM_model number_serial number.txt) will be version. In case of field problems related to software,
saved in the root of the USB stick. This info can be handy if no software can be upgraded. As this software is consumer
information is displayed. upgradeable, it will also be published on the Internet.
Example: Q55xx1.2.3.4
When in CSM mode (and a USB stick connected), pressing • Stand-by SW. Displays the build-in stand-by processor
“OK” will create an extended CSM dump file on the USB stick. software version. Upgrading this software will be possible
This file (Extended_CSM_model number_serial number.txt) via ComPair or via USB (see section 5.9 Software
contains: Upgrading).
• The normal CSM dump information, Example: STDBY_88.68.1.2.
• All items (from SAM “load to USB”, but in readable format), • e-UM version. Displays the electronic user manual SW-
• Operating hours, version (12NC version number). Most significant number
• Error codes, here is the last digit.
• SW/HW event logs. • AV PIP software.
• 3D dongle software version.
To have fast feedback from the field, a flashdump can be
requested by development. When in CSM, push the “red” Quality items
button and key in serial digits ‘2679’ (same keys to form the • Signal quality. Bad / average /good (not for DVB-S).
word ‘COPY’ with a cellphone). A file “Dump_model • Ethernet MAC address. Displays the MAC address
number_serial number.bin” will be written on the connected present in the SSB.
USB device. This can take 1/2 minute, depending on the • Wireless MAC address. Displays the wireless MAC
quantity of data that needs to be dumped. address to support the Wi-Fi functionality.
• BDS key. Indicates if the set is in the BDS status.
Also when CSM is activated, the LAYER 1 error is displayed via • CI module. Displays status if the common interface
blinking LED. Only the latest error is displayed (see also module is detected.
section 5.5 Error Codes). • CI + protected service. Yes/No.
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 29
Mains
off Mains
on
- WakeUp requested
WakeUp
- Acquisition needed
requested
- Tact switch pushed
St by Semi Active
- stby requested and
no data Acquisition St by - St by requested
required - tact SW pushed
Tact switch
pushed
WakeUp
requested
- Tact switch pushed
(SDM)
- last status is hibernate
GoToProtection
after mains ON
Hibernate
GoToProtection
Protection
18770_250_100216.eps
100402
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EN 30 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
Off
Mains is applied
Stand by or
Protection
Standby Supply starts running.
All standby supply voltages become available.
st-by µP resets
Yes
Enter protection
Enable the DCDC converters
(ENABLE-3V3n LOW)
Wait 50ms
EJTAG probe
Yes
connected ?
No
No No Cold boot?
Yes
Release AVC system reset Release AVC system reset Release AVC system reset
Feed warm boot script Feed cold boot script Feed initializing boot script
disable alive mechanism
18770_251_100216.eps
100216
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 31
No
AVC releases Reset-Ethernet, Reset-USB and AVC releases Reset-Ethernet, Reset-USB and
This cannot be done through the bootscript, Reset-DVBs when the end of the AVC boot- Reset-DVBs when the end of the AVC boot-
the I/O is on the standby µP script is detected script is detected
Bootscript ready
No
in 1250 ms?
Yes
yes
Switch Standby I/O line high
3-th try?
and wait 4 seconds
The first time after the option turn on of the startup screen or
Startup screen cfg file when the set is virgin, the cfg file is not present and hence
present? the startup screen will not be shown.
Yes
yes
Blink Code as
error code
200Hz set? yes
No
Enter protection
85500 sends out startup screen 85500 sends out startup screen
No
200Hz Tcon has started up the
85500 starts up the display.
display.
No
To keep this flowchart readable, the exact Startup screen visible 85500 requests Lamp on
display turn on description is not copied
here. Please see the Semi-standby to On
description for the detailed display startup
Startup screen visible
During the complete display time of the
Startup screen, the preheat condition of
sequence.
100% PWM is valid. Initialize audio
Semi-Standby
18770_252_100216.eps
100216
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EN 32 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
No
Start POK line Wait until valid and stable audio and video, corresponding to the
detection algorithm requested output is delivered by the AVC
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.
return
Yes
Active
18770_253_100216.eps
100216
Figure 5-6 “Semi Stand-by” to “Active” flowchart (EEFL or LED backlight 50/100 Hz only)
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 33
return
Switch Audio-Reset low and wait 5ms
Release audio mute and wait 100ms before any other audio
The higher level requirement is that audio and handling is done (e.g. volume change)
video should be demuted without transient
effects and that the audio should be demuted
maximum 1s before or at the same time as the
unblank the video.
unblanking of the video.
Yes
Active
18770_254_100216.eps
100216
Figure 5-7 “Semi Stand-by” to “Active” flowchart (LED backlight 200 Hz)
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EN 34 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
Active
Wait 100ms
No
Instruct 200Hz
The exact timings to
Tcon to turn off Switch off LVDS output in 85500
switch off the
the display
display (LVDS
delay, lamp delay)
Wait x ms
are defined in the
display file.
Semi Standby
18770_255_100216.eps
100216
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 35
Semi Stand by
Delay transition until ramping down of ambient light is *) If this is not performed and the set is
finished. *) switched to standby when the switch off of
the ambilights is still ongoing, the lights will
switch off abruptly when the supply is cut.
Wait 10ms
Wait 5ms
Important remarks:
18770_256_100216.eps
100216
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EN 36 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
Introduction The error code buffer contains all detected errors since the last
ComPair (Computer Aided Repair) is a Service tool for Philips time the buffer was erased. The buffer is written from left to
Consumer Electronics products. and offers the following: right, new errors are logged at the left side, and all other errors
1. ComPair helps to quickly get an understanding on how to shift one position to the right.
repair the chassis in a short and effective way. When an error occurs, it is added to the list of errors, provided
2. ComPair allows very detailed diagnostics and is therefore the list is not full. When an error occurs and the error buffer is
capable of accurately indicating problem areas. No full, then the new error is not added, and the error buffer stays
knowledge on I2C or UART commands is necessary, intact (history is maintained).
because ComPair takes care of this. To prevent that an occasional error stays in the list forever, the
3. ComPair speeds up the repair time since it can error is removed from the list after more than 50 hrs. of
automatically communicate with the chassis (when the µP operation.
is working) and all repair information is directly available. When multiple errors occur (errors occurred within a short time
4. ComPair features TV software up possibilities. span), there is a high probability that there is some relation
between them.
Specifications
ComPair consists of a Windows based fault finding program New in this chassis is the way errors can be displayed:
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an • If no errors are there, the LED should not blink at all in
USB cable. For the TV chassis, the ComPair interface box and CSM or SDM. No spacer must be displayed as well.
the TV communicate via a bi-directional cable via the service • There is a simple blinking LED procedure for board
connector(s). level repair (home repair) so called LAYER 1 errors
The ComPair fault finding program is able to determine the next to the existing errors which are LAYER 2 errors (see
problem of the defective television, by a combination of Table 5-2).
automatic diagnostics and an interactive question/answer – LAYER 1 errors are one digit errors.
procedure. – LAYER 2 errors are 2 digit errors.
• In protection mode.
– From consumer mode: LAYER 1.
How to Connect
– From SDM mode: LAYER 2.
This is described in the chassis fault finding database in
ComPair. • Fatal errors, if I2C bus is blocked and the set reboots,
CSM and SAM are not selectable.
– From consumer mode: LAYER 1.
TO TV
– From SDM mode: LAYER 2.
TO
UART SERVICE
TO
I2C SERVICE
TO
UART SERVICE • In CSM mode.
CONNECTOR CONNECTOR CONNECTOR
– When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
ComPair II
Multi • In SDM mode.
RC in function
RC out
– When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
Optional Power Link/ Mode
Switch Activity I2C RS232 /UART
• Error display on screen.
– In CSM no error codes are displayed on screen.
– In SAM the complete error list is shown.
PC
Basically there are three kinds of errors:
• Errors detected by the Stand-by software which lead to
protection. These errors will always lead to protection and
an automatic start of the blinking LED LAYER 1 error.
(see section “5.6 The Blinking LED Procedure”).
ComPair II Developed by Philips Brugge
• Errors detected by the Stand-by software which not
Optional power
HDMI 5V DC lead to protection. In this case the front LED should blink
I2C only
the involved error. See also section “5.5 Error Codes, 5.5.4
Error Buffer”. Note that it can take up several minutes
10000_036_090121.eps
091118 before the TV starts blinking the error (e.g. LAYER 1
error = 2, LAYER 2 error = 15 or 53).
Figure 5-10 ComPair II interface connection • Errors detected by main software (MIPS). In this case
the error will be logged into the error buffer and can be read
Caution: It is compulsory to connect the TV to the PC as out via ComPair, via blinking LED method LAYER 1-2
shown in the picture above (with the ComPair interface in error, or in case picture is visible, via SAM.
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs can be 5.5.2 How to Read the Error Buffer
blown!
Use one of the following methods:
How to Order • On screen via the SAM (only when a picture is visible).
ComPair II order codes: E.g.:
• ComPair II interface: 3122 785 91020. – 00 00 00 00 00: No errors detected
• Software is available via the Philips Service web portal. – 23 00 00 00 00: Error code 23 is the last and only
• ComPair UART interface cable for Q55x.x. detected error.
(using 3.5 mm Mini Jack connector): 3138 188 75051. – 37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.
Note: When you encounter problems, contact your local – Note that no protection errors can be logged in the
support desk. error buffer.
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 37
• Via the blinking LED procedure. See section 5.5.3 How to content, as this history can give significant information). This to
Clear the Error Buffer. ensure that old error codes are no longer present.
• Via ComPair. If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
5.5.3 How to Clear the Error Buffer code and not the actual cause (e.g. a fault in the protection
detection circuitry can also lead to a protection).
There are several mechanisms of error detection:
Use one of the following methods:
• Via error bits in the status registers of ICs.
• By activation of the “RESET ERROR BUFFER” command
in the SAM menu. • Via polling on I/O pins going to the stand-by processor.
• Via sensing of analog values on the stand-by processor or
• If the content of the error buffer has not changed for 50+
the PNX85500.
hours, it resets automatically.
• Via a “not acknowledge” of an I2C communication.
Extra Info Other root causes for this error can be due to hardware
• Rebooting. When a TV is constantly rebooting due to problems regarding the DDR’s and the bootscript reading
internal problems, most of the time no errors will be logged from the PNX8550.
or blinked. This rebooting can be recognized via a ComPair • Error 16 (12V). This voltage is made in the power supply
interface and Hyperterminal (for Hyperterminal settings, and results in protection (LAYER 1 error = 3) in case of
see section “5.8 Fault Finding and Repair Tips, 5.8.7 absence. When SDM is activated we see blinking LED
Logging). It’s shown that the loggings which are generated LAYER 2 error = 16.
by the main software keep continuing. In this case • Error 17 (Invertor or Display Supply). Here the status of
diagnose has to be done via ComPair. the “Power OK” is checked by software, no protection will
• Error 13 (I2C bus 3, SSB bus blocked). Current situation: occur during failure of the invertor or display supply (no
when this error occurs, the TV will constantly reboot due to picture), only error logging. LED blinking of LAYER 1
the blocked bus. The best way for further diagnosis here, is error = 3 in CSM, in SDM this gives LAYER 2 error = 17.
to use ComPair. • Error 21 (PNX51X0). When there is no I2C communication
• Error 14 (I2C bus 2, TV set bus blocked). Current towards the PNX51X0 after start-up, LAYER 2 error = 21
situation: when this error occurs, the TV will constantly will be logged and displayed via the blinking LED
reboot due to the blocked bus. The best way for further procedure if SDM is switched on. This device is located on
diagnosis here, is to use ComPair. the 200 Hz panel from the display.
• Error 18 (I2C bus 4, Tuner bus blocked). In case this bus • Error 23 (HDMI). When there is no I2C communication
is blocked, short the “SDM” solder paths on the SSB during towards the HDMI mux after start-up, LAYER 2 error = 23
startup, LAYER error 2 = 18 will be blinked. will be logged and displayed via the blinking LED
• Error 15 (PNX8550 doesn’t boot). Indicates that the main procedure if SDM is switched on.
processor was not able to read his bootscript. This error will • Error 24 (I2C switch). When there is no I2C
point to a hardware problem around the PNX8550 communication towards the I2C switch, LAYER 2
(supplies not OK, PNX 8550 completely dead, I2C link error = 24 will be logged and displayed via the blinking LED
between PNX and Stand-by Processor broken, etc...). procedure when SDM is switched on. Remark: this only
When error 15 occurs it is also possible that I2C1 bus is works for TV sets with an I2C controlled screen included.
blocked (NVM). I2C1 can be indicated in the schematics as • Error 28 (Channel dec DVB-S). When there is no I2C
follows: SCL-UP-MIPS, SDA-UP-MIPS. communication towards the DVB-S channel decoder,
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EN 38 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
LAYER 2 error = 28 will be logged and displayed via the 2. Two short blinks of 250 ms followed by a pause of 3 s
blinking LED procedure if SDM is switched on. 3. Eight short blinks followed by a pause of 3 s
• Error 31 (Lnb controller). When there is no I2C 4. Six short blinks followed by a pause of 3 s
communication towards this device, LAYER 2 error = 31 5. One long blink of 3 s to finish the sequence (spacer).
will be logged and displayed via the blinking LED 6. The sequence starts again.
procedure if SDM is activated.
• Error 34 (Tuner). When there is no I2C communication 5.6.2 How to Activate
towards the tuner during start-up, LAYER 2 error = 34 will
be logged and displayed via the blinking LED procedure Use one of the following methods:
when SDM is switched on.
• Activate the CSM. The blinking front LED will show only
• Error 35 (main NVM). When there is no I2C
the latest layer 1 error, this works in “normal operation”
communication towards the main NVM during start-up, mode or automatically when the error/protection is
LAYER 2 error = 35 will be displayed via the blinking LED
monitored by the Stand-by processor.
procedure when SDM is switched “on”. All service modes
In case no picture is shown and there is no LED blinking,
(CSM, SAM and SDM) are accessible during this failure, read the logging to detect whether “error devices” are
observed in the Uart logging as follows: "<< ERRO >>>
mentioned. (see section “5.8 Fault Finding and Repair
PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".
Tips, 5.8.7 Logging”).
• Error 36 (Tuner DVB-S). When there is no I2C • Activate the SDM. The blinking front LED will show the
communication towards the DVB-S tuner during start-up,
entire content of the LAYER 2 error buffer, this works in
LAYER 2 error = 36 will be logged and displayed via the
“normal operation” mode or when SDM (via hardware pins)
blinking LED procedure when SDM is switched “on”. is activated when the tv set is in protection.
• Error 42 (Temp sensor). Only applicable for TV sets
equipped with temperature devices.
• Error 53. This error will indicate that the PNX8550 has 5.7 Protections
read his bootscript (when this would have failed, error 15
would blink) but initialization was never completed because 5.7.1 Software Protections
of hardware problems (NAND flash, ...) or software
initialization problems. Possible cause could be that there
Most of the protections and errors use either the stand-by
is no valid software loaded (try to upgrade to the latest main
microprocessor or the MIPS controller as detection device.
software version). Note that it can take a few minutes
Since in these cases, checking of observers, polling of ADCs,
before the TV starts blinking LAYER 1 error = 2 or in SDM,
and filtering of input values are all heavily software based,
LAYER 2 error = 53.
these protections are referred to as software protections.
• Error 64. Only applicable for TV sets with an I2C controlled
There are several types of software related protections, solving
screen.
a variety of fault conditions:
• Related to supplies: presence of the +5V, +3V3 and 1V2
5.6 The Blinking LED Procedure needs to be measured, no protection triggered here.
• Protections related to breakdown of the safety check
5.6.1 Introduction mechanism. E.g. since the protection detections are done
by means of software, failing of the software will have to
initiate a protection mode since safety cannot be
The blinking LED procedure can be split up into two situations:
guaranteed any more.
• Blinking LED procedure LAYER 1 error. In this case the
error is automatically blinked when the TV is put in CSM.
Remark on the Supply Errors
This will be only one digit error, namely the one that is
The detection of a supply dip or supply loss during the normal
referring to the defective board (see table “5-2 Error code
overview”) which causes the failure of the TV. This playing of the set does not lead to a protection, but to a cold
reboot of the set. If the supply is still missing after the reboot,
approach will especially be used for home repair and call
the TV will go to protection.
centres. The aim here is to have service diagnosis from a
distance.
• Blinking LED procedure LAYER 2 error. Via this Protections during Start-up
procedure, the contents of the error buffer can be made During TV start-up, some voltages and IC observers are
visible via the front LED. In this case the error contains actively monitored to be able to optimise the start-up speed,
2 digits (see table “5-2 Error code overview”) and will be and to assure good operation of all components. If these
displayed when SDM (hardware pins) is activated. This is monitors do not respond in a defined way, this indicates a
especially useful for fault finding and gives more details malfunction of the system and leads to a protection. As the
regarding the failure of the defective board. observers are only used during start-up, they are described in
Important remark: the start-up flow in detail (see section “5.3 Stepwise Start-up”).
For an empty error buffer, the LED should not blink at all in
CSM or SDM. No spacer will be displayed. 5.7.2 Hardware Protections
When one of the blinking LED procedures is activated, the front The only real hardware protection in this chassis appears in
LED will show (blink) the contents of the error buffer. Error case of an audio problem e.g. DC voltage on the speakers. This
codes greater then 10 are shown as follows: protection will only affect the Class D audio amplifier (item
1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit 7D10; see diagram B03A) and puts the amplifier in a
2. A pause of 1.5 s continuous burst mode (cyclus approximately 2 seconds).
3. “n” short blinks (where “n”= 1 to 9)
4. A pause of approximately 3 s, Repair Tip
5. When all the error codes are displayed, the sequence • There still will be a picture available but no sound. While
finishes with a LED blink of 3 s (spacer). the Class D amplifier tries to start-up again, the cone of the
6. The sequence starts again. loudspeakers will move slowly in one or the other direction
until the initial failure shuts the amplifier down, this cyclus
Example: Error 12 8 6 0 0. starts over and over again. The headphone amplifier will
After activation of the SDM, the front LED will show: also behaves similar.
1. One long blink of 750 ms (which is an indication of the
decimal digit) followed by a pause of 1.5 s
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 39
5.8 Fault Finding and Repair Tips • +5V-TUN supply voltage (5V nominal) for tuner and IF
amplifier.
Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra
+3V3-STANDY (3V3 nominal) is the permanent voltage,
Info”.
supplying the Stand-by microprocessor inside PNX85500.
5.8.1 Ambilight Supply voltage +1V1 is started immediately when +12V voltage
becomes available (+12V is enabled by STANDBY signal when
Due to degeneration process of the LED’s fitted on the ambi "low"). Supply voltages +3V3, +2V5, +1V8, +1V2 and +5V-TUN
module, there can be a difference in the colour and/or light are switched "on" by signal ENABLE-3V3 when "low", provided
output of the spare ambilight modules in comparison with the that +12V (detected via 7U40 and 7U41) is present.
originals ones contained in the TV set. Via SAM => alignments
=> ambilight, the spare module can be adjusted. +12V is considered OK (=> DETECT2 signal becomes "high",
+12V to +1V8, +12V to +3V3, +12V to +5V DC-DC converter
5.8.2 Audio Amplifier can be started up) if it rises above 10V and doesn’t drop below
9V5. A small delay of a few milliseconds is introduced between
The Class D-IC 7D10 has a powerpad for cooling. When the IC the start-up of 12V to +1V8 DC-DC converter and the two other
is replaced it must be ensured that the powerpad is very well DC-DC converters via 7U48 and associated components.
pushed to the PWB while the solder is still liquid. This is needed
to insure that the cooling is guaranteed, otherwise the Class D- Description DVB-S2:
IC could break down in short time. • LNB-RF1 (0V = disabled, 14V or 18V in normal operation)
LNB supply generated via the second conversion channel
of 7T03 followed by 7T50 LNB supply control IC. It provides
5.8.3 AV PIP
supply voltage that feeds the outdoor satellite reception
equipment.
To check the AV PIP board (if present) functionality, a
• +3V3-DVBS (3V3 nominal), +2V5-DVBS (2V5 nominal)
dedicated tespattern can be invoke as follows: select the
and +1V-DVBS (1.03V nominal) power supply for the
“multiview” icon in the User Interface and press the “OK” silicon tuner and channel decoder. +1V-DVBS is generated
button. Apply for the main picture an extended source, e.g.
via a 5V to 1V DC-DC converter and is stabilized at the
HDMI input. Proceed by entering CSM (push ‘123654’ on the
point of load (channel decoder) by means of feedback
remote control) and press the yellow button. A coloured signal SENSE+1V0-DVBS. +3V3-DVBS and +2V5-DVBS
testpattern should appear now, generated by the AV PIP board
are generated via linear stabilizers from +5V-DVBS that by
(this can take a few seconds).
itself is generated via the first conversion channel of 7T03.
If +24V drops below +15V level then the DVB-S2 supply will
The basic board power supply consists of 4 DC/DC converters
stop, even if +3V3 is still present.
and 5 linear stabilizers. All DC/DC converters have +12V input
voltage and deliver:
• +1V1 supply voltage (1.15V nominal), for the core voltage Debugging
of PNX85500, stabilized close to the point of load; The best way to find a failure in the DC/DC converters is to
SENSE+1V1 signal provides the DC-DC converter the check their start-up sequence at power “on” via the mains cord,
needed feedback to achieve this. presuming that the stand-by microprocessor and the external
• +1V8 supply voltage, for the DDR2 memories and DDR2 supply are operational. Take STANDBY signal "high"-to-"low"
interface of PNX85500. transition as time reference.
• +3V3 supply voltage (3.30V nominal), overall 3.3 V for When +12V becomes available (maximum 1 second after
onboard IC’s, for non-5000 series SSB diversities only. STANDBY signal goes "low") then +1V1 is started immediately.
• +5V (5.15V nominal) for USB, WIFI and Conditional After ENABLE-3V3 goes "low", all the other supply voltages
Access Module and +5V5-TUN for +5V-TUN tuner should rise within a few milliseconds.
stabilizer.
Tips
The linear stabilizers are providing: • Behaviour comparison with a reference TV550 platform
• +1V2 supply voltage (1.2V nominal), stabilized close to can be a fast way to locate failures.
PNX85500 device, for various other internal blocks of • If +12V stays "low", check the integrity of fuse 1U40.
PNX85500; SENSE+1V2 signal provides the needed • Check the integrity (at least no short circuit between drain
feedback to achieve this. and source) of the power MOS-FETs before starting up the
• +2V5 supply voltage (2.5V nominal) for LVDS interface and platform in SDM, otherwise many components might be
various other internal blocks of PNX85500; for 5000 series damaged. Using a ohmmeter can detect short circuits
SSB diversities the stabilizer is 7UD2 while for the other between any power rail and ground or between +12V and
diversities 7UC0 is used. any other power rail.
• +3V3 supply voltage (3V3 nominal) for 5000 series SSB • Short circuit at the output of an integrated linear stabilizer
diversities, provided by 7UD3; in this case the 12V to 3V3 (7UC0, 7UD2 or 7UD3) will heat up this device strongly.
DC-DC converter is not present. • Switching frequencies should be 500 kHz ...600 kHz for
12 V to 1.1 V and 12 V to 1.8 V DC-DC converters,
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EN 40 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
900 kHz for 12 V to 3.3 V and 12 V to 5 V DC-DC Uart loggings reporting fault conditions, error messages, error
converters. The DVB-S2 supply 24 V to 5 V and 24 V to +V codes, fatal errors:
LNB DC-DC converters operates at 300 kHz while for 5 V • Failure messages should be checked and investigated.For
to 1.1 V DC-DC converter 900 kHz is used. instance fatal error on the PNX51x0: check startup of the
back-end processor, supplies..reset, I2C bus. => error
5.8.6 Exit “Factory Mode” mentioned in the logging as: *5120 failed to start by itself*.
• Some failures are indicated by error codes in the logging,
check with error codes table (see Table “5-2 Error code
When an “F” is displayed in the screen’s right corner, this
means the set is in “Factory” mode, and it normally overview”).e.g. => <<<ERROR>>>PLFPOW_MERR.C :
First Error (id=10,Layer_1=2,Layer_2=23).
happens after a new SSB is mounted. To exit this mode, push
• I2C bus error mentioned as e.g.: “ I2C bus 4 blocked”.
the “VOLUME minus” button on the TV’s local keyboard for 10
seconds (this disables the continuous mode). • Not all failures or error messages should be interpreted as
fault.For instance root cause can be due to wrong option
Then push the “SOURCE” button for 10 seconds until the “F”
codes settings => e.g. “DVBS2Suppoprted : False/True.
disappears from the screen.
In the Uart log startup script we can observe and check the
enabled loaded option codes.
5.8.7 Logging
Defective sectors (bad blocks) in the Nand Flash can also be
When something is wrong with the TV set (f.i. the set is reported in the logging.
rebooting) you can check for more information via the logging
in Hyperterminal. The Hyperterminal is available in every Startup in the SW upgrade application and observe the Uart
Windows application via Programs, Accessories, logging:
Communications, Hyperterminal. Connect a “ComPair UART”- Starting up the TV set in the Manual Software Upgrade mode
cable (3138 188 75051) from the service connector in the TV to will show access to USB, meant to copy software content from
the “multi function” jack at the front of ComPair II box. USB to the DRAM.Progress is shown in the logging as follows:
Required settings in ComPair before starting to log: “cosupgstdcmds_mcmdwritepart: Programming 102400 bytes,
- Start up the ComPair application. 40505344 of 40607744 bytes programmed”.
- Select the correct database (open file “Q55X.X”, this will set
the ComPair interface in the appropriate mode). Startup in Jett Mode:
- Close ComPair Check Uart logging in Jet mode mentioned as : “JETT UART
After start-up of the Hyperterminal, fill in a name (f.i. “logging”) READY”.
in the “Connection Description” box, then apply the following
settings: Uart logging changing preset:
1. COMx => COMMAND: calling DFB source = RC6, system=0, key = 4”.
2. Bits per second = 115200
3. Data bits = 8
4. Parity = none
5.8.9 Loudspeakers
5. Stop bits = 1
6. Flow control = none
During the start-up of the TV set, the logging will be displayed. Make sure that the volume is set to minimum during
disconnecting the speakers in the ON-state of the TV. The
This is also the case during rebooting of the TV set (the same
audio amplifier can be damaged by disconnecting the speakers
logging appears time after time). Also available in the logging
is the “Display Option Code” (useful when there is no picture), during ON-state of the set!
look for item “DisplayRawNumber” in the beginning of the
logging. Tip: when there is no picture available during rebooting 5.8.10 PSL
you are able to check for “error devices” in the logging (LAYER
2 error) which can be very helpful to determine the failure cause In case of no picture when CSM (test pattern) is activated and
of the reboot. For protection state, there is no logging. backlight doesn’t light up, it’s recommended first to check the
inverter on the PSL + wiring (LAYER 2 error = 17 is displayed
5.8.8 Guidelines Uart logging in SDM).
Uart loggings are displayed: Attention: In case the tuner is replaced, always check the tuner
• When Uart loggings are coming out, the first conclusion we options!
can make is that the TV set is starting up and
communication with the flash RAM seems to be supported. 5.8.12 Display option code
The PNX85500 is able to read and write in the DRAMs.
• We can not yet conclude : Flash RAM and DRAMs are fully Attention: In case the SSB is replaced, always check the
operational/reliable.There still can be errors in the data
display option code in SAM, even when picture is available.
transfers, DRAM erros, read/write speed and timing
Performance with the incorrect display option code can lead to
control. unwanted side-effects for certain conditions.
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 41
Before starting: ST AR T
- prepare a USB memory stick with the latest software
- download the latest Main Software (Fus) from www.p4c.philips.com
- unzip this file
- create a folder ”upgrades” in the root of a USB stick (size > 50 MB) and
save the autorun.upg file in this "upgrades" folder.
Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in Set is still oper ating?
case there are more than one "autorun.upg" files on the USB stick.
No
Yes
1. D isconnect the WiF i module fr om the PC I connector (only for Q549.x SSB)
2. Replace the SSB by a Service SSB.
3. Place the WiFi module in the PCI connector.
4. Mount the Service SSB in the set.
Set the correct “Display code” via “062598 -HOME- xxx” where
“xxx” is the 3 digit display panel code (see sticker on the side
or bottom of the cabinet)
H_16771_007a.eps
100402
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EN 42 5. Q551.1E LA Service Modes, Error Codes, and Fault Finding
Noisy picture with bands/lines is visible and the An “F” is displayed (and the HDMI 1
RED LED is continuous on. input is displayed).
- Press the “volume minus” button on the TVs local keyboard for 5 ~10
seconds
- Press the “SOURCE” button for 10 seconds until the “F” disappears
from the screen or the noise on the screen is replaced by “blue mute”
H_16771_007b.eps
100322
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Service Modes, Error Codes, and Fault Finding Q551.1E LA 5. EN 43
18753_211_100811.eps
100811
5.9.5 UART logging 2K10 (see section “5.8 Fault Finding and
Repair Tips, 5.8.7 Logging)
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Alignments Q551.1E LA 6. EN 45
6. Alignments
Index of this chapter: For the next alignments, supply the following test signals via a
6.1 General Alignment Conditions video generator to the RF input:
6.2 Hardware Alignments • EU/AP-PAL models: a PAL B/G TV-signal with a signal
6.3 Software Alignments strength of at least 1 mV and a frequency of 475.25 MHz
6.4 Option Settings • US/AP-NTSC models: an NTSC M/N TV-signal with a
6.5 Reset of Repaired SSB signal strength of at least 1 mV and a frequency of 61.25
6.6 Total Overview SAM modes MHz (channel 3).
• LATAM models: an NTSC M TV-signal with a signal
strength of at least 1 mV and a frequency of 61.25 MHz
6.1 General Alignment Conditions (channel 3).
Perform all electrical adjustments under the following 6.3.1 White Point
conditions:
• Power supply voltage (depends on region):
• Choose “TV menu”, “Setup”, “More TV Settings” and then
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%).
“Picture” and set picture settings as follows:
– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).
– EU: 230 VAC / 50 Hz (± 10%). Picture Setting
• Allow the set to warm up for approximately 15 minutes. Picture format Unscaled
To store the data: Table 6-2 White D alignment values - LED - Minolta CA-210
• Press OK on the RC before the cursor is moved to the
left Value Cool (9420K) Normal (8120K) Warm (6080K)
• In main menu select “Store” and press OK on the RC x 0.282 0.292 0.320
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EN 46 6. Q551.1E LA Alignments
Table 6-3 White D alignment values - LED - Minolta CS-200 Table 6-10 White tone default setting 46" (Rubens)
Value Cool (11000K) Normal (9000K) Warm (6500K) White Tone e.g. 46PFL9705x/xx
x 0.276 0.287 0.313 Colour Temp R G B
y 0.282 0.296 0.329 Normal 127 119 112
Cool 114 117 127
Warm 127 112 87
If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production. Table 6-11 White tone default setting 52" (Monet)
• Select a COLOUR TEMPERATURE (e.g. COOL,
NORMAL, or WARM). White Tone e.g. 52PFL8605x/xx
• Set the RED, GREEN and BLUE default values according Colour Temp R G B
to the values in Table 6-4. Normal t.b.d. t.b.d. t.b.d.
• When finished press OK on the RC, then press STORE (in Cool t.b.d. t.b.d. t.b.d.
the SAM root menu) to store the aligned values to the NVM. Warm t.b.d. t.b.d. t.b.d.
• Restore the initial picture settings after the alignments.
6.3.2 Ambilight
Table 6-5 White tone default setting 32" (Rubens)
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Alignments Q551.1E LA 6. EN 47
The current value is shown with 4 digits, and can be changed Every 5-digit number represents 16 bits (so the maximum value
by a digit entry. After pressing “OK”, the value is stored. will be 65536 if all options are set).
The menu item "Reset TCON alignment" can be used to return When all the correct options are set, the sum of the decimal
to the default value from the display file. A notification is shown: values of each Option Byte (OB) will give the option number.
"TCON alignment has been reset".
Diversity
Table 6-14 TCON/VCOM default settings Not all sets with the same Commercial Type Number (CTN)
necessarily have the same option code!
Supplier Panel TCON/VCOM Alignment Use of Alternative BOM => an alternative BOM number usually
LGD (max: 1023) 32” CCFL (Rembrandt) 420 indicates the use of an alternative display or power supply. This
37” CCFL (Rembrandt) 403 results in another display code thus in another Option code.
42” CCFL (Rembrandt) 443 Refer to Chapter 2. Technical Specifications, Diversity, and
32” LED (Matisse) 428 Connections.
37” LED (Matisse) 375
Sharp (max: 255) 32” LED (Van Gogh) 109 6.4.5 Option Code Overview
40” LED (Van Gogh) 95
46” LED (Van Gogh) 143 Refer to the sticker in the set for the correct option codes.
52” LED (Van Gogh) 203 Important: after having edited the option numbers as
40” LED (da Vinci) 0098 described above, you must press OK on the remote control
46” LED (da Vinci) 0129 before the cursor is moved to the left!
6.4.1 Introduction A very important issue towards a repaired SSB from a Service
repair shop (SSB repair on component level) implies the reset
The microprocessor communicates with a large number of I2C of the NVM on the SSB.
ICs in the set. To ensure good communication and to make A repaired SSB in Service should get the service Set type
digital diagnosis possible, the microprocessor has to know “00PF0000000000” and Production code “00000000000000”.
which ICs to address. The presence / absence of these Also the virgin bit is to be set. To set all this, you can use the
PNX51XX ICs (back-end advanced video picture improvement ComPair tool or use the “NVM editor” and “Dealer options”
IC which offers motion estimation and compensation features items in SAM (do not forget to “store”).
(commercially called HDNM) plus integrated Ambilight control)
is made known by the option codes. After a repaired SSB has been mounted in the set (set repair
on board level), the type number (CTN) and production code of
Notes: the TV has to be set according to the type plate of the set. For
• After changing the option(s), save them by pressing the OK this (new in this platform), you can use the NVM editor in
button on the RC before the cursor is moved to the left, SAM. This action also ensures the correct functioning of the
select STORE in the SAM root menu and press OK on the “Net TV” feature and access to the Net TV portals. The loading
RC. of the CTN and production code can also be done via ComPair
• The new option setting is only active after the TV is (Model number programming).
switched “off” / “stand-by” and “on” again with the mains
switch (the NVM is then read again). In case of a display replacement, reset the “Operation hours
display” to “0”, or to the operation hours of the replacement
6.4.2 Dealer Options display.
For dealer options, in SAM select “Dealer options”. 6.5.1 SSB identification
See Table 6-15 SAM mode overview.
Whenever ordering a new SSB, it should be noted that the
6.4.3 (Service) Options correct ordering number (12nc) of a SSB is located on a sticker
on the SSB. The format is <12nc SSB><serial number>. The
Select the sub menu's to set the initialisation codes (options) of ordering number of a “Service” SSB is the same as the ordering
the model number via text menus. number of an initial “factory” SSB.
See Table 6-15 SAM mode overview.
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EN 48 6. Q551.1E LA Alignments
18310_221_090318.eps
090319
2010-Oct-01 back to
div. table
Alignments Q551.1E LA 6. EN 49
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div. table
EN 50 6. Q551.1E LA Alignments
2010-Oct-01 back to
div. table
Alignments Q551.1E LA 6. EN 51
back to 2010-Oct-01
div. table
EN 52 7. Q551.1E LA Circuit Descriptions
7. Circuit Descriptions
Index of this chapter: 7.1 Introduction
7.1 Introduction
7.2 Power Supply
The Q551.1E LA is a new chassis launched in Europe in 2010.
7.3 Backlight Concept
The whole range is covered by PNX8550x main IC so-called
7.4 DC/DC Converters NXP TV550 platform.
7.5 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
The major deltas versus its predecessor Q543/Q548 are the
7.6 Front-End DVB-S(2) reception
DVBS, DLNA1.5+, Wireless Laptop Live (WLL-Dongle),
7.7 HDMI Ethernet, and WiFi Ready (Net-TV) functionality.
7.8 Video and Audio Processing - PNX85500
7.9 Back-End
The Q551.1E LA chassis comes with the following stylings:
7.10 AV PIP Board • Manet “Green TV” (series xxPFL6xxx),
7.11 Ambilight
• Matisse (series xxPFL7xxx),
7.12 TCON
• Monet (series xxPFL8xxx),
• Rubens (series xxPFL9xxx).
Notes:
• Only new circuits (circuits that are not published recently)
7.1.1 Implementation
are described.
• Figures can deviate slightly from the actual situation, due
to different set executions. Key components of this chassis are:
• PNX85500 System-On-Chip (SOC) TV Processor
• For a good understanding of the following circuit
• TX31XX Hybrid Tuner (DVB-T/C, analogue)
descriptions, please use the wiring, block (see chapter
9. Block Diagrams) and circuit diagrams (see chapter • STV6110AT DVB-S tuner
• SII9x87 HDMI Switch
10. Circuit Diagrams and PWB Layouts).Where necessary,
• TPA312xD2PWP Class D Power Amplifier
you will find a separate drawing for clarification.
• LAN8710 Dual Port Gigabit Ethernet media access
controller
• PNX51x0 Video back-end Processor (optional; comes
together with LCD panel on a so-called “200 Hz board”).
18750_200_100415.eps
100415
2010-Oct-01 back to
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Circuit Descriptions Q551.1E LA 7. EN 53
18750_201_100415.eps
100415
back to 2010-Oct-01
div. table
EN 54 7. Q551.1E LA Circuit Descriptions
N -D VBS C onnector
8981x N -D VBS
LVD S
D C /D C DD R4 (51 2) 8957x
C las s -D 89 53 x T uner
P N X 85500 CI
8951 x
8950 x IO
89 94 x
IO
8952 x 6451 x
18770_257_100427.eps
100428
Figure 7-3 SSB layout cells (top view) (non-DVBS without TCON) xxx6451x
2010-Oct-01 back to
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Circuit Descriptions Q551.1E LA 7. EN 55
N-DVBS Connector
8981x N-DVBS
LVDS
DDR4 (512)
8957x
DC/DC
8953x
Class-D Tuner
PNX85500 CI
8951x
8950x IO
8994x
IO
8952x 6364x
18770_263_100921.eps
100921
Figure 7-4 SSB layout cells (top view) (non-DVBS without TCON) xxx6364x
D C /D C
8 95 3x
C las s- D T uner
8951 x P N X 85500 CI
8950 x IO
899 4x
IO
8952 x 6452 x
18770_258_100427.eps
100428
Figure 7-5 SSB layout cells (top view) (DVBS without TCON) xxx6452x
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EN 56 7. Q551.1E LA Circuit Descriptions
AL C PLD
T C O N S harp 9073x
90711 x passthr ough
F GPA
D C /D C D D R 4 (51 2) passthrough
C las s- D 89 53 x T uner
8951 x P N X 85500 CI
8950 x IO
899 4x
IO
8952 x 6450 x
18770_259_100427.eps
100428
Figure 7-6 SSB layout cells (top view) (non-DVBS with TCON Sharp) xxx6450x
D C /D C 1520x
895 3x
Figure 7-7 SSB layout cells (top view) (DVBS with TCON Sharp) xxx6453x
2010-Oct-01 back to
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Circuit Descriptions Q551.1E LA 7. EN 57
AL C PLD
T C O N LG D 9073x
9069 x passthr ough
F GPA
DD R4 (51 2)
D C /D C passthrough
89 53 x
C las s- D T uner
8951 x P N X 85500 CI
8950 x IO
899 4x
IO
8952 x 6406 x
18770_261_100427.eps
100428
Figure 7-8 SSB layout cells (top view) (non-DVBS with TCON LG) xxx6406x
T C O N LG D D V B -S 2 AL C PLD D VB -
S2 9074 x
9070 x
D VBS-F E
D VBS-Supply
8960x
8962x
D VB-S 2
F GPA
Passthrough
D DR 4 ( 512 )
D C /D C 1520x
8 95 3x
C las s- D T uner
8951 x P N X85500
CI
8950 x
IO
899 4 x
IO
8952 x 6401 x
18770_262_100427.eps
100428
Figure 7-9 SSB layout cells (top view) (DVBS with TCON LG) xxx6401x
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EN 58 7. Q551.1E LA Circuit Descriptions
bl e
a il a
v
e ta
t y
N o
10000_035_090121.eps
100416
Figure 7-10 SSB layout cells (top view) (DVBS with TCON LG) xxx6473x
2010-Oct-01 back to
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Circuit Descriptions Q551.1E LA 7. EN 59
18770_234_100127.eps
100127
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EN 60 7. Q551.1E LA Circuit Descriptions
Current
PWM
7 - - +12V Boost - -
8 - - +12V n.c. - -
9 - - +Vsnd POK - -
10 - - GND_SND - - - 1G5 0 1G5 1
11 - - n.c. - - -
12 - - - - - -
B ac k lightB oos t
7.3 Backlight Concept
1M99
PNX B ac k lightP W M
85500 Lam p -O N
The following backlight applications are implemented:
• Basic (xxPFL8xxx sets)
• xxPFL9xxx sets 32" 100 Hz “0D” scanning S S B TV 550 P S LS
• xxPFL9xxx sets 37" 200 Hz “0D” dimming
• xxPFL9xxx sets 40" & 46" 200 Hz “2D” scanning 18750_203_100415.eps
100415
• xxPFL9xxx sets 58" 21:9 (3-d) 200 Hz “2D” scanning.
Figure 7-13 Backlight application (xxPFL9xxx sets 32" 100 Hz
The backlight application determines which power board has to “0D” scanning)
be used. Refer to section 7.2.2 Diversity for additional
information.
T co n2 0 0H z B a ckL ig h t
LGD S id e L E D
T co n 2 0 0 H z B a ckL ig h t
S h a rp S id e L E D A S IC
A S IC
PNX PNX
5120 5120
PNX PNX
LVD S splitter
5120 5120
LVD S splitter
1G5 1
Current
1G5 1
PWM
Current
PWM
1G5 0 1G5 1
1G5 0 1G5 1
B ac k lightB oos t
1M99
PNX B ac k lightP W M
85500 Lam p -O N
S S B TV 550 PSL
S S B T V 550 PSL 18750_204_100415.eps
100415
18750_202_100415.eps
100423
Figure 7-14 Backlight application (xxPFL9xxx sets 37" 200 Hz
“0D” dimming)
Figure 7-12 Backlight application (xxPFL8xxx sets 200 Hz “0D”
dimming)
2010-Oct-01 back to
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Circuit Descriptions Q551.1E LA 7. EN 61
1F53
B L-I2S This introduces the “C-balancer board” for some of the
sca n n in g
xxPFL9xxx sets.
A S IC A S IC
C-balancing Concept for LED driving
The advantages of the C-balancing concept are:
PNX PNX • Cost reduction
5120 5120 • Higher efficiency
PWM
• Higher reliability, because of less components used.
LVD S splitter I2S / S PI
The C-balance drivers and -components are mounted on a
2D-D I M
1G5 1 separate C-balancer board. This PWB is mounted on the LCD
panel by the LCD manufacturer, though developed by Philips.
Current
There are two possible configurations:
• For edge-lit displays & direct-lit displays + “0D” dimming
1G5 0 1G5 1
• For direct-lit displays + “2D” dimming.
Refer to Figure 7-17 and Figure 7-18 for the application.
PNX Conversion 1
DC to LED-drivers) (LED-strings)
S S B TV 550 PSDL
Balan cin g n
18750_205_100415.eps
100423
Part of Power Supply Part of Display
Figure 7-15 Backlight application (xxPFL9xxx sets 40" & 46" 18750_209_100415.eps
100416
200 Hz “2D” scanning)
Figure 7-17 Balancing LED-drivers application for edge-lit
displays & direct-lit displays in combination with “0D” dimming
T co n 2 0 0 H z 3D B a ckL ig h t
S h a rp D ire ctL E D
1F53
B L-I2S
sca n n in g Power
Conversion 2a
Power
Conversion 2b Backlight-unit
A S IC A S IC Power
Conversion 1
DC to LED-drivers) DC to LED-drivers) (LED-strings)
R e s o n ant Rectifier
FPGA ACin
380 to
4 0 0 V DC
to p o lo g y
Balan cin g 1
D rive r-part Balan cin g 2
Balan cin g 3
PNX PNX
5120 5120 Balan cin g n
2D-D I M 18750_210_100415.eps
1G5 1 100416
Current
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EN 62 7. Q551.1E LA Circuit Descriptions
+ 5V 5-TUN
196 m A
+ 5V + 5V 5-TUN + 5V -TUN
+ 5V + 5V -TUN
2179 m A 196 m A
dc -dc s tabiliz er
18770_235_100127.eps
100219
+ 12V + 3V 3 + 3V 3 + 2V 5
2919 m A
+ 3V 3
2371 m A
+ 2V 5
450 m A
Figure 7-21 Front-End block diagram European/China region
dc -dc s tabiliz er
+ 1V 1
+ 1V 1
dc -dc
5100 m A • Hybrid Tuner with integrated SAW filter and amplifier
• External ISDB-T channel decoder covering the Brazilian
18770_226_100127.eps digital terrestrial TV standard
100426 • Bandpass filter
• Amplifier
Figure 7-19 DC/DC converters non-DVB-S2 devices • PNX85500 SoC TV with integrated analogue demodulator.
2010-Oct-01 back to
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Circuit Descriptions Q551.1E LA 7. EN 63
18770_236_100127.eps
100219
and vivid colour management. High flat panel screen combination with LED backlights for optimum contrast and
resolutions and refresh rates are supported with formats power savings up to 50%.
including 1366 × 768 @ 100Hz/120Hz and 1920 × 1080 @
100Hz/120Hz. The combination of Ethernet, CI+ and H.264 For a functional diagram of the PNX85500, refer
supports new TV experiences with IPTV and VOD. On top of to Figure 7-25.
that, optional support is available for 2D dimming in
PNX85500x
MEMORY
CONTROLLER
TS input MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single, dual or
OUTPUT quad channel)
DVB DVB-T/C
channel decoder
AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO
VIDEO ENCODER analog CVBS
OUTPUT
SCALER,
AUDIO DEMOD DE-INTERLACE
SSIF, LR
AND DECODE AND NOISE
REDUCTION
DMA BLOCK
I2C PWM GPIO IR ADC SPI UART I2C GPIO Flash USB 2.0 SD Ethernet
x8 Memory MAC
Card
18770_241_100201.eps
100219
2010-Oct-01 back to
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Circuit Descriptions Q551.1E LA 7. EN 65
In some sets, a so-called “200 Hz” board is mounted together In some 58" sets, an additional “AV PIP” board is mounted to
with the LCD panel. This board contains the PNX51x0 Video support simultaneous TV reception and internet usage.
back-end processor and has to be replaced entirely when
defective (no component level repair). This board is not
described in this manual.
7.11 Ambilight
1
MTK 1 1 1 1
Glue M
or M M M M
logic 5 AmbiLight AmbiLight
PNX85500 8 8 8 8
9
3 4 3 4
SSB
1M09
1M09
PSU
18770_209a_100202.eps
100202
18750_207_100415.eps
100415
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EN 66 7. Q551.1E LA Circuit Descriptions
+3V3
2B17
100n
7B20-1
74LVC2G17
5
6 PWM-CLOCK 2 3B01-2 7 1 6 1 3B30-1 8 PWM-CLOCK-BUF
× 100R 220R
2B00
6 5 3
2
33p
2B02
100p
L × ×
E 6 4 5 2
7B20-2
D L × L × 74LVC2G17
+3V3
E 6 3 E 6 4
5
D L × D L + SPI-CLOCK 1
3B01-1
8 3 4 4
3B30-4
5 SPI-CLOCK-BUF
100R 220R
E 6 E 5
2B01
2
33p
D D
2B10
100p
L L
E E
D D
18770_214_100126.eps
100126
36 30 24 18 15 12 9
Figure 7-31 Ambilight buffer
18770_210_100126.eps
100126 The temperature sensor is built around item no. 7B30 (diagram
AL1A) and indicates overtemperature of the board. Refer to
Figure 7-28 LED grouping per board figure 7-32 Temperature sensor.
6
protocol outside LED board. Between the CPLD and the LED
1K5 1%
1K5 1%
3B39-2
3B39-3
driver, as “extra” line is mentioned: 7B30
2
3
FB40
• Non-SPI signals that are required for the LED driver
5
1
4 TEMP-SENSOR
• Temperature sensor line. 3
LMV331IDCK
RES
2
2B08
3004
10K
10n
3B11
10K
-T
FB41
SPI S P I + e x tra
1M 59
C P LD
1K5 1%
PNX
3B39-1
2B09
10n
8
18770_211_100126.eps 18770_215_100126.eps
100126 100126
Figure 7-29 Communication protocol outside LED board Figure 7-32 Temperature sensor
Refer to figure for an overview of the communication inside the The EEPROM (item no. 7B07; diagram AL1A) contains
LED board. alignment information about the mounted LEDs and is
programmed during the alignment process in production. Refer
to figure 7-33 EEPROM.
E x tra
+3V3
100n
B uffer SPI-DATA-IN-BUF
D river
1M 84
1M 83
SPI-CLOCK-BUF
7B07
8
M95010-WDW6
+3V3 VCC
Tem p EEPRO M
7B06
5
D Φ Q
2
74LVC1G32GW 6 (64K)
5
sensor SPI-CS 1
C
4 1 3B02-2
S
Te m p SPI DATA-SWITCH 2
+3V3 HOLD
7 +3V3
1 3B02-1 8 3 7 10K 2
W
3
SPI 10K
GND
4
18770_213_100126.eps SPI-DATA-RETURN
100219
18770_216_100126.eps
100126
Figure 7-30 Communication protocol inside LED board
Figure 7-33 EEPROM
The buffer is built around item no. 7B20 (diagram AL1A) and
regenerates the clock signals. Refer to figure 7-31 Ambilight
The LED driver is built around item no. 7B26 (diagram AL1A)
buffer.
and controls the LEDs. Refer to figure 7-34 LED driver.
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Circuit Descriptions Q551.1E LA 7. EN 67
+3V3
2B11
100n
7B26-1
27
TLC5946RHB
3B00-1 VCC
BLANK 1 8 31 4 PWM-R1
BLANK 0
PWM-CLOCK-BUF 150R 24 5 PWM-G1
GSCLK 1
3B18 26 6 PWM-B1
IREF 2
1K8 FB35 3 7 PWM-G3
MODE 3
PROG 4 3B00-4 5 1 8 PWM-R3
SCLK 4
SPI-CLOCK-BUF 150R 2 9 PWM-R2
SIN 5
SPI-DATA-IN-BUF 23 10 PWM-G2
SOUT 6
SPI-DATA-IN 3 6 11 PWM-B2
7
SPI-DATA-OUT 3B00-3 150R 3B21 150R 22 OUT 14 PWM-B3
XERR 8
FB20 +3V3 3B22 25 15 PWM-G4
XHALF 9
LATCH 2 3B00-2 7 10K 32 16 PWM-R4
XLAT 10
150R 17 PWM-B4
11
12 18 PWM-B5
12
13 19 PWM-G5
13
7
6
28 NC 20 PWM-R5
2B04-2
2B04-1
2B04-4
2B04-3
14
100p
100p
100p
100p
29 21 DATA-SWITCH
15
3B31
GND GND_HS +3V3
2
30
33
2K0
7B26-2
TLC5946RHB
34 VIA 42
35 41
VIA VIA
36 40
VIA
37
38
39
18770_217_100126.eps
100126
+24V
8 3B07-1 1
7B23-1
10K
BC847BS(COL)
6
2
2 3B07-2 7
1
10K
FB30
PWM-B1
3B35
+24V
+24V 7000 7001 7002 7003 7004 7005
99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 270R
3B36
5 3B07-4 4
BC847BS(COL)
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 3B37
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
3 3B07-3 6
4
10K
1 3B03-1 8
FB31 1K5
PWM-R1
3B03-2
2 7
+24V
1K5
3 3B03-3 6
3 3B13-3 6
1K5
7B25
10K
BC847BW 3 3B03-4
4 5
1K5
1
2B03
100n
5 3B13-4 4
2
10K
FB32
PWM-G1
18770_218_100126.eps
100126
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EN 68 7. Q551.1E LA Circuit Descriptions
In p u t c o n n e c to r O p e n in g
Te m p e ra tu re 1M 83 L E D d riv e r fo r c lip
sensor
LED
B u ffe r EEPROM
18750_208_100415.eps
100415
7.12 TCON For the basic application, refer to figure 7-37 TCON
architecture.
This section describes the application with the TCON
integrated on the SSB.
EEPROM
Control
PNX8550
Signals
Gamma
Reference Source Drive IC
Voltage
+3.3 V
+1.8 V
+16 V
Gate Drive IC
LC D P anel
SSB
18770_238_100127.eps
100402
For the TCON block diagram, refer to figure 7-38 TCON block
diagram.
2010-Oct-01 back to
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Circuit Descriptions Q551.1E LA 7. EN 69
(Dynamic
Transmitter
Contrast
Control)
Control)
Circuit)
Power
(Over
Right h alf
Drive
data
R 2 A ~E
LV D S Gate D river
C trl S ign als
R 2C LK R e c e iv er
Ve rtic a l & H o rizo n ta l
Tim in g g e n e ra tio n Source D river
C trl S ign als
I2 C ROM H s y n c/ Control
I2 C
S lav e M aster Vsync Signal
S S C L K (S p re a d Spectrum C lo c k) Output
DE
EEPROM
18770_239_100127.eps
100127
Notes to figure 7-38 TCON block diagram: • Timing Control Function: generates control signals to
• LVDS receiver: converts the data stream back into RGB column drivers and row drivers (Source Enable - SOE,
data and SYNC signals (Vsync, Hsync, Data Enable - DE) Gate Enable - GOE, Gate Start Pulse - GSP).
• ODC: Over Drive Circuit - to improve LC response For an overview of the TCON DC/DC converters, refer to figure
• Data Path Block: the video RGB data input to data path 7-39 TCON DC/DC converters.
block is delayed to align the column driver start pulse with
the column driver data
To G a te D riv e rs (G a te
VGH +2 8 V +3 5 V
H ig h Vo lta g e )
D C /D C
+ 12V C o n tro lle r To G a te D riv e rs (G a te
VGL -6 V -6 V
L o w Vo lta g e )
Tim in g C o n tro lle r IC
Vcc +3 V 3 +3 V 3
S u p p ly Vo lta g e
Tim in g C o n tro lle r IC
Vcc +1 V 8 +1 V 2
S u p p ly Vo lta g e
G a m m a R e fe renc e
Vre f +1 6 V +1 5 V 2
Vo lta g e
S o u rc e D riv e r S u p p ly
Vdd +1 6 V +1 5 V 6
Vo lta g e
18770_240_100128.eps
100128
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EN 70 7. Q551.1E LA Circuit Descriptions
2010-Oct-01 back to
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IC Data Sheets Q551.1E LA 8. EN 71
8. IC Data Sheets
This chapter shows the internal block diagrams and pin electrical diagrams (with the exception of “memory” and “logic”
configurations of ICs that are drawn as “black boxes” in the ICs).
8.1 Diagram B01 820400089943 Tuner, HDMI & CI, USB2513B (IC 7F25)
Block diagram
To EEPROM or
To Upstream Upstream SMBus Master
24 MHz
VBUS USB Data SDA SCL
Crystal
3.3 V
Bus- Serial
Power Upstream Regulator PLL Interface
Detect/ PHY
Vbus Pulse
Serial
Repeater Interface Controller
Engine
3.3 V
Regulator
TT
#1
... TT
#x
Port
Controller
CRFILT
PHY#1
Port #1
OC Sense
Switch Driver/
LED Drivers
... PHY#x
Port #x
OC Sense
Switch Driver/
LED Drivers
Pinning information
SDA / SMBDATA / NON_REM[1]
SCL / SMBCLK / CFG_SEL[0]
HS_IND / CFG_SEL[1]
VBUS_DET
RESET_N
VDD33
NC
NC
NC
27
26
25
24
23
22
21
20
19
VDD33 29 17 OCS_N[2]
USBDP_UP 31
SMSC 15 VDD33
USB2512/12A/12B
XTALOUT 32 14 CRFILT
USB2512i/12Ai/12Bi
XTALIN / CLKIN 33 13 OCS_N[1]
(Top View QFN-36)
PLLFILT 34 12 PRTPWR[1] / BC_EN[1]*
Ground Pad
RBIAS 35 (must be connected to VSS) 11 TEST
VDD33 36 10 VDD33
1
2
3
4
5
6
7
8
9
USBDM_DN[1]
USBDM_DN[2]
USBDP_DN[1]
USBDP_DN[2]
VDD33
NC
NC
NC
NC
18770_301_100217.eps
100217
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EN 72 8. Q551.1E LA IC Data Sheets
8.2 Diagram B01 820400089943 Tuner, HDMI & CI, LM75BDP (IC 7FD1)
Block diagram
VCC
LM75B
BIAS POINTER CONFIGURATION
REFERENCE REGISTER REGISTER
TEMPERATURE
BAND GAP COUNTER
REGISTER
TEMP SENSOR 11-BIT
SIGMA-DELTA
A-to-D TOS
TIMER
CONVERTER REGISTER
OSCILLATOR
COMPARATOR/ THYST
INTERRUPT REGISTER
POWER-ON
RESET OS
Pinning information
SDA 1 8 VCC
SCL 2 7 A0
LM75BDP
OS 3 6 A1
GND 4 5 A2
18770_300_100217.eps
100217
2010-Oct-01 back to
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IC Data Sheets Q551.1E LA 8. EN 73
Block diagram
PNX8550x
MEMORY
CONTROLLER
TS input MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single, dual or
OUTPUT quad channel)
DVB DVB-T/C
channel decoder
AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO analog CVBS
VIDEO ENCODER
OUTPUT analog Y/C
Low-IF
DIGITAL IF MULTI-
Direct-IF STANDARD Motion-accurate
VIDEO pixel processing
DECODER
SCALER,
AUDIO DEMOD DE-INTERLACE
SSIF, LR
AND DECODE AND NOISE
REDUCTION
Scatter/Gather
TS Demux
I2C PWM Px_x IR ADC SPI UART I2C GPIO Flash USB 2.0 SD Ethernet
x 10 Memory MAC
Card
Pinning information
ball A1 PNX8550xE
index area 2 4 6 8 10 12 14 16 18 20 22 24 26
1 3 5 7 9 11 13 15 17 19 21 23 25
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
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div. table
EN 74 8. Q551.1E LA IC Data Sheets
Block diagram
TPA3120D2
1 F
0.22 F
LIN BSR
22 H 470 F
RIN ROUT
1 F 0.68 F
PGNDR
PGNDL 0.68 F
1 F
BYPASS LOUT
22 H 470 F
AGND BSL
0.22 F
PVCCL
AVCC
PVCCR
VCLAMP
Shutdown
SD 1 F
Control
MUTE
GAIN0
GAIN1
} Control
Pinning information
PWP (TSSOP) PACKAGE
(TOP VIEW)
PVCCL 1 24 PGNDL
SD 2 23 PGNDL
PVCCL 3 22 LOUT
MUTE 4 21 BSL
LIN 5 20 AVCC
RIN 6 19 AVCC
BYPASS 7 18 GAIN0
AGND 8 17 GAIN1
AGND 9 16 BSR
PVCCR 10 15 ROUT
VCLAMP 11 14 PGNDR
PVCCR 12 13 PGNDR
I_18020_142.eps
100402
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IC Data Sheets Q551.1E LA 8. EN 75
Block diagram
Pinning information
VBST1 1 28 DRVH1
NC 2 27 LL1
EN1 3 26 DRVL1
VO1 4 25 PGND1
VFB1 5 24 TRIP1
NC
TPS53124
6 23 VIN
GND 7 22 VREG5
TEST1 8 21 V5FILT
NC 9 20 TEST2
VFB2 10 19 TRIP2
VO2 11 18 PGND2
EN2 12 17 DRVL2
NC 13 16 LL2
VBST2 14 15 DRVH2
18310_300_090319.eps
100416
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EN 76 8. Q551.1E LA IC Data Sheets
Block diagram
Pinning information
DFN8 (4 × 4) PowerSO-8
I_18010_083.eps
100402
2010-Oct-01 back to
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IC Data Sheets Q551.1E LA 8. EN 77
Block diagram
LD1117DT
Pinning information
DPAK
F_15710_166.eps
100402
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div. table
EN 78 8. Q551.1E LA IC Data Sheets
Block diagram
MODE0 HP Auto-MDIX
MODE1 Auto- 10M Tx 10M
MODE Control
MODE2 Negotiation Logic Transmitter TXP / TXN
Reset Transmit Section
nRST Control RXP / RXN
Management 100M Tx 100M
RMIISEL SMI Logic Transmitter
Control
MDIX
Control
TXD[0:3] XTAL1/CLKIN
TXEN PLL
100M Rx DSP System: Analog-to-
TXER XTAL2
TXCLK Logic Clock Digital
Data Recovery
Interrupt
Equalizer nINT
Generator
RMII / MII Logic
RXD[0:3]
RXDV 100M PLL
RXER Receive Section
RXCLK LED1
LED Circuitry
LED2
10M Rx Squelch &
CRS Logic Filters
COL/CRS_DV
Central
RBIAS
MDC 10M PLL Bias
MDIO
PHY
Address PHYAD[0:2]
Latches
Pinning information
VDD1A
RBIAS
RXDV
TXD3
RXN
RXP
TXN
TXP
32
31
30
29
28
27
26
25
VDD2A 1 24 TXD2
LED2/nINTSEL 2 23 TXD1
LED1/REGOFF 3 22 TXD0
SMSC
XTAL2 4 LAN8710/LAN8710i 21 TXEN
VDDCR 6
(Top View) 19 nRST
RXCLK/PHYAD1 7 18 nINT/TXER/TXD4
VSS
RXD3/PHYAD2 8 17 MDC
10
11
12
13
14
15
16
9
RXD2/RMIISEL
RXD1/MODE1
RXD0/MDE0
CRS
COL/CRS_DV/MODE2
MDIO
VDDIO
RXER/RXD4/PHYAD0
18770_302_100217.eps
100217
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IC Data Sheets Q551.1E LA 8. EN 79
Block diagram
Pinning information
18770_303_100217.eps
100217
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EN 80 8. Q551.1E LA IC Data Sheets
Block diagram
VDD 8
VDD/2
2 IN 1− VO1 1
−
+
3 BYPASS
6 IN 2−
− VO2 7
+
5 SHUTDOWN Bias 4
Control
Pinning information
D OR DGN PACKAGE
(TOP VIEW)
VO1 1 8 VDD
IN1− 2 7 VO2
BYPASS 3 6 IN2−
GND 4 5 SHUTDOWN
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IC Data Sheets Q551.1E LA 8. EN 81
Block diagram
RF_OUT
IP
RF_IN
IN
QP
AGC
QN
XTAL_OUT SDA
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EN 82 8. Q551.1E LA IC Data Sheets
Block diagram
2 BOOT1
BP
CLK1 Level
1 PVDD1
Shift
Current
f(IDRAIN1) + DC(ofst) Comparator
S Q
+
GND 4 R
R Q
+
f(IDRAIN1)
FB1 7 Overcurrent Comp
0.8 VREF + 3 SW1
RCOMP f(ISLOPE1) BP
f(IMAX1)
VDD2 f(ISLOPE1)
Ramp
Gen 1
TSD 1.2 MHz Divide CLK1
6 A 6 A Oscilator by 2/4 f(ISLOPE2)
EN1 5 SD1 Ramp
Gen 2
Internal
EN2 6 SD2 CLK2
Control
UVLO
150 k
SEQ 10 BP
FB1 Output
150 k Undervoltage 13 BOOT2
FB2 Detect
BP
CLK2 Level
14 PVDD2
Shift
Current
Comparator FET
f(IDRAIN2) + DC(ofst)
S Q Switch
+
GND 4 R
R Q
+
f(IDRAIN2)
FB2 8
Overcurrent Comp
0.8 VREF + 12 SW2
RCOMP f(ISLOPE2) BP
f(IMAX2)
5.25-V
BP 11 PVDD2
Regulator
150 k
BP
Level
ILIM2 9
Select
UDG-07007
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IC Data Sheets Q551.1E LA 8. EN 83
Block diagram
ISEL TTX ADDR SDA SCL Vcc Byp Vcc- L
LX
Preregulator
+U.V.lockout
+P.ON reset
Controller
PWM
Rsense EN
P-GND VSEL
VSEL
TTX EN
TEN
Linear Post-reg
+Modulator
VoRX +Protections
+Diagnostics I2C Diagnostics
VoTX
22KHz
Oscill. 22KHz Tone
TTX DETIN
Amp. Diagn.
EXTM
22KHz Tone
Freq. Detector
DSQOUT
DSQIN
V CTRL LNBH23
A-GND
Pinning information
1 n.c .
2 n.c .
3 n.c .
4 LX
5 P -G N D
6 S DA Epad Connected with power grounds and to
7 n.c . the ground layer through vias
8 n.c .
to dissipate the heat.
9 S CL
10 A D DR
11 DS Q out
12 DS Q IN
13 E XTM
14 TTX
15 B Y P
16 n.c .
17 n.c .
18 V c c -L
19 V c c
20 A -G N D
21 V oRX
22 V oTX
23 n.c .
24 n.c .
25 n.c .
26 n.c .
27 V up
28 IS E L
29 D E TIN
30 V C TRL
31 n.c .
32 n.c .
18770_306_100217.eps
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EN 84 8. Q551.1E LA IC Data Sheets
Block diagram
RLV0~6P/M,
LLV0~6P/M
SOE,POL
LVDS
Input
Source Source Source Source
1RxA~E Driver 1 Driver 2 Driver 5 Driver 8
Internal
2RxA~E
SSIC
3RxA~E VST(GSP)
4RxA~E
ODC + OPC Gate Gate in
1RxCLK TCON Driver panel
2RxCLK 1 1
mini-LVDS
3RxCLK
GCLK1, … , GCLK3, … , GCLK6
18770_310_100217.eps
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IC Data Sheets Q551.1E LA 8. EN 85
Block diagram
VI
Undervoltage +
Vina Lockout _
REF
Thermal
Shutdown
+
I AVG Comparator
_
REF
V V (COMP) 1-MHz
I Oscillator
P-Channel
Comparator S
+ Driver SW
R
_ Control Shoot-Through
Sawtooth
Logic Logic
Generator N-Channel
+
+
_
_ PG
SKIP Comparator +
_
+ _ LBO
Compensation R1
Gm
_ R2 +
+ +
_ _
EN REF
FB LBI P G ND GND
A. The internal feedback divider is disabled and the FB pin is directly connected
to the internal GM amplifier.
Pinning information
P G ND
SW
SW
PG
16 15 14 13
PGND 1 12 GND
Exposed
VIN 2 Thermal
11 GND
Pad
VIN 3 10 FB
EN 4 9 AGND
5 6 7 8
LBI
LBO
V IN A
S Y NC
18770_311_100217.eps
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EN 86 8. Q551.1E LA IC Data Sheets
Block diagram
VIN (12V)
BST
IN2 VL
LX1
3.3V
2A LX2 STEP-UP
STEP-DOWN OSC
PGND
GND2 FB1
COMP
OUT
AGND
FSEL
VL
SWI
P
150mV SWO AVDD
FB2 16V
1.5A
VIN 3.3V
VIN
VL VL
VL PGOOD
PGOOD
RESET CRST
REF
REF REF
AGND DRN
FBN FBP
AVDD
REF
Pinning information
PGND
DEL2
FSEL
OUT
EN2
EN1
IN2
IN2
VIN
VL
30 29 28 27 26 25 24 23 22 21
PGND 31 20 LX2
LX1 32 19 LX2
LX1 33 18 BST
TOP VIEW SWI 34 17 FB2
THIN QFN SWO 35 16 DEL1
FB1 36 MAX17113 15 REF
COMP 37 14 FBN
PGOOD 38 13 AGND
CRST 39 12 DRVN
AGND 40 11 CTL
1 2 3 4 5 6 7 8 9 10
MODE
GND2
CPGND
GON
DRN
DVRP
THR
DLP
FBP
SRC
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IC Data Sheets Q551.1E LA 8. EN 87
HVS SAWTOOTH
CM1
LOGIC GENERATOR
GM AMPLIFIER
FBB - SLOPE LX1
+ COMPENSATION LX2
VREF BUFFER
CONTROL
Ε
UVLO COMPARATOR LOGIC
-
+
RSENSE
CURRENT PGND1
0.75 VREF AMPLIFIER PGND2
680kHz
FREQ
OSCILLATOR
VL
CDEL AND
CURRENT LIMIT
EN SEQUENCE CONTROLLER THRESHOLD
VL
PVIN1,2 CB
SUPN
LXL1
LXL2
NOUT CONTROL
LOGIC
CURRENT
BUFFER CM2
LIMIT GM AMPLIFIER
COMPARATOR CURRENT AMPLIFIER
FBN - - FBL
+ - Ε +
+
0.2V VREF
CURRENT LIMIT SLOPE
THRESHOLD COMPENSATION
UVLO COMPARATOR
- SAWTOOTH
+ GENERATOR
0.4V
POUT
SUPP
Pinning information
LDO-CTL
LDO-FB
PGND2
PGND1
AGND
PVIN1
TEMP
PROT
LX2
LX1
40 39 38 37 36 35 34 33 32 31
PVIN2 1 30 COMP
CB 2 29 FBB
LXL1 3 28 RSET
LXL2 4 27 HVS
PGND3 5 ISL97653A 26 EN
40 LD 6X6 QFN
PGND4 6 TOP VIEW 25 CDEL
CM2 7 24 CTL
FBL 8 23 DRN
VL 9 22 COM
VREF 10 21 POUT
11 12 13 14 15 16 17 18 19 20
SUPP
FBP
PGND5
C1P
C2P
FBN
SUPN
NOUT
C1N
C2N
18770_307_100217.eps
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EN 88 8. Q551.1E LA IC Data Sheets
Personal Notes:
10000_012_090121.eps
090121
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 89
9. Block Diagrams
9-1 Wiring diagram 100 Hz Monet 32"
WIRING DIAGRAM 32" 100 Hz MONET
8584
TO BACKLIGHT
8150
8151
8583
8120
1M83
25P
1M84
1M72 1M59
25P
8P 60P 60P 4P 23P
TUNER
DVB-S
SSB LGD TCON (NON) DVBS
1319 1316 1M09 B 3104 313 6406.x
14P 12P 4P 3104 313 6401.x
CONDITIONAL ACCESS
(1011)
1M99
9P
1M99
9P
8399
1M95
MAIN POWER SUPPLY 11P
1M95
11P
8395
PSL DPS-199DP-3 A B
(1050)
1D38 1735
4P
USB
ETHER
NET
4P
USB
TUNER
(1074)
(1074)
SCART
HDMI
LOUDSPEAKER
(5215)
SPDIF
HDMI HDMI HDMI VGA
AL
AL
SCART
1M83
25P
2P3 2P3
1311 1308
8408
INLET
8411
1M59 (B13) 1M83 (AL1A) 1M84 (AL3A) 1M95 (B03C) 1M99 (B03C) 1M20 (B09A, B11D, B14F) 1735 (B03A) 1M72 (B13) 1JA1 (B11C) 1JA2 (B11C)
1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. +24V 14. +3V3 1. SPI-CLOCK-BUF 14. N.C. 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. LEFT-SPEAKER 1. +24V 1. N.C. 1. GND
2. AMBI-SPI-SDO-OUT 16. GND 2. +24V 15. BLANK 2. SPI-DATA-OUT2 15. TEMP-SENSOR 2. STANDBY 2. +12VD 2. GND 2. GND-AUDIO 2. +24V | |
3. AMBI-SPI-SDI-OUT-GI 17. GND 3. +24V 16. PROG 3. SPI-DATA-RETURN 16. GND 3. GND 3. GND 3. RC 3. GND-AUDIO 3. GND 36. VCC 19. VDD
4. GND 18. GND 4. +24V 17. GND 4. GND 17. GND 4. GND 4. GND 4. LED-2 4. RIGHT-SPEAKER 4. GND 37. VCC 20. VDD
5. AMBI-PWM-CLK_B2 19. GND 5. +24V 18. LATCH 5. PWM-CLOCK-BUF 18. GND 5. GND 5. LAMP-ON 5. +3V3-STANDBY | |
6. V-AMBI 20. GND 6. GND 19. SPI-CS 6. +3V3 19. GND 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1 41. VDD 24. VCC
7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. GND 20. +3V3 7. SPI-CS 20. GND 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD 1D38 (B03A) 42. VDD 25. VC
8. AMBI-LATCH1_G2 22. +24V 8. GND 21. PWM-CLOCK 8. LATCH 21. +24V 8. +12V 8. 3D-LR 8. +5V 1. LEFT-SPEAKER | |
9. GND 23. +24V 9. GND 22. GND 9. GND 22. +24V 9. +24V-AUDIO-POWER 9. POWER-OK 2. GND-AUDIO 60. GND 60. N.C.
10. AMBI-PROG_B1 24. +24V 10. GND 23. SPI-DATA-RETURN 10. PROG 23. +24V 10. GND-AUDIO 3. RIGHT-SPEAKER
11. AMBI-BLANK_R1 25. +24V 11. TEMP-SENSOR 24. SPI-DATA-IN 11. BLANK 24. +24V 11. MAINS-OK
12. V-AMBI 12. N.C. 25. SPI-CLOCK 12. +3V3 25. +24V
13. AMBI-LATCH2_DIS 13. N.C. 13. N.C. 18750_400_100412.eps
14. AMBI-SPI-CS-EXTLAMPSn 100916
2010-Oct-01 back to
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Block Diagrams Q551.1E LA 9. EN 90
8584
8510
TO BACKLIGHT
8151
LOUDSPEAKER
(5215) 8583
1M83
25P
1M84
25P
8301
8120
TUNER
DVB-S
1M20 1M59 1G51 1G50
1MP1 1M09
1319 1316 8P 1M09 23P 51P 41P
5P 4P
13P 12P 4P
CONDITIONAL ACCESS
B
1M99
9P
3104 313 6451.x
AMBILIGHT MODULE 30 LED
9P
8399
(1011)
1M95
11P
MAIN POWER SUPPLY
1M95
11P
8395
37 PLDD-P973B B
(1050)
1D38 1735
4P
USB
ETHER
NET
4P
USB
TUNER
SCART
HDMI
(1074)
(1074)
SPDIF
1G51 1MP1 HDMI HDMI HDMI VGA
51P 5P
SCART
AL
AL
Board Level Repair
200 Hz BOARD
1308
2P3
1M83
25P
2P3
1311
8408
8411
INLET
TWEETER R TWEETER L
(5213) (5213)
1M59 (B13) 1M83 (AL1A) 1M84 (AL3A) 1M95 (B03C) 1M99 (B03C) 1M20 (B09A, B11D, B14F) 1735 (B03A) 1G51 (B06B)
1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. +24V 14. +3V3 1. SPI-CLOCK-BUF 14. N.C. 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. LEFT-SPEAKER 1. +VDISP
2. AMBI-SPI-SDO-OUT 16. GND 2. +24V 15. BLANK 2. SPI-DATA-OUT2 15. TEMP-SENSOR 2. STANDBY 2. +12VD 2. GND 2. GND-AUDIO 2. +VDISP
3. AMBI-SPI-SDI-OUT-GI 17. GND 3. +24V 16. PROG 3. SPI-DATA-RETURN 16. GND 3. GND 3. GND 3. RC 3. GND-AUDIO 3. +VDISP
4. GND 18. GND 4. +24V 17. GND 4. GND 17. GND 4. GND 4. GND 4. LED-2 4. RIGHT-SPEAKER 4. +VDISP
5. AMBI-PWM-CLK_B2 19. GND 5. +24V 18. LATCH 5. PWM-CLOCK-BUF 18. GND 5. GND 5. LAMP-ON 5. +3V3-STANDBY |
6. V-AMBI 20. GND 6. GND 19. SPI-CS 6. +3V3 19. GND 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1 51. CTRL-DISP
7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. GND 20. +3V3 7. SPI-CS 20. GND 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD 1D38 (B03A)
8. AMBI-LATCH1_G2 22. +24V 8. GND 21. PWM-CLOCK 8. LATCH 21. +24V 8. +12V 8. 3D-LR 8. +5V 1. LEFT-SPEAKER
9. GND 23. +24V 9. GND 22. GND 9. GND 22. +24V 9. +24V-AUDIO-POWER 9. POWER-OK 2. GND-AUDIO 1M09 (B09A)
10. AMBI-PROG_B1 24. +24V 10. GND 23. SPI-DATA-RETURN 10. PROG 23. +24V 10. GND-AUDIO 3. RIGHT-SPEAKER 1. +24V
11. AMBI-BLANK_R1 25. +24V 11. TEMP-SENSOR 24. SPI-DATA-IN 11. BLANK 24. +24V 11. MAINS-OK 2. +24V
12. V-AMBI 12. N.C. 25. SPI-CLOCK 12. +3V3 25. +24V 3. GND
13. AMBI-LATCH2_DIS 13. N.C. 13. N.C. 4. GND
18750_401_100412.eps
14. AMBI-SPI-CS-EXTLAMPSn 100916
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 91
8584
8510
8301
TO BACKLIGHT
1MP1 1M09 8151
1319 1316
5P 4P
6P/14P 6P/14P
8583
8120
1M83
8735
25P
TUNER
1M84
DVB-S
25P
1M20 1M59 1G51 1G50
8P 1M09 25P 51P 41P
4P
CONDITIONAL ACCESS
B
1M99
9P
3104 313 6451.x
40" FSP175-4FS01
1M99
8399 3104 313 6452.x
9P
46" PLDG-P977 (1011)
1M95
11P
(1050)
AMBILIGHT MODULE 30/36 LED
1MP1 1G51
1735
4P
5P 51P
USB
ETHER
NET
USB
TUNER
EXT2
HDMI
200 Hz BOARD
SPDIF
HDMI HDMI HDMI VGA
EXT1
Board is part of display
(1074)
(1074)
Board Level Repair
8735
AL
AL
1308
2P3
2P3
1311
Component Level Repair
Only For Authorized Workshop
81P 81P 81P 81P
+ -
+ -
1M83
25P
SPEAKER RIGHT SPEAKER LEFT
(5213) (5214)
8408
8411
LCD DISPLAY
(1004)
MAINS INLET
SWITCH LEADING EDGE IR / LED BOARD
1M20 1820
2K10 ASSY 8P (1012) 6P
(8411)
(1110)
8191 6P
KEYBOARD CONTROL J1
1M59 (B13) 1M83 (AL1A) 1M84 (AL3A) 1M95 (B03C) 1M99 (B03C) 1M20 (B09A, B11D, B14F) 1735 (B03A) 1G51 (B06B) 1M09 (B09A)
1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. +24V 14. +3V3 1. SPI-CLOCK-BUF 14. N.C. 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. LEFT-SPEAKER 1. +VDISP 1. +24V
2. AMBI-SPI-SDO-OUT 16. GND 2. +24V 15. BLANK 2. SPI-DATA-OUT2 15. TEMP-SENSOR 2. STANDBY 2. +12VD 2. GND 2. GND-AUDIO 2. +VDISP 2. +24V
3. AMBI-SPI-SDI-OUT-GI 17. GND 3. +24V 16. PROG 3. SPI-DATA-RETURN 16. GND 3. GND 3. GND 3. RC 3. GND-AUDIO 3. +VDISP 3. GND
4. GND 18. GND 4. +24V 17. GND 4. GND 17. GND 4. GND 4. GND 4. LED-2 4. RIGHT-SPEAKER 4. +VDISP 4. GND
5. AMBI-PWM-CLK_B2 19. GND 5. +24V 18. LATCH 5. PWM-CLOCK-BUF 18. GND 5. GND 5. LAMP-ON 5. +3V3-STANDBY |
6. V-AMBI 20. GND 6. GND 19. SPI-CS 6. +3V3 19. GND 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1 51. CTRL-DISP
7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. GND 20. +3V3 7. SPI-CS 20. GND 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD
8. AMBI-LATCH1_G2 22. +24V 8. GND 21. PWM-CLOCK 8. LATCH 21. +24V 8. +12V 8. 3D-LR 8. +5V
9. GND 23. +24V 9. GND 22. GND 9. GND 22. +24V 9. +24V-AUDIO-POWER 9. POWER-OK
10. AMBI-PROG_B1 24. +24V 10. GND 23. SPI-DATA-RETURN 10. PROG 23. +24V 10. GND-AUDIO
11. AMBI-BLANK_R1 25. +24V 11. TEMP-SENSOR 24. SPI-DATA-IN 11. BLANK 24. +24V 11. MAINS-OK
12. V-AMBI 12. N.C. 25. SPI-CLOCK 12. +3V3 25. +24V
13. AMBI-LATCH2_DIS 13. N.C. 13. N.C. 18750_402_100412.eps
14. AMBI-SPI-CS-EXTLAMPSn 100916
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 92
LCD DISPLAY
(1004)
1P95 (B03C) 1735 (B03A) 1M20 (B09A, B11D, B14F) 1JA1 (B11C) 1JA2 (B11C)
1. LAMP-ON 1. LEFT-SPEAKER 1. LIGHT-SENSOR 1. N.C. 1. GND
2. BACKLIGHT-PWM_BL-VS 2. GND-AUDIO 2. GND | |
3. BACKLIGHT-BOOST 3. GND-AUDIO 3. RC 36. VCC 19. VDD
4. +3V3-STANDBY 4. RIGHT-SPEAKER 4. LED-2 37. VCC 20. VDD
5. STANDBY 5. +3V3-STANDBY | |
6. GND 6. LED-1 41. VDD 24. VCC
7. GND 1D38 (B03A) 7. KEYBOARD 42. VDD 25. VC
8. GND 1. LEFT-SPEAKER 8. +5V | |
9. +12V 2. GND-AUDIO 60. GND 60. N.C.
10. +12V 3. RIGHT-SPEAKER
11. +12V
12. +24V-AUDIO-POWER
13. GND
14. POWER-OK
SPEAKER R SPEAKER L
(5214) (5214)
SPEAKER
(5215)
1M95
14P
8395 8150
MAIN POWER SUPPLY 8151
PSL 42 PLDF-P991A 8120
(1050)
CONDITIONAL ACCESS
(1011)
1P95
14P
1D38 1735
4P
4P
3
USB
2P
TUNER
08
13
8408
SCART
HDMI
SPDIF
HDMI HDMI HDMI VGA
SCART
INLET
1040
MAINS 4P
SWITCH IR / LED BOARD
(1112)
(8408)
8191 18750_406_100916.eps
100928
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 93
8683
1M84
BB
25P
1M83
25P
8301
LOUDSPEAKER
(5210)
8153
AMBILIGHT MODULE 24 LED
1M99
9P
SSB SHARP TCON (NON) DVBS
B
TUNER
DVB-S
3104 313 6450.x
3104 313 6453.x
(1076)
1M95
11P
(1011)
(1074)
CONDITIONAL ACCESS
AL
USB
AL
1M99
9P
8399
1F24
5P
8395
1M95
WIFI
1P27
11P
5P
(1042)
1D38 1735
4P
USB
ETHER
1M83
25P
NET
4P
USB
TUNER
1308
2P3
8408
SCART
HDMI
2P3
1311
SPDIF
HDMI HDMI HDMI VGA
SCART
WIFI ANTENNA
WIFI ANTENNA
TO DISPLAY LCD DISPLAY TO DISPLAY
8411
INLET (1004)
(1074)
(1040)
(1074)
(1041)
1M20
LEADING EDGE
8P
2K10 ASSY 1S20 1L20
(1110) 6P 6P
MAINS 6P
IR / LED BOARD
TWEETER
SWITCH KEYBOARD CONTROL 1S20 (1112) TWEETER
(5213) (8411) (5213)
8191
1M59 (B13) 1M84 (AL3A) 1M83 (AL1A) 1M95 (B03C) 1M99 (B03C) 1M20 (B09A, B11D, B14F) 1F53 (B09A, B11D, B14F ) 1735 (B03A) 1M72 (B13) 1KA1 (B14E) 1KA2 (B14E)
1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. SPI-CLOCK-BUF 14. N.C. 1. +24V 14. +3V3 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. GND 1. LEFT-SPEAKER 1. +24V 1. GND 1. GND
2. AMBI-SPI-SDO-OUT 16. GND 2. SPI-DATA-OUT2 15. TEMP-SENSOR 2. +24V 15. BLANK 2. STANDBY 2. +12VD 2. GND 2. SDA-BL 2. GND-AUDIO 2. +24V | |
3. AMBI-SPI-SDI-OUT-GI 17. GND 3. SPI-DATA-RETURN 16. GND 3. +24V 16. PROG 3. GND 3. GND 3. RC 3. SCL-BL 3. GND-AUDIO 3. GND 11. VLS_15V6 11. VLS_15V6
4. GND 18. GND 4. GND 17. GND 4. +24V 17. GND 4. GND 4. GND 4. LED-2 4. GND 4. RIGHT-SPEAKER 4. GND 12. VLS_15V6 12. VLS_15V6
5. AMBI-PWM-CLK_B2 19. GND 5. PWM-CLOCK-BUF 18. GND 5. +24V 18. LATCH 5. GND 5. LAMP-ON 5. +3V3-STANDBY 5. BL-SPI-CLK | |
6. V-AMBI 20. GND 6. +3V3 19. GND 6. GND 19. SPI-CS 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1 6. GND 33. VCC_3V3 33. VCC_3V3
7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. SPI-CS 20. GND 7. GND 20. +3V3 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD 7. BL-SPI-SDO 1D38 (B03A) 1F24 (B01C) 34. VCC_3V3 34. VCC_3V3
8. AMBI-LATCH1_G2 22. +24V 8. LATCH 21. +24V 8. GND 21. PWM-CLOCK 8. +12V 8. 3D-LR 8. +5V 8. GND 1. LEFT-SPEAKER 1. +5V | |
9. GND 23. +24V 9. GND 22. +24V 9. GND 22. GND 9. +24V-AUDIO-POWER 9. POWER-OK 9. +3V3 2. GND-AUDIO 2. USB-DM3 78. VGH_35V 78. VGH_35V
10. AMBI-PROG_B1 24. +24V 10. PROG 23. +24V 10. GND 23. SPI-DATA-RETURN 10. GND-AUDIO 10. GND 3. RIGHT-SPEAKER 3. USB-DM3 79. VGL_-6V 79. VGL_-6V
11. AMBI-BLANK_R1 25. +24V 11. BLANK 24. +24V 11. TEMP-SENSOR 24. SPI-DATA-IN 11. MAINS-OK 11. BL-SPI-CSn 4. GND 80. GND 80. GND
12. V-AMBI 12. +3V3 25. +24V 12. N.C. 25. SPI-CLOCK 12. GND 5. GND
13. AMBI-LATCH2_DIS 13. N.C. 13. N.C. 13. BACKLIGHT-PWM_BL-VS
14. AMBI-SPI-CS-EXTLAMPSn 14. +3V3 18750_403_100412.eps
15. GND 100916
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 94
8683
1M84
25P
1M83
25P
8319
8316
8301
1M09
4P
AMBILIGHT MODULE 30 LED
8153
MAIN POWER SUPPLY
1M99
9P
PSU FSP253-4FS01 B
(1050)
(1076)
1M95
11P
(1074)
AL
8510
AL
8583
8151
1MP1 1F53 8120
1G51
5P 15P
80P 1M20 1F53 1M59 1G51 1G50
TUNER
DVB-S
8P 14P 25P 80P 80P
1M09
200 Hz BOARD 4P
CONDITIONAL ACCESS
USB
1M99
8399
1F24
9P
5P
8395
1308
2P3
1M95
11P
3104 313 6451.x
(1004)
3104 313 6452.x
8408
2P3 (1011)
1D38 1735
4P
USB
1M83
1311
25P
ETHER
4P
NET
USB
TUNER
SCART
HDMI
WIFI ANTENNA
WIFI ANTENNA
WIFI
1P27
5P
(1042)
8307
SPDIF
SCART HDMI HDMI HDMI VGA
(1040)
(1041)
8411
INLET
1316 (BB11) 1319 (BB11) 1L10 (BB1) 1M83 (AL1A) 1M84 (AL3A) 1M59 (B13) 1M95 (B03C) 1M99 (B03C) 1M20 (B09A, B11D, B14F) 1735 (B03A) 1G51 (B06B) 1F24 (B01C)
1. PROT-0 1. PROT-6 1. GND 1. +24V 14. +3V3 1. SPI-CLOCK-BUF 14. N.C. 1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. LEFT-SPEAKER 1. +VDISP 1. +5V
2. N.C. 2. N.C. 2. +3V3 2. +24V 15. BLANK 2. SPI-DATA-OUT2 15. TEMP-SENSOR 2. AMBI-SPI-SDO-OUT 16. GND 2. STANDBY 2. +12VD 2. GND 2. GND-AUDIO 2. +VDISP 2. USB-DM3
3. VRES+ 3. VRES- 3. V-SYNC 3. +24V 16. PROG 3. SPI-DATA-RETURN 16. GND 3. AMBI-SPI-SDI-OUT-GI 17. GND 3. GND 3. GND 3. RC 3. GND-AUDIO 3. +VDISP 3. USB-DM3
4. VRES+ 4. VRES- 4. GND 4. +24V 17. GND 4. GND 17. GND 4. GND 18. GND 4. GND 4. GND 4. LED-2 4. RIGHT-SPEAKER 4. +VDISP 4. GND
5. VRES+ 5. VRES- 5. BL-SPI-CSn 5. +24V 18. LATCH 5. PWM-CLOCK-BUF 18. GND 5. AMBI-PWM-CLK_B2 19. GND 5. GND 5. LAMP-ON 5. +3V3-STANDBY | 5. GND
6. VRES+ 6. VRES- 6. GND 6. GND 19. SPI-CS 6. +3V3 19. GND 6. V-AMBI 20. GND 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1 51. CTRL-DISP
7. VRES+ 7. VRES- 7. +3V3 7. GND 20. +3V3 7. SPI-CS 20. GND 7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD 1D38 (B03A)
8. VRES+ 8. VRES- 8. GND 8. GND 21. PWM-CLOCK 8. LATCH 21. +24V 8. AMBI-LATCH1_G2 22. +24V 8. +12V 8. 3D-LR 8. +5V 1. LEFT-SPEAKER
9. VRES+ 9. VRES- 9. BL-SPI-MOSI 9. GND 22. GND 9. GND 22. +24V 9. GND 23. +24V 9. +24V-AUDIO-POWER 9. POWER-OK 2. GND-AUDIO 1M09 (B09A)
10. VRES+ 10. VRES- 10. GND 10. GND 23. SPI-DATA-RETURN 10. PROG 23. +24V 10. AMBI-PROG_B1 24. +24V 10. GND-AUDIO 3. RIGHT-SPEAKER 1. +24V
11. VRES+ 11. VRES- 11. BL-SPI-CLK 11. TEMP-SENSOR 24. SPI-DATA-IN 11. BLANK 24. +24V 11. AMBI-BLANK_R1 25. +24V 11. MAINS-OK 2. +24V
12. VRES+ 12. VRES- 12. GND 12. N.C. 25. SPI-CLOCK 12. +3V3 25. +24V 12. V-AMBI 3. GND
13. VRES+ 13. VRES- 13. SCL-BL 13. N.C. 13. N.C. 13. AMBI-LATCH2_DIS 4. GND
14. VRES+ 14. VRES- 14. SDA-BL 14. AMBI-SPI-CS-EXTLAMPSn 18750_404_100528.eps
15. GND 100916
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 95
8683 8683
1M84
C-BALANCE BOARD
25P
1M83
25P
8301
1M09
4P
AMBILIGHT MODULE 36 LED
8153
MAIN POWER SUPPLY
1M99
9P
PSL DPS-138BP-1A
(1050)
(1076)
1M95
11P
(1074)
AL
8510
AL
8583
8151
1MP1 1F53 8120
1G51
5P 15P
80P 1M20 1F53 1M59 1G51 1G50
TUNER
DVB-S
8P 14P 25P 80P 80P
1M09
200 Hz BOARD 4P
CONDITIONAL ACCESS
USB
1M99
8399
1F24
9P
5P
8395
1308
2P3
1M95
11P
3104 313 6451.x
(1004)
3104 313 6452.x
8408
2P3 (1011)
1D38 1735
4P
USB
1M83
1311
25P
ETHER
4P
NET
USB
TUNER
SCART
HDMI
WIFI ANTENNA
WIFI ANTENNA
WIFI
1P27
5P
(1042)
8307
SPDIF
SCART HDMI HDMI HDMI VGA
(1040)
(1041)
8411
INLET
1316 (BB11) 1319 (BB11) 1L10 (BB1) 1M83 (AL1A) 1M84 (AL3A) 1M59 (B13) 1M95 (B03C) 1M99 (B03C) 1M20 (B09A, B11D, B14F) 1735 (B03A) 1G51 (B06B) 1F24 (B01C)
1. PROT-0 1. PROT-6 1. GND 1. +24V 14. +3V3 1. SPI-CLOCK-BUF 14. N.C. 1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1. +3V3-STANDBY 1. +12VD 1. LIGHT-SENSOR 1. LEFT-SPEAKER 1. +VDISP 1. +5V
2. N.C. 2. N.C. 2. +3V3 2. +24V 15. BLANK 2. SPI-DATA-OUT2 15. TEMP-SENSOR 2. AMBI-SPI-SDO-OUT 16. GND 2. STANDBY 2. +12VD 2. GND 2. GND-AUDIO 2. +VDISP 2. USB-DM3
3. VRES+ 3. VRES- 3. V-SYNC 3. +24V 16. PROG 3. SPI-DATA-RETURN 16. GND 3. AMBI-SPI-SDI-OUT-GI 17. GND 3. GND 3. GND 3. RC 3. GND-AUDIO 3. +VDISP 3. USB-DM3
4. VRES+ 4. VRES- 4. GND 4. +24V 17. GND 4. GND 17. GND 4. GND 18. GND 4. GND 4. GND 4. LED-2 4. RIGHT-SPEAKER 4. +VDISP 4. GND
5. VRES+ 5. VRES- 5. BL-SPI-CSn 5. +24V 18. LATCH 5. PWM-CLOCK-BUF 18. GND 5. AMBI-PWM-CLK_B2 19. GND 5. GND 5. LAMP-ON 5. +3V3-STANDBY | 5. GND
6. VRES+ 6. VRES- 6. GND 6. GND 19. SPI-CS 6. +3V3 19. GND 6. V-AMBI 20. GND 6. +12V 6. BACKLIGHT-PWM_BL-VS 6. LED-1 51. CTRL-DISP
7. VRES+ 7. VRES- 7. +3V3 7. GND 20. +3V3 7. SPI-CS 20. GND 7. AMBI-SPI-CS-OUTn_R2 21. +24V 7. +12V 7. BACKLIGHT-BOOST 7. KEYBOARD 1D38 (B03A)
8. VRES+ 8. VRES- 8. GND 8. GND 21. PWM-CLOCK 8. LATCH 21. +24V 8. AMBI-LATCH1_G2 22. +24V 8. +12V 8. 3D-LR 8. +5V 1. LEFT-SPEAKER
9. VRES+ 9. VRES- 9. BL-SPI-MOSI 9. GND 22. GND 9. GND 22. +24V 9. GND 23. +24V 9. +24V-AUDIO-POWER 9. POWER-OK 2. GND-AUDIO 1M09 (B09A)
10. VRES+ 10. VRES- 10. GND 10. GND 23. SPI-DATA-RETURN 10. PROG 23. +24V 10. AMBI-PROG_B1 24. +24V 10. GND-AUDIO 3. RIGHT-SPEAKER 1. +24V
11. VRES+ 11. VRES- 11. BL-SPI-CLK 11. TEMP-SENSOR 24. SPI-DATA-IN 11. BLANK 24. +24V 11. AMBI-BLANK_R1 25. +24V 11. MAINS-OK 2. +24V
12. VRES+ 12. VRES- 12. GND 12. N.C. 25. SPI-CLOCK 12. +3V3 25. +24V 12. V-AMBI 3. GND
13. VRES+ 13. VRES- 13. SCL-BL 13. N.C. 13. N.C. 13. AMBI-LATCH2_DIS 4. GND
14. VRES+ 14. VRES- 14. SDA-BL 14. AMBI-SPI-CS-EXTLAMPSn 18750_405_100528.eps
15. GND 100916
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 96
8684 8683
WIFI ANTENNA
1M83
1L00 1L01 1L02 1L03 1L04 1L00 1L01 1L02 1L03 1L04
25P
1M84
8685
25P
50P 50P 50P 50P 50P 50P 50P 50P 50P 50P
8584
1L11
1L12
C-BALANCE BOARD
25P
25P
C-BALANCE BOARD 8323
(1040)
3P 14P 14P BB (1053) 15P 14P 14P 14P 14P BB (1054)
1322 1319 1316 1L10 1L19 1L16 1319 1316
W
8321
8322
8319 8320
8316 8802
8301
1319 1322 1316
1MP1 8801
14P 3P 14P
8P
WIFI MODULE
AMBILIGHT MODULE 36 LED
AVPIP-BOARD
8153
LCD DISPLAY P
(1042)
8735
1M09
8735
8510
4P
4P 4P 12P 5P 6P
1N09 1M09 1EP2 1F24 1V24
8307
8151
(1075)
(1073)
PSU DPS-300AP-59
1M99
8399
9P
8127
(1050)
AL
AL
81P2
1F53 1F53 1G51
1M95
11P
8395
8110
8P 15P 51P 8583
TUNER
SPEAKER
DVB-S
SPEAKER 1M20 1M59 1G51 1G50
(5211) (5212) 8P 1M09 23P 51P 41P
200 Hz BOARD 4P
CONDITIONAL ACCESS
B
1F24
3104 313 6452.x
5P
1M99
Board is part of display (1011)
9P
1M95
11P
1D38 1735
4P
USB
ETHER
NET
4P
USB
TUNER
13 3
2P
HDMI
08
1EP2
1M83
12P
25P
6P
SPDIF
HDMI HDMI HDMI 1ECB VGA
SCART
CN1 CN2 CN3 CN3
81P 81P 81P 81P
8408
INLET
8191
8P 8P02
IR/LED BOARD
J (1114) 1B20 MAINS
3D IR TRANSMITTER 1M02
SWITCH UD (1102) 6P
(8408)
1M84 (AL3A,AL8B) 1322 (BB9) 1319 (BB9) 1316 (BB9) 1L10 (BB1) 1M83 (AL1A,AL5A) 1L19 (BB9) 1L16 (BB9) 1L12 (BB9) 1L11 (BB9) 1M95 (B03C) 1N09 (P02E) 1G51 (B06B) 1F24 (P02Q) 1V24 (P02Q)
1. SPI-CLOCK-BUF 14. N.C. 1. PROT-0 1. VRES+ / *N.C. 1. VRES- / *N.C. 1. GND 1. +24V 14. +3V3 1. N.C. 1. N.C. 1. GND. 1. GND. 1. +3V3-STANDBY 1. +24V 1. +VDISP 1. +5VUSB 1. +5VUSB
2. SPI-DATA-OUT(2) 15. TEMP-SENSOR 2. N.C. 2. VRES+ / *N.C. 2. VRES- / *N.C. 2. +3V3 2. +24V 15. BLANK 2. N.C. 2. N.C. 2. PROT-9 2. PROT-0 2. STANDBY 2. +24V 2. +VDISP 2. USBDM0 2. USBDM3
3. SPI-DATA-RETURN 16. GND 3. PROT-9 3. VRES+ 3. VRES- 3. V-SYNC 3. +24V 16. PROG 3. VRES+ 3. VRES- 3. GND 3. GND 3. GND 3. GND 3. +VDISP 3. USBDP0 3. USBDP3
4. GND 17. GND 4. VRES+ 4. VRES- 4. GND 4. +24V 17. GND 4. VRES+ 4. VRES- 4. +6VB 4. SPI-CS1 4. GND 4. GND 4. +VDISP 4. GND 4. GND
5. PWM-CLOCK-BUF 18. GND 5. VRES+ 5. VRES- 5. BL-SPI-CSn 5. +24V 18. LATCH 5. VRES+ 5. VRES- 5. GND 5. GND 5. GND | 5. GND 5. GND
6. +3V3 19. GND 1B20 (J1) 6. VRES+ 6. VRES- 6. GND 6. GND 19. SPI-CS 6. VRES+ 6. VRES- 6. +3V3 6. SPI-DATA1 6. +12V 51. N.C.
7. SPI-CS 20. GND 1. LIGHT-SENSOR 7. VRES+ 7. VRES- 7. +3V3 7. GND 20. +3V3 7. VRES+ 7. VRES- 7. GND 7. GND 7. +12V 1M20 (B09A)
8. LATCH 21. +24V 2. GND 8. VRES+ 8. VRES- 8. GND 8. GND 21. PWM-CLOCK 8. VRES+ 8. VRES- 8. N.C. 8. SPI-CLK1 8. +12V 1. LIGHT-SENSOR 1F24 (B01C) 1ECB (B04B)
9. GND 22. +24V 3. RC 9. VRES+ 9. VRES- 9. BL-SPI-MOSI 9. GND 22. GND 9. VRES+ 9. VRES- 9. GND 9. GND 9. +24V-AUDIO-POWER 2. GND 1M09 (B09A,P02E) 1. +5V 1. RXD2-MIPS
10. PROG 23. +24V 4. LED2 10. VRES+ 10. VRES- 10. GND 10. GND 23. SPI-DATA-RETURN 10. VRES+ 10. VRES- 10. GND 10. SPI-CS2 10. GND-AUDIO 3. RC 1. +24V 2. USB-DM3 2. 3D-VS
11. BLANK 24. +24V 5. +3V3-STANDBY 11. VRES+ 11. VRES- 11. BL-SPI-CLK 11. TEMP-SENSOR 24. SPI-DATA-IN 11. VRES+ 11. VRES- 11. GND 11. GND 11. MAINS-OK 4. LED-2 2. +24V 3. USB-DM3 3. GND
12. +3V3 25. +24V 6. LED1 12. VRES+ 12. VRES- 12. GND 12. N.C. 25. SPI-CLOCK 12. VRES+ 12. VRES- 12. SPI-CLK3 12. SPI-DATA2 5. +3V3-STANDBY 3. GND 4. GND 4. +5V
13. N.C. 7. KEYBOARD 13. VRES+ 13. VRES- 13. SCL-BL 13. N.C. 13. VRES+ 13. VRES- 13. GND 13. GND 6. LED-1 4. GND 5. GND 5. TXD2-MIPS
8. +5V 14. VRES+ 14. VRES- 14. SDA-BL 14. VRES+ 14. VRES- 14. SPI-DATA31 14. SPI-CLK2 1M99 (B03C) 7. KEYBOARD 6. 3D-LR
15. GND 15. GND 15. GND 1. +12VD 8. +5V
*C-balance board on pos (1054) 16. SPI-CS3 16. N.C. 2. +12VD 1M59 (B09A)
17. GND 17. GND 3. GND 1. AMBI-SPI-CLK-OUT 15. AMBI-TEMP 1M02 (UD)
18. SPI-CLK4 18. N.C. 4. GND 1EP2 (B04A,P02F) 2. AMBI-SPI-SDO-OUT 16. GND 1. RXD
19. GND 19. GND 5. LAMP-ON 1. GND 3. AMBI-SPI-SDI-OUT-GI 17. GND 2. GND
20. SPI-DATA4 20. +3V3 6. BACKLIGHT-PWM_BL-VS 2. AV4-PR 4. GND 18. GND 3. TXD
21. GND 21. GND 7. BACKLIGHT-BOOST 3. GND 5. AMBI-PWM-CLK_B2 19. GND 4. 3D-VS
22. SPI-CS4 22. +6V 8. 3D-LR 4. AV4-Y 6. V-AMBI 20. GND 5. RD-LR
23. GND 23. GND 9. POWER-OK 5. GND 7. AMBI-SPI-CS-OUTn_R2 21. +24V 6. +5V-IN
24. PROT-5 24. PROT-9 6. AV4-PB 8. AMBI-LATCH1_G2 22. +24V
25. GND 25. GND 7. GND 9. GND 23. +24V
1735 (B03A) 8. AUDIO-IN2-L 10. AMBI-PROG_B1 24. +24V
1. LEFT-SPEAKER 9. GND 11. AMBI-BLANK_R1 25. +24V
2. GND-AUDIO 10. AUDIO-IN2-R 12. V-AMBI
3. GND-AUDIO 11. GND 13. AMBI-LATCH2_DIS 18750_407_100917.EPS
4. RIGHT-SPEAKER 12. RESET-AVPIP 14. AMBI-SPI-CS-EXTLAMPSn 100930
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 97
68P
LOUT1 PX1 PX1 36
+VCC
34 TO DISPLAY
TO DISPLAY (TCON ON SSB)
CONDITIONAL MDO(0-7) BUFFER CA-MDO(0-7) MD0 TO TCON SSB LML
(TCON ON DISPLAY) 21
ACCESS
CA-MDI(0-7) MDI 13
LOUT2 PX2 PX2
3 GMA
7JC1 2
B07A DVBS-FE 7R02 7R01 B01K TUNER BRAZIL MAX9668ETP 1
STV6110AT STV0903BAC 41
N.C.
1R01
4 DVB-S 21 IP 7 DVB-S 78 TS-DVBS-VALID 9F27-4 TS-FE-VALID R23 TNR_SER1_MIVAL TIMING GAMMA 1JA2
TUNER CHANNEL TO DISPLAY
SAT IN 20 IM 8 75 TS-DVBS-SOP 9F27-2 TS-FE-SOP R22 CONTROL REF 60
DECODER TS-DVBS-CLOCK 9F28 TS-FE-CLOCK
TNR_SER1_SOP OR SYST
32 XTAL 122 74 T22 1G51 59
TNR_SER1_MICLK 200Hz BOARD
30 18 QP 12 73 TS-DVBS-DATA 9F27-1 TS-FE-DATA T21 TNR_SER1_DATA 51 GMA
N.C. 48
19 QM 11 50
1R10
16M
I2C 40
2 AGC 16 SSB 3104 313 6401.* 49
31 3104 313 6452.* RML
27
3104 313 6453.* 40
25
B01F HDMI & CI TO DISPLAY
+5V-TUN-PIN
7F75 LOUT3 PX3 PX3 B11B TCON DC/DC
+VDD
24 (TCON ON SSB)
UPC3221GV 20
1T01 B02I ANALOG VIDEO 7JD1
1 TO DISPLAY TO TCON SSB
TH2603 VCC MAX17119ET 19
1F75 (TCON ON DISPLAY) +VCC
10 TUN-IF-P 5F73 2F90 1 4 2F74 2 AGC AMPLIFIER 7 3F79-1 PNX-IF-P AE12 13
IF-OUT1 TUNER_P
BANDPASS
5F70
LOUT4 PX4 PX4 GCLK LEVEL CLK
2F78 40 2
11 TUN-IF-N 2 5 3 6 3F79-4 FILTER PNX-IF-N AF12 SHIFTER
RF IN IF-OUT2 TUNER_N 1
SAW 36MHZ17 4 IN OUT 4
7F70 AGC CONTROL
3
MAIN HYBRID SELECT-SAW
SSB 3104 313 6406.*
B02E 2 3104 313 6401.*
TUNER 3104 313 6473.*
CONTROL 1
PNX-IF-AGC AD12 +VDISP
IF_AGC B14A TCON CONTROL (SHARP) B14E MINI LVDS (SHARP)
OR
1KA1
81
7KAA B14C P GAMMA & 58
UPD809900F VOM & FLASH
B01H HDMI B04D HDMI B04A ANALOGUE EXTERNALS A 7KQB
53
M25P32 42
SPI
1E01
15 AV1-R AC13
PNX85500 PX1
SDO
SCS
SCK
FLASH
+VDD
41
37
36
AV1_R +VCC TO DISPLAY
1 11 AV1-G AE13 TO TCON SSB 50 (TCON ON SSB)
AV1_G
7 AVI-B AD13 L_LV
AV1_B 13
7 20 AV1-CVBS AB15
CVBS_Y1 PX2
EXT 1 11 7E05 13
19 GMA
15 7E09-1 7KQA 2
16
16 AV1-BLK ISL24837IRZ 1
20
B02G
21
CONTROL TIMING
8 AV1-STATUS
SCART1 B02G 7E06 CONTROL REF 1KA2
CONTROL CVBS-MON-OUT1 AF11 VOLTAGE 81
CVBS1_OUT GEN
1E02 59
15 AV4-PR AC14 GMA
PR_R_CE 48
1 11 AV4-Y AE14
Y_G2
7EC1 7 AV4-PB AD14 50
SII9287BCNU 7
PB_B2
20 AV2-CVBS AB14 R_LV
CVBS_Y2 13
1P05 EXT 2 11 7E04 PX3 TO DISPLAY
2 25
(TCON ON SSB)
1 DRX2+ 90 16
15
7E09-2 B14D MPD 24
3 16 +VDD
DRX2- 89 AV2-BLK TO TCON SSB 20
20 B02G 7KUE
1
4
2
87 21
DRX1+ CONTROL MAX17079GTL 19
SCART2 8 AV2-STATUS +VCC
6 DRX1- 86 B02G 13
RXD PX4
7 DRX0+ 84 NOT FOR 21:9 TV-SETS CONTROL CS(1-12) LEVEL CS(1U-12U)
9 DRX0- 83 2
SHIFTER
18
19
10 1
DRXC+ 81 1EP2
HDMI SIDE 12 DRXC- 80 2 AV4-PR
CONNECTOR SSB 3104 313 6451.* SSB 3104 313 6450.*
4 AV4-Y 3104 313 6452.* 3104 313 6453.*
TO 1EP2
6 AV4-PB B02E CONROL
AVPIP-BOARD
HDMI 12 RESET-AVPIP B01C USB HUB
B02G +5V-USB2
1P04
1 ARX2+ 23
SWITCH ONLY FOR 21:9 TV-SETS
CONTROL 1P08
1
1
3 ARX2- 22 R26 USB-DM 9F26 USB-DM2 2
1
SIDE USB
3 2
USB_DN
2
4
RXA
7 17 1
ARX0+ R-VGA AF16 VGA_R B02A FLASH B01B FLASH Only 8000 Serie
9 16 2 G-VGA
18
ARX0- AD16
10
19
15
VGA_G
5
CONNECTOR
11
1
VGA
FLASH 1 USB-DM1 2
XIO_D XIO-D(00-07) SIDE USB
3 2
1P03 31 3
CONNECTOR 2 USB-DP1 CONNECTOR
1 BRX2+ 42
512MB 4
4
3 BRX2- 41 B04B ANALOGUE EXTERNALS B
33
1
2
1F25
54M
6 BRX1- 39 1E04
RXB 2 AV3-PR AC15 12,37 1
7 36 PR PR_R_C1 VCC +3V3
BRX0+ 6 USB-DM3 2
32 TO WIFI MODULE
9 BRX0- 35 1E08 3
18
10 33 EXT 3 Y Y_G1
BRXC+ B02B MEMORY 4 AVPIP-BOARD
HDMI 2 12 BRXC- 32 1E03 A2 5
AV3-PB AD15 VREF_1 DDR2-VREF-CTRL2 26 RESET-USBn
CONNECTOR 2 V1 B02G
PB PB_B1 VREF_2 DDR2-VREF-CTRL3 Only 9000 Serie
7B00 7B02
63 HDMIA-RXC- W26 EDE1116AGBG EDE1116AGBG 7B03 7B01
D(16-23)
D(24-31)
6 CRX1- 68 TXC_N RXC_A_N
D(8-15)
RXC
D(0-7)
60 HDMIA-RX0+ V25 EDE1108AGBG EDE1108AGBG EDE1108AGBG EDE1108AGBG
7 CRX0+ 66 TX0_P RX2_A_P
61 HDMIA-RX0- V26
9 CRX0- 65 TX0_N RX2_A_N
18
VDDL
VREF
VDDL
VREF
VDDL
VREF
9,27,64 TX2_N RX0_A_N
+3V3-HDMI VCC33 3S0W W24
+3V3 RREF
A1 E2 A1 E2 A1 E2 A1 E2
SSB 3104 313 6450.*
A DDR2-A(0-14)
3104 313 6453.*
+1V8 3104 313 6406.*
3104 313 6401.*
DDR2-VREF-DDR
3104 313 6451.*
SSB 3104 313 6473.*
3104 313 6452.*
18750_410_100412.eps
100916
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 98
68P
7S05 PVCC_R
LM324P 1735
ADAC(1) 12 14 +AUDIO-L 5 22 LEFT-SPEAKER 1
CONDITIONAL MDO(0-7) BUFFER CA-MDO(0-7) MD0 AD7 OUT-L
ADAC_1 IN-L
ACCESS
CLASS D 2
CA-MDI(0-7) MDI POWER
SPEAKER L
AMPLIFIER
3
B07A DVBS-FE 7R02 7R01 B01K TUNER BRAZIL ADAC_2
AE7 ADAC(2) 10 8 -AUDIO-R 6
IN-R
STV6110AT STV0903BAC
1R01 7D15 15 RIGHT-SPEAKER 4
DVB-S DVB-S 9F27-4 OUT-R
4 21 IP 7 78 TS-DVBS-VALID TS-FE-VALID R23 A-PLOP
TNR_SER1_MIVAL A-STBY 2 SPEAKER R
TUNER IM CHANNEL 75 TS-DVBS-SOP 9F27-2 TS-FE-SOP R22 B03H STANDBY A-PLOP SD
SAT IN 20 8 B04E
DECODER TNR_SER1_SOP
32 XTAL 122 74 TS-DVBS-CLOCK 9F28 TS-FE-CLOCK T22 1D38
TNR_SER1_MICLK AC19 AUDIO-MUTE-UP 4 1
30 18 QP 12 73 TS-DVBS-DATA 9F27-1 TS-FE-DATA T21 PO_7 MUTE
TNR_SER1_DATA
19 QM 11 5D03 2
1R10
16M
7D03 7D03
2 AGC 16 SSB 3104 313 6401.* DETECT2 3
31 3104 313 6452.* B03C MAIN SWITCH A-STBY STANDBY &
MAINS-OK PROTECTION
3104 313 6453.* B03C DETECT SUBWOOFER
(OPTIONAL)
B01F HDMI & CI 7F75
+5V-TUN-PIN
1T01
UPC3221GV
B02I ANALOG VIDEO
B04E HEADPHONE B01J TEMP SENSOR + HEADPHONE
1
TH2603 VCC
2F90 1F75 2F74 AGC AMPLIFIER 7 3F79-1 7EE0-1 7EE0-2
10 TUN-IF-P 5F73 1 4 2 PNX-IF-P AE12
IF-OUT1 TUNER_P AD1 RESET-AUDIO A-PLOP B03A
BANDPASS PO_6
5F70
B04A
11 TUN-IF-N 2 5 2F78 3 6 3F79-4 FILTER PNX-IF-N AF12
RF IN IF-OUT2 TUNER_N
SAW 36MHZ17 4 IN OUT
7F70 AGC CONTROL
MAIN HYBRID SELECT-SAW
7EE1
B02E TPA6111A2DGN
TUNER
CONTROL PNX-IF-AGC AD12
IF_AGC
HEADPHONE
AMPLIFIER
5
SHUTDOWN 1328
B01H HDMI B04D HDMI B04A ANALOGUE EXTERNALS A B02D PNX85500: AUDIO VO_1
1 AMP1 2
1E01-1 AF7 ADAC(3)
3EA7-1 7S05 2
3 AP-SCART-OUT-L AUDIO-OUT-L 1 3 ADAC(5) AE6 ADAC3 IN-1 7 AMP2 3
1 ADAC_5 VO_2
7EC1 1 HEADPHONE
1 AP-SCART-OUT-R 3EA7-4 AUDIO-OUT-R ADAC(6) AD6 ADAC(4) 6 8
SII9287BCNU 7 5 AF6 ADAC_6 IN-2 OUT 3.5mm
7 ADAC4 VDD +3V3
11
1P05 6 AUDIO-IN1-L AE10 AIN1_L
PNX85500
1 15
DRX2+ 90 16
21
4
2
DRX1+ 87
SCART1 B02E CONROL
6 DRX1- 86
RXD 1E02
7 DRX0+ 84
1 3 AP-SCART-OUT-L 7E01
9 DRX0- 83 A-PLOP +5V-USB2
18
19
1
R26 USB-DM 9F26 USB-DM2 2
CONNECTOR 11
USB_DN SIDE USB
3 2
6 AUDIO-IN2-L AD10 R25 USB-DP 9F25 USB-DP2 3
15 AIN2_L USB_DP CONNECTOR
HDMI 16 4
4
1P04 2 AUDIO-IN2-R AC10 Only 8000 Serie
1 23
SWITCH 20
21 AIN2_R
ARX2+ SCART2 NOT FOR 21:9 TV-SETS B02A FLASH B01B FLASH 7F25
3 ARX2- 22 USB2513-AEZG
1
1EP2 +5V-USB1
2
4 ARX1+ 20
8 3 1P07
6 ARX1- 19 7F20 USB 1
RXA 10 4
NAND04GW3B2DN6F 30 HUB
1
7 ARX0+ 17 2
12 RESET-AVPIP 1 USB-DM1
SIDE USB
3 2
9 16 B02G 31
18
2 CONNECTOR
10 ARXC+ 14 CONTROL 4
FLASH
4
ONLY FOR 21:9 TV-SETS
HDMI 3 12 ARXC- 13 XIO_D XIO-D(00-07)
33
CONNECTOR B04B ANALOGUE EXTERNALS B +5V 1F24
512MB
1F25
54M
1E08 1
6 AUDIO-IN3-L AE9 32 6 USB-DM3 2
AIN3_L TO WIFI MODULE
9,27,64 USB-DP3 3
+3V3-HDMI VCC33 12,37 7 OR
AUDIO IN VCC +3V3
4 AUDIO-IN3-R AF9 4 AVPIP-BOARD
L+R AIN3_R
RESET-USBn 5
26
B02G
Only 9000 Serie
1E09
2 AUDIO-IN4-L AD9
AIN4_L
1P03 VGA (OR DVI) B02B MEMORY
1 BRX2+ 42 AUDIO 3 AUDIO-IN4-R AC9 B05A DDR
AIN4_R
3 BRX2- 41 1
+3V3
1
2
4 BRX1+ 39
6 BRX1- 39 1E07 7S09
RXB DQ DDR2-D(0-31)
2
7 BRX0+ 36 DIGITAL 1 SPDIF-OUT 3 & 7B00 7B02
AUDIO 1 SPDIF-OUT-PNX AF5 EDE1116AGBG EDE1116AGBG 7B03 7B01
D(16-23)
D(24-31)
9 35 SPDIF_OUT
D(8-15)
BRX0-
D(0-7)
18
19
VDDL
VREF
VDDL
VREF
VDDL
VREF
VDDL
VREF
62 HDMIA-RXC+ W25
1 CRX2+ 72 TXC_P RXC_A_P
63 HDMIA-RXC- W26
3 CRX2- 71 TXC_N RXC_A_N
60 HDMIA-RX0+ V25 A1 E2 A1 E2 A1 E2 A1 E2
1
56 HDMIA-RX2+ T25
19
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 99
D(16-23)
D(24-31)
CC_DAT3 XC9572XL
D(8-15)
1M59
D(0-7)
2 SDIO-CMD W6 EDE1108AGBG EDE1108AGBG EDE1108AGBG EDE1108AGBG 1
Pin9
CMD 22 AMBI-SPI-CLK-OUT
Pin1
5 SDIO-CLK W1
Pin2
CLK 2
Pin3
27 AMBI-SPI-SDO-OUT
Pin4
7 SDIO-DAT0 W5 SDRAM SDRAM SDRAM SDRAM PXCLK54
Pin6 Pin5
DAT_0 43 23 AMBI-SPI-SDI-OUT_G1 3
B02E
Pin8 Pin7
8 SDIO-DAT1 W4 128MB 128MB 128MB 128MB
DAT_1 29 AMBI-PWM-CLK_B2 5
9 SDIO-DAT2 W3 PNX-SPI-CLK 41
SD-CARD DAT_2 30 AMBI-SPI-CS-OUTn_R2 7
10 SDIO-CDn U6 PNX-SPI-SDI 40 CPLD 8
CONNECTOR SDCD 31 AMBI-LATCH1_G2
12 SDIO-WP V6 PNX-SPI-SDO 39
SDWP 19 AMBI-PROG_B1 10
F8 E8 F8 E8 F8 E8 F8 E8 20 AMBI-BLANK_R1 11
28 AMBI-LATCH2_DIS 13
DDR2-A(0-13)
B04C ETHERNET + SERVICE A
DDR-CLK_N 21 AMBI-SPI-CS-EXTLAMPSn 14
CLK_N B02G
7E10 DDR-CLK_P 32 AMBI-TEMP 15
CLK_P
1N00 LAN8710A-EZK
ETH-RXD SDCD TO AMBILIGHT
ETHERNET ETH-TXD SDWP B06C AMBILIGHT 7GA0 B09A NON DVBS MODULE
XC9572XL CONNECTOR BOARD
7 ETH-RXCLK AA3 B02H POWER SENSE+1V1 SSB 3104 313 6406.*
AF1 16 BACKLIGHT-PWM_BL-VS
TXCLK VDD_1V1 B03B B03C 3104 313 6401.*
20 ETH-TXCLK AA2 AA15 SENSE+1V2 1M59 PNX-SPI-CS-BLn 3
RXCLK VDDA_1V2 B03D 3104 313 6450.*
ETHERNET 22 AMBI-SPI-CLK-OUT 1 3104 313 6453.*
PNX-SPI-CSBn 5 B02E
CONNECTOR AMBI-SPI-SDO-OUT 2
RJ45
AE17
PNX-SPI-CLK 41 CPLD
27
3
B14F CONNECTORS
23 AMBI-SPI-SDI-OUT_G1 1F53
1E70
25M
PNX-SPI-SDI 40
29 AMBI-PWM-CLK_B2 5 2
PNX-SPI-SDO 39
AF17 30 AMBI-SPI-CS-OUTn_R2 7 I2C 3
31 AMBI-LATCH1_G2 8 18 BL-SPI-CLK 5
19 RESET-ETHERNETn 19 AMBI-PROG_B1 10 12 BL-SPI-SDO 7
1
3104 313 6453.* R26 USB-DM 9F26 USB-DM2 2
SIDE USB
3 2
USB_DN
B01B FLASH B01A COMMON INTERFACE USB_DP
R25 USB-DP 9F25 USB-DP2 3
CONNECTOR
AC5 PXCLK54 4
4
1P00 7F00 CLK_54_OUT B06C B13
AE4 RESET-SYSTEMn Only 8000 Serie
1 MOCLK CA-MOCLK K24 RESET_SYS B01K B02G
20 U23 SELECT-SAW
VS_2 GPI0_11 B01F
62 MOVAL CA-MOVAL L23 BACKLIGHT-PWM 7F25
MOVAL U23
L22 GPI0_11 B13 USB2513-AEZG
63 MOSTRT CA-MOSTRT 3S4B +5V-USB1
MOSTRT 3D-VS-DISP 3 1P07
USB 1
4
CA-MDI(0-7) MDO B04C ETHERNET + SERVICE 30 HUB
1
7F01 1E06 1 USB-DM1 2
SIDE USB
3 2
Y23 RXD1-MIPS 31 USB-DP1 3
GPI0_2 2 2 CONNECTOR
UART 4
4
Y24 TXD1-MIPS 3 SERVICE
GPI0_3 33
MDO(0-7) CA-MDO(0-7) MDI CONNECTOR
COMMON INTERFACE
1 +5V 1F24
1F25
7F02
54M
7F03 B02A FLASH 1
7F20
PCMCIA 32 6 USB-DM3 2
NAND04GW3B2DN6F
B04B ANALOGUE EXTERNALS B 7 USB-DP3 3
TO WIFI MODULE
OR
NAND CA-A(00-14) XIO-A(0-14) XIO_A
GPI0_5
W22 TXD2-MIPS 4 AVPIP-BOARD
FLASH CONDITIONAL 7F04 3D-LR 1ECB 5
12,37 26 RESET-USBn
ACCESS 7F05 B02G
VCC +3V3 6 5
3D Only 9000 Serie
4 3
512MB B03C +5V 2 1 CONNECTOR
XIO_D B06B 3D-VS
CA-D(0-7) XIO-D(00-15)
68 W21 RXD2-MIPS
GPI0_4
XIO-D(00-07)
2
INP OUTP
CONTROL
AV2-STATUS AE24
B04A CADC_3 3
LCD-PWR-ONn AC20 AF17 GND
B03H P2_0 XTAL_O
ENABLE -3V3-5V
+12V B03E
B04D HDMI AD18 RESET-USBn +3V3-STANDBY ENABLE -1V8
P1_1 B03G B03B B03D
TO PIN: AD21 ENABLE-3V3n DETECT2
7EC0 P2_7 B02G B03A
1P02-13
EF
1P03-13 PCEC-HDMI CEC-HDMI AF19
P1_2 AF18 SEL-HDMI-ARC 1M99
P0_4 B02D
1P04-13 AE20 LAMP-ON 5
1
P2_2
2
1P05-13 7EC1
AA18 RESET-DVBS BACKLIGHT-PWM_BL-VS 6 TO
SII9187ACNU P0_1 B07A B06C
B02C HDMI_DV AE18 RESET-ETHERNETn BACKLIGHT-BOOST 7 POWER
ARX-HOTPLUG 31 P0_3 B04C B01E SUPPLY
1P04-19 HDMIB-RC HDMI_RX AC21 POWER-OK 9
HDMI
18
P2_6
19
BRX-HOTPLUG 35 8
1P03-19 AB19 RESET-AUDIO 3D-LR
CRX-HOTPLUG 41 SWITCH P0_6 B04E B02E
4x HDMI 1P02-19 3S0W AA20 BACKLIGHT-PWM-ANA-DISP
DRX-HOTPLUG 45 W24 P1_3
CONNECTOR 1P05-19 +3V3 RREF AC19 AUDIO-MUTE-UP 1M95
P0_7 B03A TO
AF20 STANDBY 2 POWER
P2_3 18750_412_100412.eps
SUPPLY 100916
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 100
3S6D
3S6E
B02E
B25 3S5Y SDA-SSB
3_SDA
A24 3S5Z SCL-SSB
3_SCL
3EC5
3EC3
3FD3
3FD4
3FE9
3FE8
3R00
3R01
+3V3 +3V3RF
3T61
3T51
AIN-5V
ERR
PNX85500 13
53 54 46 45 1 2 98 97 6 9
3EC1-1
3EC1-3
3S6A
3R15
3R14
3S69
CONTROL 1P04
C25 3S56 SDA-UP-MIPS 1F52 7EC1 7FE0 7FD1 7R01 W21 SDAT 7T50
29 ARX-DDC-SDA 16
1
2
1_SDA 3F63 3 SII9287B TC90517FG LM75BDP STV903BAC LNBH23QT
C26 3S57 SCL-UP-MIPS SII9187A W22 SCLT
DEBUG 30 ARX-DDC-SCL 15
1_SCL 3F62 1 DEMODULATOR TEMP CHANEL DEC LNB
7F52 ONLY
18
19
HDMI BIN-5V SENSOR DVBS CONTROLLER
3F60
3F59
M25P05-AVMN6P B02G B02G PNX85500: STANDBY MUX HDMI
CONTROLER
5 6 CONNECTOR 3 13 12
3ECA-1
3ECA-2
ERR ERR ERR
FLASH 6 PNX-SPI-CLK AF24 +3V3-STANDBY ERR 1P03 42 28 31
8 SPI_CLK 23
3 PNX-SPI-WPn AE22 STANDBY 7F58 33 BRX-DDC-SDA 16 7R02
1
+3V3-STANDBY VCC
2
P6_5
M24C64 STV6110A
3S6W
512K 1 PNX-SPI-CSBn
3S6V
AF23
SPI_CSB 34 BRX-DDC-SCL 15
5 PNX-SPI-SDO AE23 ERR ERR 3S2F
18
SPI_SDO
19
15 53 AC23 EEPROM CIN-5V SATELITE
2 PNX-SPI-SDI AF25 SPI_SDI MC_SDA (NVM) TUNER
3S2G HDMI RES RES
STANDBY AC24 CONNECTOR 2
MC_SCL B01H
3ECA-3
3ECA-4
SW ERR
HDMI ERR
RES 1P02
35 36
39 CRX-DDC-SDA 16
1
2
+3V3-STANDBY
MAIN NVM
40 CRX-DDC-SCL 15
SW
B01B
18
FLASH
19
DIN-5V
3S1G
3S1H
1F51 HDMI
AE21 RXD-UP 3F65 3 uP
CONNECTOR 1
3FBF-2
3FBF-1
7F20 P3_0 LEVEL SHIFTED +3V3 1P05
AF21 TXD-UP 3F64 1 FOR DEBUG
NAND04GW3B2DN6F DRX-DDC-SDA 16
P3_1 43
1
HDMI
2
USE ONLY
3ECU-2
3ECU-4
CONNECTOR
FLASH 44 DRX-DDC-SCL 15 SSB 3104 313 6401.*
B02A B02I SIDE
18
Y25 DDCA-SDA
19
(4Gx16) DDC_A_SDA 3104 313 6452.*
FLASH 3104 313 6453.*
Y26 DDCA-SCL
XIO-D(00-07) XIO_D DDC_A_SCL +3V3 B01I VGA
HDMI_DV B04C ETHERNET + SERVICE +5V-EDID +5V-VGA
MAIN
3S83
3S84
1E06
3ECP-3
3ECP-1
SW
3FC1
3FC2
Y23 RXD1-MIPS 3E53-4 3E53-3 1E05
3
GPIO_2 9FC1 12
10
47 VGA-SDA-EDID-HDMI
15
3E53-2 3E53-1 UART
5
Y24 TXD1-MIPS 2
GPIO_3 SERVICE EDID
48 VGA-SCL-EDID-HDMI 9FC3 15
1 CONNECTOR SW
1
B02I B02I
6
PNX85500: ANALOG VIDEO
11
AD25 3S5V-1 9FC2
B05A DDR
VGA_EDID_SDA
VGA-SDA-EDID VGA
3S5V-3 CONNECTOR
AD24 VGA-SCL-EDID 9FC4
VGA_EDID_SCL
7B00
EDE1116AEBG 7B01 RES
EDE1108AGBG EDE1108AGBG ANALOGUE
VIDEO B11C MINI LVDS (LGD) B11A TCON CONTROLLER (LGD) B14C P GAMMA & VCOM & FLASH (SHARP) B14A TCON CONTROL
(SHARP)
SDRAM SDRAM
9S15 1KQB
VGA-SDA-EDID-TCON
1
9S14
D(8-15)
D(0-7)
B02B VGA-SCL-EDID-TCON
2
VCC_3V3
MEMORY
RES
2 1
3KTU
3KTV
DDR2-A(0-13) A 7JB1 VCOM_SDA
DDR2-D(0-31) DQ 7 SDA-TCON
7JB3 VCOM_SCL 7KQH
7B02 +3V3
B01F HDMI & CI VCC
PCA9540B
EDE1116AEBG 7B03 8 SCL-TCON
9JB6
9JB7
EDE1108AGBG EDE1108AGBG 2 CHANNEL
3J36
3J35
3S6G
3S6F
D(16-23)
D(24-31)
1 20 MULTIPLEXER
9JBB SDA-TCON
SDRAM SDRAM B24 3S60 SDA-TUNER 3F75 TUN-P7 12 13 E19 E20
9JB6
9JB7
4_SDA VCC 7JC1 9JBA
3S61 3F76 RES SCL-TCON
A23 SCL-TUNER TUN-P6 MAX9668ETP
4_SCL 7KQA 7KAA
RES
3J38
3J37
ISL24837IRZ 7KQB UPD809900F1
10 BIT M25P32
ERR PROG GAMMA
18 175 176 5 6 8-CHANNEL CONTROL
7 6 REF SYST RES PROG I2C
7J01 7J02 1J02 REF VOLT GEN FLASH
1T01 TL2429MC M24C32-WDW6 +VDISP
TH2603 2
SCD
TCON EEPROM
3J04
1
B04C ETHERNET + SERVICE MAIN (4Kx8) SCL
TUNER 9JBB TCON
4
SDA-DISP
SCL-DISP
SDA-DISP
SCL-DISP
7
WP SW
ERR
7E10 34 TCON
LAN8710A-EZK SW
SSB 3104 313 6406.* SSB 3104 313 6406.* SSB 3104 313 6450.* SSB 3104 313 6450.*
3104 313 6401.* 3104 313 6401.* 3104 313 6453.* 3104 313 6453.*
11 ETH-RXD(0) Y5
ETH-RXD(1)
RXD_0 B06B VIDEO OUT - LVDS
10 Y6 +3V3
RXD_1
9 ETH-RXD(2) AB4
RXD_2
ETHERNET 8 ETH-RXD(3) AC1
3S6C
3S6B
RXD_3 1G51
7 ETH-RXCLK AA3
RXCLK B26 3S58 SDA-SET 9S12 SDA-DISP 3G2W 50
2_SDA LVDS
22 ETH-TXD(0) AA1 A25 3S5W SCL-SET 9S11 SCL-DISP 3G2Y 49 CONNECTOR
TXD_0 2_SCL
23 ETH-TXD(1) AA4
TXD_1 +3V3
24 ETH-TXD(2) AB1
ETHERNET TXD_2 ERR +3V3 ERR
25 ETH-TXD(3) AB2 14 64
CONNECTOR TXD_3 2 1
3S67
3S65
3S68
3S66
RJ45 20 ETH-TXCLK AA2 B09A DVBS CONNECTOR BOARD B11D CONNECTORS (LGD) B14F CONNECTORS (SHARP) BB1 FPGA PART (C-BALANCE BOARD) BB8 CONNECROR / SUPPLY
TXCLK
3S81
3S80
3150
3151
B04B ANALOGUE ERR 1M71 1M71 1M71
8 3C83 3J83 3K83
EXTERNALS B 24 3 3 1 1 2 65 70
TO TO TO
3C81 1 TEMPERATURE 3J81 1 TEMPERATURE 3K81 3 TEMPERATURE
RES SENSOR SENSOR SENSOR 71150 7120
LM75DDP XC3S200A
1ECB RES RES RES
9S13 SDA-BL
6 5 TEMP SPARTAN
4 3 9S10 SENSOR FPGA
SCL-BL
2 1
SW Programmable via USB
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 101
1M99 1M99 1P95* +1V2-BRA-VDDC +1V2-BRA-VDDC +1V8 +1V8 +1V8 +1V8 VCC VCC
+12VD B01g B03b B03b B11b
1 1 9 +1V2-BRA-DR1 +1V2 3B20
+12V +1V2-BRA-DR1 7UA3 DDR2-VREF-DDR
B03h VDD VDD
10 B01g B02h
2 2 B11b
+12V 11 +3V3 3JC0
+3V3
3 3 B03e
GND1 3JC1
4 4
5FE7 +3V3-BRA +12V B06A DISPLAY INTERFACING-VDISP P_VDD
GND1 +5V +5V
5FE4 +3V3-BRA-FLT B03e +VDISP-INT +VDISP-INT
5 5 1 LAMP-ON 3U16 B03h
BL_ON_OFF B02G +3V3
DIM
6 6 2 BACKLIGHT-PWM_BL-VS
B06C B03e
+5V +5V
7UC0 1G03 +VDISP B11D CONNECTORS (LGD)
7 7 3 BACKLIGHT-BOOST B06b
BOOST B01E 7FE3 3U15 +2V5 +3V3 +3V3
8 8 BACKLIGHT-PWM-ANA-DISP IN OUT T 3.0A B03e
OR
N.C B02G 5FE9 +2V5-BRA COM B02d,h
IN OUT +2V5-LVDS 5G01
3D-LR CUA0 +3V3-STANDBY +3V3-STANDBY
B02E COM B03c
9 9 14 B02h
POWER-OK 5G02 1G00
POK B02G NOT FOR 5000 SERIES +5V +5V
B03e
+5V5-TUN +5V5-TUN T 3.0A 1M20
B03e 5
B02A PNX85500: NANDFLASH 7UA6 +5V-TUN TO
PSU +3V3
CONDITIONAL ACCESS
+3V3
B01f 8 IR/LED
PANEL
B03e B06B VIDEO OUT - LVDS +12V +12V
ENABLE-1V8 B03c
+12V +12V
1M95 1M95 B03c +3V3 +3V3
B01e,B02e, 7UA0 B03e
1 1 4 +3V3-STANDBY 3UA0
3V3_ST g,h,B03a,b,h, VOLT. +2V5-REF
2 2 5 STANDBY B04d,e,B09a, B02B PNX85500: SDRAM REG. B06a
+VDISP +VDISP B13 AMBILIGHT CPLD
STANDBY B02G
3 3 6 B11d,B14f +3V3 +3V3
GND1 B03e
4 4 7 +1V8 +1V8
B03b
GND1 5HA0 VINT
5 5 8
GND1
3S20 DDR2-VREF-CTRL3 B06C .
5HA1 VIO
1U40 +12V 3S06 DDR2-VREF-CTRL2
B03E DC / DC
+3V3 +3V3
6 6 9 B03b,d,e,g, B03e
+12V +1V1 +1V1 1M72
7 7 10 B08b,B09a, B01,a,b,c,d,e, 1HA0 +24V
T 3.0A B03b 5GA0 VINT 1
+12V B11d,B14f g,j,jk,B14f
8 8 11 +12V +12V 2 1M59
+12V B03c B02a,c,d,e,h, T 1.5A
9 9 12 +24V-AUDIO-POWER 5GA1 VIO 21 TO
+VSND 7UD1 B03c,f,g,h,
B02d,B03a AMBILIGHT
GND_SND
10 10 13 B02C PNX85500: DIGITAL VIDEO IN 5UD3
IN OUT
5UD2 +3V3 B04a,c,d,e,
MODULE
11 11 MAINS-OK COM B06b,c,d,
N.C. B03A +3V3 +3V3 7UD0 B08a,B09a,
B03e
5UD0 5UD1 +5V5-TUN B11d,B13 B06D SPI-BUFFER
B14A TCON CONTROL (SHARP)
IN OUT
COM B03d +3V3 +3V3 +VDISP +VDISP
+3V3 +3V3 B03e B14b
6UD0 +5V 7KAC
B03e B01,a,c,e,k,
5KAG VCC_1V2
B03e
+5V +5V B02D PNX85500: AUDIO B03c,d,B04a,b,d, VIN SW
GND B14b
B09a,B11d,
B03d
+2V5 +2V5 7UD2
B14f B07A DVBS-FE
5KAA VDD12
+2V5
IN OUT
* TO 1M95 POWER SUPPLY 6000 SERIE (MANET) +3V3 +3V3 +1V-DVBS +1V-DVBS
B03e COM B08a 5KAB LVDS_AVDD
3S11 +3V3-ARC
+2V5-DVBS +2V5-DVBS 5KAC mini_AVDD
B01A COMMON INTERFACE 7S08
7UD3 B08a
+2V5-AUDIO IN OUT
+3V3 5KAD SSCG_AVDD
+3V3 +3V3 IN OUT B02h COM +3V3-DVBS +3V3-DVBS
COM B08a VCC_3V3 VCC_3V3
B03e
+24V-AUDIO-POWER +24V-AUDIO-POWER 5R00 +3V3-DEMOD B14b
+5V +5V B03c ONLY FOR 5000 SERIES
5KAE VDD33
B03e 3S0Z +24V-AUDIO-VDD 5R01 +3V3RF
3F01 +5VCA 5KAF VDDQ
+T B03F TEMPSENSOR + AMBILIGHT
+3V3 +3V3
B02E PNX85500: MIPS B08A DVBS-SUPPLY
B01B FLASH B03e B14B TCON DC / DC (SHARP)
+3V3 +3V3 5UM1 1UM0 V-AMBI
B03e VCC_1V2 VCC_1V2
+3V3 +3V3
+3V3-STANDBY +3V3-STANDBY T 1.0A B14a
B03e +3V3 +3V3
B03c B03e +VDISP-INT +VDISP-INT
B03h
5T02
B02H PNX85500: POWER
+12VD +12VD
7T01
10
3KFP VGL_-6V
+2V5-DVBS
B01D SD-CARD
+1V1 +1V1
B03c IN OUT B07a B14e
B03b COM
7UU1 +VDISP-INT B06a,B11b,
+3V3 +3V3
+1V2 +1V2 B14b
B03e
3F40 +3V3-SD
B03d
12 5T04 +V-LNB
B08b
B14C P GAMMA & VCOM & FLASH (SHARP)
+1V8 +1V8
+T B03b 7UU2 VCC_3V3 VCC_3V3
+2V5 +2V5 LCD-PWR-ONn B14b
B03d
+VDISP +VDISP
+2V5-AUDIO +2V5-AUDIO
B02d B08B DVBS-SUPPLY B14b
B01E PNX85500: CONTROL
B03d
+2V5-LVDS +2V5-LVDS B04A ANALOGUE EXTERNALS A
+3V3-DVBS +3V3-DVBS
VLS_15V6 VLS_15V6
+3V3 +3V3 B08a B14b
+3V3 +3V3 +3V3 +3V3 7KQA
B03e B03e +12V +12V
B03e +5V +5V 5 ISL248371RZ
+3V3-STANDBY +3V3-STANDBY +3V3-STANDBY +3V3-STANDBY B03e B03c 32 VREF_15V2
B03c +V-LNB +V-LNB IC B14d
B03c B08a
+5V +5V LCD
B03e SUPPLY
B04B ANALOGUE EXTERNALS B
+5V +5V B09A (*NON) DVBS CONNECTOR BOARD
B03e
B01F HDMI & CI B03A AUDIO B03e
+3V3 +3V3 B14D MPD (SHARP)
B01k
VGH_35V VGH_35V
7U03 +5V-EDID
12V/1V8 B14b
7U02-1
TPS53126PW B11A TCON CONTROLLER (LGD)
6EC1
2010-Oct-01 back to
div. table
Block Diagrams Q551.1E LA 9. EN 102
7F10
1N09
5FE1 +24V
P02F ANALOG VIDEO OUT
7F20 1
BCM7206ZKFEB01G TO P01a,b
EDE5116AJBG
POWER 2 1M09 VDAC-AVDD25 VDAC-AVDD25
P02A 64 BIT DDR2 SUPPLY 5FE2 1 P02m
7FEA TO
SDRAM DQ DDR0-DQ(0-15) SDRAM 2 SSB VDAC-AVDD33 VDAC-AVDD33
LAN9512-JZX P02m
A DDR01-A(0-13) 128MB
61 3FF6 +24V-P
1V24 T5 DDR0-CLK J8
1FEA
25M
1
+5VUSB P02K ETH / USB / SATA
DDR0_CLK
DDR0_CLKB
T4 DDR0-CLKB K8 P02G HDMI OUT
2 USBDM3 3 60
LAN9512 5FU1-2 +5V +5V
TO WIFI 3 USBDP3 4 56 DIFF-ENET-RX-N B11 EPHY_RDN P01a
MODULE 4 55 DIFF-ENET-RX-P C11 EPHY_RDP
7F21 P01A SUPPLY
EDE5116AJBG
5 +24V +24V
6
5FU1-1 DQ DDR2-DQ(0-15) SDRAM
B02e P02H EBI, FLASH, RESET
7U03
53 DIFF-ENET-TX-N A12 EPHY_TDN A DDR23-A(0-13) 128MB VCC OUT
5U04 +5V
P02g +3V3 +3V3
52 DIFF-ENET-TX-P B12
EPHY_TDP GND P01a
G4 DDR2-CLK J8
DDR2_CLK
G5 DDR2-CLKB K8
DDR2_CLKB 7U06
1F24 B02A 5U05 +3V3 P01b,P02c,d,
P02I CLOCKS, JTAG, BBS-DEBUG
1 VCC OUT
+5VUSB GND 7U00 h,i,j,k,m,n,q +3V3 +3V3
P01a
P02F
RESET-AVPIPB
7FEC
12 58
59
USBDM0
USBDP0
2
3 TO 1P27
SSB
BCM7206 P02H EBI, FLASH, RESET
7F80
3U00
INH SW
GND
5U01 +1V2
P01b,P02m,n
NCP303LSN28G 4 M29W128GL70N6F
2 1 5
P02H 64 BIT DDR2 P02J UART, IR-IN/OUT
+3V3 INP OUTP VDD33A SDRAM
EBI-DATA(0-15) DRAM 7U01 +3V3 +3V3
PCI_AD(0-31) 3U06 P01a
5 5U03 +1V8
GND EBI-ADDR(1-23) 128MB INH SW P01b,P02a,b,
VDD33A
3 GND n,q
+2V5 +2V5
P01b
P01B SUPPLY
+3V3 +3V3
P01a
AC19 +1V2 +1V2
PCI_CLK_IN VDD33A VDD33A
B01a P01q
+1V8 +1V8
B01a +3V3 +3V3
B01a +2V5
P02M ANALOG SUPPLY FILTERING
7U50
P02k,m,n
+1V2 +1V2
P01a
+2V5 +2V5
P02I CLOCKS, JTAG, BBS-DEBUG 7U52 P01b
P02I CLOCKS CONTROL 9FV0 VDAC-AVDD25
AE9 PCI-CLK-N-740X +24V +24V P02f
CLK27_OUT B02e +3V3 +3V3
P01a
B26
5FV2 VDAC-AVDD33
P02f
1FR3
54M
P02A DDR2 CONTROLLER
A26
+1V8 +1V8 P02N DIGITAL SUPPLY FILTERING
B01a
3F10 DDR-VREF0
P02b +1V2 +1V2
3F11 DDR-VREF1 P01a
P02F ANALOG VIDEO OUT P02b +1V8 +1V8
P01a
1EP2 +2V5 +2V5
P01b
P02F VIDEO DAC INTF 1 P02B DDR2 MEMORY
2 +3V3 +2V5
B23 P01a
VAD1_2 +1V8 +1V8
3
B01a
A22 4 7F22
VAD1_1 DDR-VTT
5 VDDVTT
GND
P02Q LAN9512 - ETHERNET + HUB
A24 6
VAD1_0 +1V8 +1V8
DDR-VREF0 DDR-VREF0 P01a
P02E AUDIO TO 1EP2
7FE1 7 B02a
A19 SSB +3V3 +3V3
8 DDR-VREF1 DDR-VREF1 P01a
AUDO_LEFT_P AUDO-OUT-LEFT
B19 B02a 5FEB VDD33A P02k
AUDO_LEFT_N 9
C20
AUDO_RIGHT_N AUDO-OUT-RIGHT 10 TO 1F24 +5VUSB
B20 1
AUDO_RIGHT_N 11 P02C GPIO SSB
12 3FEY +V-USB P01a
RESET-AVPIPB
P02Q +3V3 +3V3
B01a 1V24
1 TO WIFI
MODULE
P02D PIN STRAPPING
+3V3 +3V3
B01a
18750_416_100924.eps
100924
2010-Oct-01 back to
div. table
Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 103
27
+24V TLC5946RHB
1
2 3B00-1 VCC 2B04-2 B6
BLANK 1 8 31 4 PWM-R1
3
PWM-CLOCK-BUF 150R 24
BLANK 0
5 PWM-G1
2B04-3 B8
4 GSCLK 1
5
3B18 26
IREF 2
6 PWM-B1 2B04-4 B7
FB35 3 7 PWM-G3
6
FB03 PROG 4 3B00-4 5
1K8
1
MODE 3
8 PWM-R3
2B08 E12
7 SCLK 4
8 SPI-CLOCK-BUF 150R 2
SIN 5
9 PWM-R2 2B09 E12
SPI-DATA-IN-BUF 23 10 PWM-G2
9
SPI-DATA-IN 3 6
SOUT 6
11 PWM-B2 2B10 F9
10 FB04 7
11 TEMP-SENSOR SPI-DATA-OUT 3B00-3 150R 3B21 22
XERR
OUT
8
14 PWM-B3 2B11 A9
FB20 +3V3 150R 3B22 25 15 PWM-G4
12 XHALF 9 2B17 D8
LATCH 2 3B00-2 7 10K 32 16 PWM-R4
B 13
14
FB05
+3V3 FB06 150R
12
XLAT 10
11
17
18
PWM-B4 B 2B20 D4
15 BLANK 12 PWM-B5
16
FB07 PROG 13
13
19 PWM-G5 3004 E12
6
FB08 28 NC 20
FB10 PWM-R5 3B00-1 A6
2B04-2
2B04-1
2B04-4
2B04-3
17 14
100p
100p
100p
100p
LATCH 29 21 DATA-SWITCH
18 15
19
FB11 SPI-CS
3B31
3B00-2 B6
GND GND_HS
+3V3 FB12 +3V3 3B00-3 B6
3
20
30
33
21 PWM-CLOCK 2K0
22 7B26-2 3B00-4 B6
FB13 SPI-DATA-RETURN TLC5946RHB
23
FB15 SPI-DATA-IN 34 VIA 42 3B01-1 E7
24
25
FB16 SPI-CLOCK 35
VIA VIA
41 3B01-2 D7
27 26 36 40
VIA 3B02-1 E3
C 1M83 C 3B02-2 E5
37
38
39
3B03-1 H14
3B03-2 H14
3B03-3 H14
+3V3
3B03-4 H14
3B07-1 F3
+3V3 3B07-2 G3
3B34 3B07-3 H3
2B20
100n
2B17
100n
SPI-CLOCK-BUF +3V3
3B13-3 H3
6
1K5 1%
1K5 1%
7B07
3B39-2
3B39-3
7B20-1
3B13-4 I3
8
M95010-WDW6 74LVC2G17
+3V3 VCC
5
7B30
3B18 A8
5
Φ 2
3
D Q FB40
2 3B01-2 7 1 3B30-1 8
5
7B06 (64K) PWM-CLOCK 1 6 PWM-CLOCK-BUF 1
4 TEMP-SENSOR
3B21 B7
74LVC1G32GW 6
5
RES
2B00
2
4 1 3B30-1 D9
33p
3B02-2
2
S
2B02
2B08
100p
3004
10K
2 7
10n
DATA-SWITCH
3B11
HOLD +3V3
+3V3 1 3B02-1 8 3 7 10K 2 3B30-4 E9
W
10K
3
3B31 B10
-T
10K
GND
E FB41
E 3B34 D13
4
7B20-2
74LVC2G17 3B35 G14
1
1K5 1%
3B39-1
+3V3 3B36 G14
2B09
10n
5
3B37 G14
8
3B01-1 3B30-4
SPI-DATA-RETURN SPI-CLOCK 1 8 3 4 4 5 SPI-CLOCK-BUF 3B39-1 E13
100R 220R 3B39-2 D12
3B39-3 D13
2B01
2
33p
2B10
100p
+24V 7000 G5
7001 G7
F F 7002 G8
8 3B07-1 1
7B23-1
7003 G10
10K
BC847BS(COL)
6
7004 G11
2 7005 G13
7B06 D3
2 3B07-2 7
1
10K
7B07 D4
7B20-1 D8
PWM-B1
FB30 7B20-2 E8
3B35
+24V 7B23-1 F4
+24V 7000
G LTW-008RGB 7001
LTW-008RGB
7002
LTW-008RGB
7003
LTW-008RGB
7004
LTW-008RGB
7005
LTW-008RGB
270R
3B36
G 7B23-2 G4
7B25 H3
5 3B07-4 4
BC847BS(COL) 3B37
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 7B26-2 C9
68R 7B30 D13
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
FB01 A1
3 3B07-3 6
4
FB03 B1
10K
1 3B03-1 8
FB04 B1
FB31 1K5
FB05 B1
H PWM-R1
2
3B03-2
7 H FB06 B2
+24V
1K5
FB07 B1
3 3B03-3 6
FB08 B1
FB10 B2
3 3B13-3 6
1K5
7B25
10K
BC847BW 3 4
3B03-4
5
FB11 B1
1K5 FB12 B2
1
FB13 C1
2B03
100n
5 3B13-4 4
FB15 C1
2
10K
FB16 C1
FB20 B7
I FB32
I FB30 G3
PWM-G1
FB31 H3
FB32 I3
FB35 A8
FB40 D12
FB41 E13
1 2 3 4 5 6 7 8 9 10 11 12 13 14
B001 B002 B007 6 2009-12-04
5 2009-10-28
AL 2K10 LiteOn
8204 000 8978 4 2009-10-07
15 LED Common 3 2009-08-27
2 2009-07-03
18770_600_100212.eps
100218
2010-Oct-01 back to
div. table
Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 104
5 3B55-4 4
A 7B50-1
A
10K
BC847BS(COL) 6 3B52 B7
2
3B53-1 B7
3 3B55-3 6
3B53-2 C7
1
10K
FB70
3B53-3 C7
PWM-B2
3B50 3B53-4 C7
+24V 7105 7104 7103 7102 7101 7100
LTW-008RGB LTW-008RGB 270R
3B51
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB 3B55-1 C3
B B 3B55-2 B3
7 3B55-2 2
5 BLUE 6 5 BLUE 6 270R 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6
7B50-2
10K
BC847BS(COL) 3 1 GREEN 2 1 GREEN 2 3B52 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
68R
3B55-3 A3
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
1
3B53-1
8 3B55-4 A3
1 3B55-1 8
+24V
4
1K5
3B57-2 D3
10K
2 3B53-2 7
1K5
3B57-3 C3
2B50
100n
FB71
PWM-G2 3 3B53-3 6
1K5 3C00-1 G3
C +24V
4 3B53-4 5 C
1K5
3C00-2 F3
3 3B57-3 6
7B51 3C00-3 F3
10K
BC847BW 3
1 3C00-4 E3
3C06-1 G3
7 3B57-2 2
2
10K
3C06-2 H3
D FB72 D 3C10 F4
PWM-R2
3C11 F4
3C12 F4
3C15-1 G4
3C15-2 G4
+24V
3C15-3 G4
3C15-4 G4
5 3C00-4 4
E 7C20-1 E
10K
BC847BS(COL) 6
7100 B11
2
7101 B10
3 3C00-3 6
7102 B9
1
10K
FC01
7103 B7
PWM-B3
+24V
1 3C10 2
7202
7104 B6
270R 7200 7201
F 1 3C11 2
LTW-008RGB LTW-008RGB LTW-008RGB
F 7105 B5
7 3C00-2 2
7C20-2
270R 5 BLUE 6 5 BLUE 6 5 BLUE 6 Blue
7200 F8
10K
5
68R
3 RED 4 3 RED 4 3 RED 4
7201 F9
Red
1 3C15-1 8
7202 F10
1 3C00-1 8
7B50-1 A3
10K
1K5
3C15-2
2 7
PWM-G3
FC02 1K5 7B50-2 B3
3 3C15-3 6
G +24V
1K5
G 7B51 C3
4 3C15-4 5 7C20-1 E3
1 3C06-1 8
1K5
7C22 7C20-2 F3
10K
BC847BW 3
1 7C22 G3
FB70 B3
7 3C06-2 2
2
10K
FB71 C3
H FC03
H FB72 D3
PWM-R3
FC01 F3
FC02 G3
FC03 H3
1 2 3 4 5 6 7 8 9 10 11 12
6 2009-12-04
18770_601_100212.eps
100212
2010-Oct-01 back to
div. table
Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 105
1M84 C13
3C01-1 B2
3C01-2 B2
3C01-3 C2
A A 3C01-4 C2
3C07-1
3C02-3 D2
3K9
3C07-2
3C02-4 E2
3K9
3C05-1 C7
+24V
3C07-3 3C05-2 C7
3K9 3C05-3 D7
3C01-1 3C07-4 3C05-4 D7
10K
6 3K9 3C06-1 D7
3C08-1
2 7C01-1 3C06-2 D7
B BC847BS(COL)
1
3K9 B 3C06-3 D7
3C01-2
3C08-2
10K
3C07-1 A7
3K9
3C08-3
3C07-2 A7
3K9
3C07-3 A7
3C09-1
PWM-B2 7103 7102 1M84 3C07-4 B7
LTW-008RGB LTW-008RGB 1K3
3C09-2
SPI-CLOCK-BUF 1 3C08-1 B7
+24V BLUE SPI-DATA-OUT
5 BLUE 6 5 BLUE 6
1K3 SPI-DATA-RETURN
2
3
3C08-2 B7
GREEN
1 GREEN 2 1 GREEN 2 3C09-3
PWM-CLOCK-BUF
4 3C08-3 B7
3C01-4
5
C C 3C09-1 B8
10K
3C05-2 11
10K
2K0 +3V3 12
4K3 13
3C10 C8
3C05-3
TEMP-SENSOR
14 7102 C6
15
4K3 16 7103 C5
17
PWM-R2
3C05-4
18
7C01-1 B3
4K3 19 7C01-2 C3
D +24V 3C06-1 20 D 7C02 E3
21
4K3 22
3C06-2 23
3C02-3
24
10K
4K3 +24V 25
3C06-3 26 27
7C02 4K3
BC847BW
3C02-4
10K
E E
PWM-G2
F F
G G
1 2 3 4 5 6 7 8 9 10 11 12 13
B003
3 2009-11-16
2 2009-08-31
AL 2K10 LiteOn
8204 000 8979 1 2009-08-27
2 LED 50%
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 106
10K
6
3E05-4 D9
2 7E01-1 3E06 C9
B BC847BS(COL)
1 B 7102 C8
3E01-2
10K
7103 C7
3E03 7104 C6
220R
7105 C5
PWM-B2 7106 7105 7104 7103 7102 3E04 1M84 7106 C3
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB
+24V
220R SPI-CLOCK-BUF 1 7E01-1 B2
SPI-DATA-OUT 2
5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 BLUE SPI-DATA-RETURN 3
7E01-2 C2
1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 3E06
GREEN PWM-CLOCK-BUF
4 7E02 E2
3E01-4
5
C C FD01 E10
10K
68R +3V3 6
3 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 RED SPI-CS 7
3E05-1
LATCH 8
FD02 E11
5 7E01-2
BC847BS(COL)
1K5 PROG
9 FD03 E11
10
4 BLANK
3E01-3
3E05-2 11
10K
+3V3 12
1K5 13
3E05-3 14
TEMP-SENSOR 15
1K5 16
3E05-4 17
PWM-R2 18
1K5 19
D +24V
20
21
D
22
23
3E02-3
24
10K
+24V 25
26 27
7E02
BC847BW
3E02-4
10K
E E
FD01 FD02 FD03
PWM-G2
F F
G G
1 2 3 4 5 6 7 8 9 10 11 12 13
B003 B004
2 2009-11-16
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 107
27
+24V TLC5946RHB 3B34
1
VCC
2
BLANK 1
3B00-1
8 31 4 PWM-R1 +3V3 +3V3 2B04-1 B7 7100 D13
3 BLANK 0 100K RES
4 PWM-CLOCK-BUF 150R
3B18
24
26
GSCLK 1
5
6
PWM-G1
+3V3
2B04-2 B6 7101 D9
5 IREF 2 PWM-B1
2B04-3 B8 7B06 D1
1 3001-1 8
1K5 1%
7
1%
1K8 FB35 3 7 FC02 PWM-G3
6 MODE 3
4 3B00-4 5
3001-2
FB03 PROG 1 8 FC03 PWM-R3
7 SCLK 4 2B04-4 B7 7B07 D3
1K5
150R 2 9 FB72 PWM-R2
8 SIN 5 7B30
SPI-CLOCK-BUF 23 10 FB71 PWM-G2
2B08 B11 7B20-1 D6
2
9 SOUT 6 FB40 LMV331IDCK
5
SPI-DATA-IN 3 6 11 FB70 PWM-B2 1
10 FB04 7
11 TEMP-SENSOR SPI-DATA-OUT 3B00-3 150R 3B21
33R 3B22
22
25
XERR
OUT
8
14
15 FC01
PWM-B3
3
4 TEMP-SENSOR 2B09 C12 7B20-2 E6
12 FB20 +3V3 XHALF 9
2 3B00-2 7 2B10 E8 7B23-1 F2
RES
LATCH 10K 32 16
2
13 FB05 XLAT 10
B B
2B08
3004
-T 10K
17
10n
3B11
+3V3
14
15
FB06
BLANK SPI-DATA-IN-BUF
150R
12
11
12
18 2B11 A9 7B23-2 G2
10K
FB07 PROG 13 19
16 13 2B17 D7 7B25 H2
6
FB08 28 NC 20
FB10 FB41
2B04-2
2B04-1
2B04-4
2B04-3
17 14
2B20 D3 7B26-1 A8
100p
100p
100p
100p
LATCH 29 21 DATA-SWITCH
18 15
FB11 SPI-CS
19 3B31
2B50 E10 7B26-2 C9
6
GND GND_HS
1K5 1%
+3V3 FB12 +3V3
3
20
3001-3
2B09
30
33
10n
PWM-CLOCK
21
22 7B26-2
2K0
3001-1 B12 7B30 B13
FB13 TLC5946RHB
SPI-DATA-RETURN
3001-2 B12 9B50-1 G13
3
23
FB15 SPI-DATA-IN 34 VIA 42
24
25
FB16 SPI-CLOCK 35
36
VIA VIA
41
40
3001-3 C12 9B50-2 G13
27 26
VIA 3004 B12 9B50-3 G13
C C
37
38
39
3B00-1 A6 9B51-2 E12
+3V3
+3V3 3B00-2 B6 9B51-3 E12
3B00-3 B6 9B51-4 E12
3B00-4 A6 9B52-1 D11
2B20
2B17
100n
100n
SPI-DATA-IN-BUF 3B01-1 E5 9B52-2 D11
SPI-CLOCK-BUF
7B20-1 3B01-2 D5 9B52-4 D11
74LVC2G17
3B02-1 D2 9B53-1 E10
5
7B07
M95010-WDW6 7101 7100
8
2B00
2
74LVC1G32GW 6
3B07-2 G1 FB01 A1
33p
5
2B02
100p
SPI-CS 1 GREEN 1 GREEN 2 9B52-4 1 GREEN 2 +24V
4 1
S 10K 3B07-3 H1 FB03 B1
DATA-SWITCH 2 7 +3V3 RED 3 RED 4 9B52-2 3 RED 4
HOLD
+3V3 1 3B02-1 8 3
W
7 3B02-2 2 3B07-4 G1 FB04 B1
3
10K
GND 7B20-2 3B11 B11 FB05 B1
74LVC2G17
4
5
3B18 A8
9B53-3
9B53-4
9B53-1
9B51-2
9B51-4
9B51-3
SPI-CLOCK 1 3B01-1 8 3 4 4 3B30-4 5 SPI-CLOCK-BUF FB08 B1
E SPI-DATA-RETURN
100R 220R E 3B21 B7 FB10 B2
2B01
2
3B22 B8 FB11 B1
33p
2B10
100p
2B50 3B30-1 D7 FB12 B2
100n
3B30-4 E7 FB13 C1
3B31 B10 FB15 C1
3B34 A13 FB16 C1
+24V
+24V RES
3B50
3B50 F7 FB20 B7
270R
3B51 F7 FB30 G2
F F
8 3B07-1 1
BC847BS(COL)
6 1K3 3B52-2 G7 FB32 I2
2
3B52-1
3B52-3 G7 FB35 A8
3B53-1 H7 FB40 B11
2 3B07-2 7
1 1K3
10K
7B23-2
5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6 9B50-3 3B55-1 G8 FC02 A9
10K
BC847BS(COL)
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 9B50-1 3B55-2 H8 FC03 B9
3B56 H8
2B03
100n
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 9B50-2
3B55-1
1 3B53-1 8
3 3B07-3 6
4 390R
10K
3K0 3B55-2
2 3B53-2 7 390R
FB31 3K0 RES
PWM-R1
3B53-3 3B56
H +24V
3
3K0
6
68R
H
4 3B53-4 5
3 3B13-3 6
3K0
7B25
10K
BC847BW 3
3B54-3
1
3K0
5 3B13-4 4
3B54-4
10K
3K0
I PWM-G1
FB32 I
B001 B002 B007
1 2 3 4 5 6 7 8 9 10 11 12 13
3 2009-11-16
1
2009-08-31
2009-07-31
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 108
3C01-1
10K
6 3C05-4 D8
2 7C01-1
3C08-1 3C06-1 D8
BC847BS(COL)
1
1K3 3C06-2 D8
3C01-2
3C08-2
3C08-1 B8
10K
B 1K3
3C08-3
+24V B 3C08-2 B8
1K3
3C08-3 B8
PWM-B3 7204 7203 7202 3C08-4 7201 7200 3C08-4 B8
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB
1K3 3C09-4 3C09-3 C9
+24V
5 BLUE 6 5 BLUE 6 5 BLUE 6
390R
5 BLUE 6 5 BLUE 6 3C09-4 B9
1 GREEN 2 1 GREEN 2 1 GREEN 2 3C09-3 1 GREEN 2 1 GREEN 2 7200 B11
3C01-4
7201 B10
10K
390R
3 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
3C05-1
7202 B7
C 5 7C01-2
C 7203 B6
2C03
100n
BC847BS(COL)
3K0
4
7204 B5
3C01-3
3C05-2
10K
3K0 7C01-1 B3
3C05-3
7C01-2 C3
3K0 7C02 D3
3C05-4
PWM-R3 FD01 D11
3K0
3C06-2 FD02 D11
+24V
3K0
FD03 D11
D 3C06-1 D FD04 D11
3C02-3
FD05 D11
10K
3K0
FD01 FD02 FD03 FD04 FD05 FD06
FD06 D12
7C02
BC847BW
FOR COMPABILITY OF TESTERS
3C02-4
10K
E PWM-G3
E
1 2 3 4 5 6 7 8 9 10 11 12 13
3 2009-11-17
2 2009-08-10
AL 2K10 LiteOn
8204 000 8975 1 2009-07-20
8 LED 50%
18770_680_100526.eps
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 109
3D07-1 A6
10K
1K3
6
B 2
3D07-4
B 3D07-2 B6
7D01-1 1K3
BC847BS(COL) 3D07-3 B6
1
3D07-4 B6
3D01-1
10K
3D09-3 C7
3D09-4 C7
7102
PWM-B2 7104 7103 LTW-008RGB 1M84 7102 C8
LTW-008RGB LTW-008RGB
+24V 3D09-3 5 BLUE 6 BLUE
SPI-CLOCK-BUF
SPI-DATA-OUT
1 7103 C5
2
5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN 7104 C4
C 390R
1 GREEN 2 GREEN
3
4
C
1 GREEN 2 1 GREEN 2 3D09-4
PWM-CLOCK-BUF 7D01-1 B2
3D01-4
5
3 RED 4
10K
3D05-2 11
10K
+3V3 12
3K0 13
3D05-3 14
TEMP-SENSOR 15
3K0 16
D PWM-R2
3D05-4 17
18
D
3K0 19
20
+24V
21
3D06-3 22
23
3K0
3D02-1
24
10K
3D06-4 +24V 25
3K0 26 27
7D02
BC847BW
3D02-2
10K
E E
PWM-G2
F F
1 2 3 4 5 6 7 8 9 10 11 12
3 2009-11-17
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 110
3 LED LiteOn
AL2A AL2A
1 2 3 4 5 6 7 8 9 10
1M84 A10
2C15 B6
7203 A3
7204 A4
7205 A5
A A
FH12-25S-0.5SH(55)
7203 7204 7205
LTW-008RGB LTW-008RGB LTW-008RGB
SPI-CLOCK-BUF 1
SPI-DATA-OUT 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
B LATCH 8 B
2C15
100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22 C
23
24
+24V 25
26 27
1M84
D D
1 2 3 4 5 6 7 8 9 10
B003
3 2009-10-07
1
2009-08-27
2009-07-20
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 111
9 LED LiteOn
AL2A AL2A
1 2 3 4 5 6 7 8 9 10
1M84 A10
2D01 B6
7203 A3
A A 7204 A4
7205 A5
7203 7204 7205 1M84
LTW-008RGB LTW-008RGB LTW-008RGB
SPI-CLOCK-BUF 1
SPI-DATA-OUT 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
B LATCH 8 B
2D01
100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23
C
24
+24V 25
26 27
FH12-25S-0.5SH(55)
FD04
D D
1 2 3 4 5 6 7 8 9 10
B003 B004
1 2009-10-07
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 112
9 LED LiteOn
9 LED LiteOn
AL2B AL2B
1 2 3 4 5 6 7 8 9 10 11 12 13
2D10 D13
+24V 3D02-1 A1
A A 3D02-2 B1
8 3D02-1 1
7D01-1
3D02-3 B1
10K
BC847BS(COL)
6
2 3D02-4 C1
3D05-3 C1
2 3D02-2 7
10K 1
3D05-4 D1
PWM-B4
FD01
1 3D10 2
3D10 B12
B +24V 7300 7301 7302 7303 7304 7305 270R
+24V
B 3D11 B12
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB
3D11
1 2
3D12 B12
6 3D02-3 3
BC847BS(COL) 3D12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
68R
3D13-1 C12
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
3D13-2 C12
4 3D02-4 5
4
3D13-3 C12
10K
1 3D13-1 8
C FD02 1K5
C 3D13-4 D12
PWM-R4
+24V
2 3D13-2 7
1K5
7300 B5
3 3D13-3 6 7301 B6
3 3D05-3 6
1K5
7D02 7302 B7
10K
BC847BW 3 4 3D13-4 5
1
1K5 7303 B8
2D10
100n
7304 B10
5 3D05-4 4
2
10K
D D 7305 B11
PWM-G4
FD03
7D01-1 A2
7D01-2 B2
7D02 C2
FD01 B1
FD02 C1
E E FD03 D1
1 2 3 4 5 6 7 8 9 10 11 12 13
1 2009-10-07
18770_611_100212.eps
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 113
15 LED LiteOn
AL2A AL2A
1 2 3 4 5 6 7 8 9 10
1M84 A10
2D01 B6
7203 A3
7204 A4
7205 A5
A A
FD18 C7
FH12-25S-0.5SH(55)
2D01
100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23
C
24
+24V 25
26 27
FD18
D D
1 2 3 4 5 6 7 8 9 10
3 2009-12-07
1
2009-10-07
2009-07-02
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 114
15 LED LiteOn
15 LED LiteOn
AL2B AL2B
1 2 3 4 5 6 7 8 9 10 11 12 13 2D10 C13
2D11 H13
3D02-1 A1
+24V
3D02-2 A1
3D02-3 B1
8 3D02-1 1
7D01-1
10K
BC847BS(COL)
6
3D02-4 B1
A 2 3D02-2 7
2
A 3D03-3 H2
1
3D03-4 G2
10K
FD01
3D04-1 F2
PWM-B4
BC847BS(COL) 3D12
B 3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
B
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
68R 3D05-3 C1
3D05-4 D1
4 3D02-4 5
4
10K
1 3D13-1 8
3D10 B12
PWM-R4
FD02 1K5
3D11 B12
2 3D13-2 7
+24V
1K5 3D12 B12
3 3D13-3 6
C C 3D13-1 B12
3 3D05-3 6
1K5
7D02
10K
2D10
100n
5 3D05-4 4
3D13-4 C12
2
10K
FD03
3D15 F12
PWM-G4
3D16 F12
D D 3D17 F12
3D18-1 G12
3D18-2 G12
3D18-3 G12
+24V
3D18-4 G12
7300 B5
E E
3
7301 B6
3D04-3
7D03-1
10K
BC847BS(COL)
6
7302 B7
6
7303 B8
5
1
3D04-4
10K
7304 B10
4
PWM-B5
FD04 7305 B11
3D15
+24V 7400 7401 7402 7403 7404 7405 270R
+24V
7400 F5
F LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB
3D16 F 7401 F6
1
7D03-2
7402 F7
10K
BC847BS(COL) 3D17
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
8
4
7404 F10
3D04-2
10K
FD05 1K5
G
PWM-R5
2 3D18-2 7
G 7D01-1 A2
+24V
1K5
7D01-2 B2
3 3D18-3 6
7D02 C2
5
1K5
3D03-4
7D04
10K
BC847BW 3 4 3D18-4 5
7D03-1 E2
4
1K5
1
7D03-2 F2
2D11
100n
3
2
3D03-3
7D04 G2
10K
FD01 A1
6
H PWM-G5
FD06 H
FD02 C1
FD03 D1
FD04 F1
FD05 G1
FD06 H1
1 2 3 4 5 6 7 8 9 10 11 12 13
3 2009-12-07
1 2009-07-02
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 115
21 LED LiteOn
AL3A AL3A
1 2 3 4 5 6 7 8 9 10
A A
2C01
100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23 C
24
+24V 25
26 27
FH12-25S-0.5SH(55)
D D
1 2 3 4 5 6 7 8 9 10
1M84 A10
B003 B004 B005 B006 2C01 B6
7203 A3
7204 A4
7205 A5
2 2009-10-22
18770_655_100413.eps
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 116
21 LED LiteOn
21 LED LiteOn
AL3B AL3B
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2E10 D13
2F10 H13
3E02-1 C2
3E02-2 C2
3E02-3 B2
3E02-4 B2
A A 3E05-3 D2
3E05-4 D2
3E10 B13
+24V
3E11 C13
3E12 C13
6 3E02-3 3
7E01-1
3E13-1 C13
10K
BC847BS(COL)
6
2
3E13-2 D13
3E13-3 D13
4 3E02-4 5
B 1
B 3E13-4 D13
10K
3F02-1 G2
FD04
PWM2-B2
3E10 3F02-2 G2
+24V
+24V 7400 7401 7402 7403 7404 7405 270R 3F02-3 F2
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB 3E11
3F02-4 F2
8 3E02-1 1
BC847BS(COL) 3E12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
68R
3F05-4 H2
C 5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
C 3F10 F13
2 3E02-2 7
4
3F11 F13
10K
1
3E13-1
8 3F12 G13
PWM2-G2
FD05 1K5 3F13-1 G13
2 3E13-2 7
+24V
3F13-2 G13
1K5
3
3E13-3
6
3F13-3 H13
3F13-4 H13
4 3E05-4 5
1K5
7E02
10K
2E10
100n
7402 C8
6 3E05-3 3
2
10K
7403 C9
FD06
7404 C11
PWM2-R2
7405 C12
7500 F5
7501 F7
E E 7502 F8
+24V
7503 F9
7504 F11
6 3F02-3 3
7F01-1
7505 F12
10K
BC847BS(COL)
6
2
7E01-1 B3
7E01-2 C3
4 3F02-4 5
1
7E02 D3
10K
F F 7F01-1 E3
PWM2-B3
FF01
3F10
7F01-2 G3
+24V 7500 7501 7502 7503 7504 7505 270R
+24V
7F02 H3
LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB LTW-008RGB 3F11 FD04 B2
8 3F02-1 1
BC847BS(COL) 3F12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
FD06 E2
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
FF01 F2
2 3F02-2 7
G 4
G FF02 G2
10K
1 3F13-1 8
FF03 H2
FF02 1K5
PWM2-R3
2 3F13-2 7
+24V
1K5
3 3F13-3 6
4 3F05-4 5
1K5
7F02
10K
BC847BW 3 3F13-4
4 5
1K5
H 1
H
2F10
100n
6 3F05-3 3
2
10K
FF03
PWM2-G3
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2 2009-10-22
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2010-Oct-01 back to
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 117
21 LED LiteOn
21 LED LiteOn
AL3C AL3C
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2D04-1 C7
2D04-2 C7
2D04-3 C8
2D04-4 C7
2D10 G14
A A 2D11 B9
3D00-1 B7
+3V3 3D00-2 C7
2D11 3D00-3 C7
100n 3D00-4 B7
3D02-1 E2
7D26-1
3D02-2 E2
27
TLC5946RHB
VCC
B BLANK 4
3D00-4
5 31
BLANK 0
4 PWM2-R1 B 3D02-3 F2
PWM-CLOCK-BUF 150R 24 5 PWM2-G1
3D18 26
GSCLK
IREF
1
2
6 PWM2-B1 3D02-4 F2
FD18 3 7 PWM2-G3
PROG 3 3D00-3 6
1K8
1
MODE
SCLK
3
4
8 PWM2-R3 3D05-3 G2
2 9 PWM2-R2
SPI-CLOCK-BUF
150R
23
SIN
SOUT
5
6
10 PWM2-G2 3D05-4 G2
SPI-DATA-OUT 1 8 11 PWM2-B2
SPI-DATA-OUT2 3D00-1 150R 3D21 22
XERR
OUT
7
8
14 PWM2-B3 3D10 E13
33R 3D22 25 15
LATCH 2 3D00-2 7
FD19 +3V3
10K 32
XHALF
XLAT
9
10
16 3D11 F13
17
150R
12
11
18 3D12 F13
12
13 19
C 13
C 3D13-1 F13
6
28 NC 20
2D04-4
2D04-2
2D04-1
2D04-3
14
100p
100p
100p
100p
29
15
21
3D13-2 G13
GND GND_HS
3D13-3 G13
30
33
7D26-2
TLC5946RHB
3D13-4 G13
34
35
VIA 42
41
3D18 B8
VIA VIA
36
VIA
40 3D21 C8
3D22 C8
7300 E5
37
38
39
D D
7301 E7
+24V
7302 E8
7303 E9
7304 E10
1
3D02-1
7D01-1
10K
BC847BS(COL)
6 7305 E12
8
2 7D01-1 E3
7D01-2 F3
7
1
E E
3D02-2
10K
7D02 G3
7D26-1 B9
2
FD01
PWM2-B1
3D10
+24V
7D26-2 C10
+24V 7300 7304 7305
LTW-008RGB 7301
LTW-008RGB
7302
LTW-008RGB
7303
LTW-008RGB
LTW-008RGB LTW-008RGB 270R FD01 E3
3D11
FD02 F3
3
7D01-2
FD03 H3
10K
BC847BS(COL) 3D12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
FD18 B8
6
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
F F FD19 C7
5
4
3D02-4
10K
1 3D13-1 8
4
FD02 1K5
PWM2-R1
2 3D13-2 7
+24V
1K5
3D13-3
3 6
6
1K5
3D05-3
7D02
10K
BC847BW 3 4 3D13-4 5
G G
3
1K5
1
2D10
100n
4
2
3D05-4
10K
5
FD03
PWM2-G1
H H
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2 2009-10-22
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2010-Oct-01 back to
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 118
AmbiLight LiteOn
9 LED
3B31 3B50
3B51
FC01
3B56
9B53
3B52 FB01
2B03
FB32
3B54
7B06
3B53
2B50
9B50
7B25
3B55
7C02
B001
B007
B002
B003
9B51
7000 7001 FB12
7002 7003 7004 7100 7101 7102 7103
3B18
FB04
FB11
2B11
2B09
3B30
3C08
7B26
1M83 1M84
FB07
3B34
3004 3001
3C06 3C05
3B07
3B13
9B52
3B01
3C09
2B17
3C02
3C01
7B07
FB40 FB70
FB05 FB06
FB41
3B21 3B22 FB35
3C07
7C01
3B02
2B00
3B00
7B30
2B10
2B02
2B20
2B04
2B08
3B11
12 LED
3B31 3B50
3B51
3B56
9B53
3B52 FC01
2B03
FB32 FB01
3B54
7B06 3E04
3B53
2B50
9B50
3B55
7B25
B001
B007
B002
B003
B004
9B51
FD03
7000 7001 7002 7003 7004 7100 7101 7102 7103 7104 7105 7106
3E06
3B18
FB04 FB12
FB11 3E03
2B11
2B09
3B30
7B26
1M83 1M84
FB07
3E05
3B34
3004 3001
3B07
3B13
9B52
3B01
7E02
3E01
2B17
7B07
FB41
FB40 FB05 FB06
3B21 FB35
FB70
3E02
3B22
3B02
3B00
2B00 7E01
FD01
FD02
2B10
2B02
7B30 2B20 2B04
FB13
2B08
3B11
FB10
FB20
FB08 2B01 FB16 FB31 FB15
FB72
FC02 FC03 FB71
15 LED
3B31 3B50
3B51
3B56
9B53
3B52 FC01
3D07
3C09
FB01
2B03
FB32
3D05 3D06
3B54
7B06
3B53
2B50
9B50
7B25
3B55
B001
B007
B002
B003
B004
B005
FD03
9B51
FD05
3D01
FB11
2B11
2B09
3B30
3D02
7B26
3C08
1M83 1M84
7D02
FB07
3D09
3B34
3004 3001
3B07
3B13
9B52
7C02
2C03
3B01
3C01
2B17
7B07
FB40 FB05 FB06
FB70 3C02
FB41
3B21 3B22 FB35
7D01 7C01
3B02
2B00
3B00
7B30
2B10
2B02
2B20
2B04
FB13
FD01 FD02
2B08
3B11
FB20 FD04
FB08 2B01 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71 FD06
18 LED
3B35
3B36
FB01 FC01
FB32
3B03
7B06
3B37
3C00
3B31
3B52
7B25 3B51
3B55
B001
B007
B002
B003
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205
3B18
FB04 FB12
FB11
2B09
3B50 2C15
3B30
2B03
3C12
3B53
7B26
1M83 1M84
FB07
3C15
3B01
3B34
3B07
3B13
7B50
7B07
2B01
7C20
FB70 3C11
FB40
3B21 3B22 2B50
7C22
2B17 2B11
7B51
FB05 FB06
2B00
FB41 FB35
3B00
7B30
3C06
3B02
2B04
2B10
2B02
2B20
3C10
7B20
2B08
3B11
7B23 3B57
3004
FB13 FB03
FB20
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71
24 LED
3B35
3B36
7B26
FB32
3B37
7B06
3C00
3B31
3B52
7B25
3B55
3B51
B001
B007
B002
B003
B004
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305
3B18
FB04 FB12
FB11
2B09
3B30
2B03 3B50
3C12
3B53
1M83 1M84
3C15
3B01
FB07
FD03
3B34
2D10
3B07
3B13
7D02
7B50
7B07
2B01
7C20
FB70 3C11
FB40
3B21 3B22 2D01
7C22
2B50
7B51
2B17 2B11 3D05
2B00
3D13
3D10
3B00
3D12
7B30 3D02
3C06
3B02
7D01
2B10
2B02
2B20
2B04 3C10
2B08
3B11
7B20
3004
30 LED
3B35
3B36
FB01 FC01
FB32
3B03
7B06
3B37
3C00
3B31
3B52
7B25 3B51
3B55
FB12
B001
B007
B002
B003
B005
B004
FD03 FD05
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305 7400 7401 7402 7403 7404 7405
3B18
FB04
FB11
2B09
3B50
3B30
2B03
FB07
3C12
3B53
7B26
1M83 1M84
3C15
3B01
2D10
3B34
3B07
3B13
7D02
3D15
7D04
3D10
2D11
3D17
7B50
3D13
3D03
7B07
2B01
3D12
FD18
7C20
FB70 3C11
FB40
3B21 3B22 2B50
7C22
FB05 FB06
2D01
3D04
2B00
FB41 FB35
7D01 7D03
3B00
3D11 3D16
7B30 3D02
3C06
3B02
2B04
2B10
2B02
2B20
7B23 3B57
3004
FB13 FB03
FB20 FD04
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71 FD06
36 LED
3B35
3B36
FB01 FC01
3D21
FB32
3B03
7B06
3B37
3C00
3B31
3B52
7B25 3B51
3B55
B001
B007
B002
B003
B005
B004
B006
FD03 FD05
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305 7400 7401 7402 7403 3D18
7404 7405 7500 7501 7502 7503 7504 7505
3D22
3B18
FB04 FB12
FB11
2B09
2E10
3B50 2D04
3B30
2B03
7D26
3C12
3B53
2D10
7B26
2D11
1M83 1M84
FB07
3C15 3D00
3B01
3B34
7F02
3B07
3B13
2F10
7D02
7E02
3E12
3F12
3F02
3F05
7B50
3D13
7B07
3E02
3F10
2B01
3D10 FD18
7C20
3E11
3E05
FB70
3E13
3D02
3D12
3C11
FB40
3B21 3B22 2B50 2C01 FD19
7C22
2B17 2B11
7B51
FB05 FB06
2B00
FB41 FB35
FF02 FF01
7B30
3C06
3F11
3B02
3D11
2B04 3E10
2B10
2B02
2B20
3C10
3D05 FD01 FD02
7B20
2B08
3B11
FB13 FB03
FB20 FD04
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71 FD06 FF03
18770_602_100216.eps
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 119
27
1 +24V TLC5946RHB 2B04-2 B6
3B00-1 VCC
2
BLANK 1 8 31 4 PWM-R1 2B04-3 B8
3 BLANK 0
4 PWM-CLOCK-BUF 150R 24
GSCLK 1
5 PWM-G1 2B04-4 B7
3B18 26 6 PWM-B1
5 IREF 2 2B08 E12
1K8 FB35 3 7 PWM-G3
6 MODE 3
4 3B00-4 5 1 8
7 FB03 PROG
150R 2
SCLK 4
9
PWM-R3 2B09 E12
8 SPI-CLOCK-BUF SIN 5 PWM-R2
9 SPI-DATA-IN-BUF 23
SOUT 6
10 PWM-G2 2B10 F9
SPI-DATA-IN 3 6 11 PWM-B2
10 FB04
3B00-3 150R 3B21 22 OUT
7
14
2B11 A9
11 TEMP-SENSOR SPI-DATA-OUT XERR 8 PWM-B3
12 FB20 +3V3 150R 3B22 25
XHALF 9
15 PWM-G4 2B17 D8
LATCH 2 3B00-2 7 10K 32 16 PWM-R4
B 13
14
FB05
+3V3 FB06 150R
XLAT 10
11
17 PWM-B4 B 2B20 D4
15 BLANK 12
12
18 PWM-B5 3004 E12
FB07 PROG 13 19 PWM-G5
16 13 3B00-1 A6
6
FB08 28 NC 20 PWM-R5
FB10
2B04-2
2B04-1
2B04-4
2B04-3
17 14
3B00-2 B6
100p
100p
100p
100p
LATCH 29 21 DATA-SWITCH
18 15
FB11 SPI-CS
19
+3V3 FB12 GND GND_HS
3B31
+3V3
3B00-3 B6
3
20
3B00-4 B6
30
33
21 PWM-CLOCK 2K0
7B26-2
22
FB13 SPI-DATA-RETURN TLC5946RHB 3B01-1 E7
23
FB15 SPI-DATA-IN 34 VIA 42 3B01-2 D7
24
FB16 SPI-CLOCK 35 41
25 VIA VIA 3B02-1 E3
27 26 36 40
VIA
C C 3B02-2 E5
1M83
3B03-1 H14
37
38
39
3B03-2 H14
3B03-3 H14
3B03-4 H14
+3V3 3B07-1 F3
3B07-2 G3
+3V3
3B07-3 H3
3B34
3B07-4 G3
2B20
100n
SPI-DATA-IN-BUF +3V3 +3V3 3B11 E12
D 100K RES
D
2B17
100n
SPI-CLOCK-BUF +3V3 3B13-3 H3
6
1K5 1%
1K5 1%
7B07 3B13-4 I3
3B39-2
3B39-3
7B20-1
8
M95010-WDW6 74LVC2G17
+3V3 VCC 3B18 A8
5
7B30
5
Φ 2
3B21 B7
3
D Q FB40
2 3B01-2 7 1 3B30-1 8
5
7B06 PWM-CLOCK 1 6 PWM-CLOCK-BUF 1
74LVC1G32GW 6 (64K) 4 TEMP-SENSOR 3B22 B8
5
C 100R 220R
SPI-CS 1 3
LMV331IDCK 3B30-1 D9
RES
2B00
2
4 1
33p
3B02-2
2
S
3B30-4 E9
2B02
2B08
100p
3004
10K
2 7
10n
DATA-SWITCH
3B11
+3V3 HOLD +3V3
1 3B02-1 8 3 7 2
W 10K 3B31 B10
10K
3
-T
10K
GND 3B34 D13
E FB41
E
4
1
3B36 G14
1K5 1%
3B39-1
+3V3
2B09
10n
3B37 G14
5
3B39-1 E13
8
3B01-1 3B30-4
SPI-DATA-RETURN SPI-CLOCK 1 8 3 4 4 5 SPI-CLOCK-BUF
100R 220R
3B39-2 D12
3B39-3 D13
2B01
2
33p
7000 G5
2B10
100p
+24V
7001 G7
7002 G8
F F
8 3B07-1 1
BC847BS(COL)
6 7004 G11
2 7005 G13
7B06 D3
2 3B07-2 7
1
7B07 D4
10K
7B20-1 D8
FB30
7B20-2 E8
PWM-B1
3B35 7B23-1 F4
+24V
+24V 7000 7B23-2 G4
G 99-235/RSBB7C-A24/2D 7001
99-235/RSBB7C-A24/2D
7002
99-235/RSBB7C-A24/2D
7003
99-235/RSBB7C-A24/2D
7004
99-235/RSBB7C-A24/2D
7005
99-235/RSBB7C-A24/2D
270R
3B36
G 7B25 H3
7B26-1 A8
5 3B07-4 4
BC847BS(COL)
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 3B37 7B26-2 C9
68R 7B30 D13
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
FB01 A1
3 3B07-3 6
4 FB03 B1
10K
FB04 B1
1 3B03-1 8 FB05 B1
FB31 1K5 FB06 B2
PWM-R1
H +24V
2
3B03-2
7 H FB07 B1
1K5
FB08 B1
3 3B03-3 6 FB10 B2
3 3B13-3 6
1K5
7B25 FB11 B1
10K
BC847BW 3 3B03-4
4 5
FB12 B2
1K5
1 FB13 C1
2B03
100n
FB15 C1
5 3B13-4 4
FB16 C1
10K
FB20 B7
I FB32
I FB30 G3
PWM-G1
FB31 H3
FB32 I3
FB35 A8
FB40 D12
FB41 E13
1 2 3 4 5 6 7 8 9 10 11 12 13 14
B001 B002 B007
2 2009-11-27
1 2009-11-03
AL 2K10 Everlight
8204 000 9059
15 LED Common
18770_670_100212.eps
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2010-Oct-01 back to
div. table
Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 120
5 3B55-4 4
A 7B50-1
A 3B52 B7
10K
BC847BS(COL) 6
2 3B53-1 B7
3B53-2 C7
3 3B55-3 6
1
10K
3B53-3 C7
PWM-B2
FB70
3B50
3B53-4 C7
+24V 7105
99-235/RSBB7C-A24/2D
7104
99-235/RSBB7C-A24/2D 270R 7103
99-235/RSBB7C-A24/2D
7102
99-235/RSBB7C-A24/2D
7101
99-235/RSBB7C-A24/2D
7100
99-235/RSBB7C-A24/2D 3B55-1 C3
3B51
B B 3B55-2 B3
7 3B55-2 2
5 BLUE 6 5 BLUE 6 270R 5 BLUE 6 5 BLUE 6 5 BLUE 6 5 BLUE 6
7B50-2
10K 3B55-3 A3
BC847BS(COL) 3 1 GREEN 2 1 GREEN 2 3B52 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
1
3B53-1
8 3B55-4 A3
1 3B55-1 8
+24V
4
1K5
3B57-2 D3
10K
2 3B53-2 7
1K5 3B57-3 C3
2B50
100n
FB71
PWM-G2 3 3B53-3 6
1K5 3C00-1 G3
C +24V
4 3B53-4 5 C 3C00-2 F3
1K5
3 3B57-3 6
7B51 3C00-3 F3
10K
BC847BW 3
1
3C00-4 E3
3C06-1 G3
7 3B57-2 2
2
10K
3C06-2 H3
D FB72 D 3C10 F4
PWM-R2
3C11 F4
3C12 F4
3C15-1 G4
3C15-2 G4
+24V
3C15-3 G4
3C15-4 G4
5 3C00-4 4
E 7C20-1 E
10K
BC847BS(COL) 6
7100 B11
2
7101 B10
3 3C00-3 6
7102 B9
10K
PWM-B3
FC01 7103 B7
1 3C10 2
+24V
270R 7200 7201 7202
99-235/RSBB7C-A24/2D
7104 B6
99-235/RSBB7C-A24/2D
F 1 3C11 2
99-235/RSBB7C-A24/2D
F 7105 B5
7 3C00-2 2
5
68R
3 RED 4 3 RED 4 3 RED 4 Red 7201 F9
1 3C15-1 8
7202 F10
1 3C00-1 8
4
10K
1K5
2
3C15-2
7 7B50-1 A3
FC02 1K5
PWM-G3
3 3C15-3 6
7B50-2 B3
G +24V G
1K5
7B51 C3
4 3C15-4 5
7C20-1 E3
1 3C06-1 8
1K5
7C22
10K
BC847BW 3
7C20-2 F3
1
7C22 G3
7 3C06-2 2
FB70 B3
10K
H H FB71 C3
FC03
PWM-R3
FB72 D3
FC01 F3
FC02 G3
1 2 3 4 5 6 7 8 9 10 11 12 FC03 H3
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 121
3 LED Everlight
AL2A AL2A
1 2 3 4 5 6 7 8 9 10
1M84 A10
2C15 B6
7203 A3
A A 7204 A4
7205 A5
FH12-25S-0.5SH(55)
7203 7204 7205
99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D
SPI-CLOCK-BUF 1
SPI-DATA-OUT 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
B LATCH 8 B
2C15
100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22 C
23
24
+24V 25
26 27
1M84
D D
1 2 3 4 5 6 7 8 9 10
B003
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 122
9 LED Everlight
AL2A AL2A
1 2 3 4 5 6 7 8 9 10
1M84 A10
2D01 B6
7203 A3
7204 A4
7205 A5
A A
2D01
100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23
C
24
+24V 25
26 27
FH12-25S-0.5SH(55)
D D
1 2 3 4 5 6 7 8 9 10
B003 B004
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 123
9 LED Everlight
9 LED Everlight
AL2B AL2B
1 2 3 4 5 6 7 8 9 10 11 12 13
2D10 C13
+24V 3D02-1 A1
3D02-2 A1
8 3D02-1 1
7D01-1
3D02-3 B1
10K
BC847BS(COL)
6
2 3D02-4 B1
A A
2 3D02-2 7
1
3D05-3 C1
10K
FD01
3D05-4 C1
PWM-B4
+24V
1 3D10 2 +24V 3D10 A12
7300 7301 7302 7303 7304 7305 270R
99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D 99-135/RSGBB7C-A24/2D
1
3D11
2 3D11 B12
6 3D02-3 3
BC847BS(COL) 3D12
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
4
10K
1K5
7D02
C
10K
BC847BW 3 4 3D13-4 5 C
1
1K5 7302 B7
7303 B8
2D10
100n
5 3D05-4 4
2
10K
7304 B10
PWM-G4
FD03
7305 B11
7D01-1 A2
D FD04
D 7D01-2 B2
7D02 C2
FD01 A1
FD02 C1
FD03 D1
FD04 D1
1 2 3 4 5 6 7 8 9 10 11 12 13
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 124
15 LED Everlight
AL2A AL2A
1 2 3 4 5 6 7 8 9 10
1M84 A10
2D01 B6
7203 A3
A A 7204 A4
7205 A5
7203
99-235/RSBB7C-A24/2D
7204
99-235/RSBB7C-A24/2D
7205
99-235/RSBB7C-A24/2D
SPI-CLOCK-BUF
1M84
1
FD18 C7
SPI-DATA-OUT 2
Blue 5 BLUE 6 5 BLUE 6 5 BLUE 6 SPI-DATA-RETURN
+24V 3
4
Green 1 GREEN 2 1 GREEN 2 1 GREEN 2 PWM-CLOCK-BUF 5
+3V3 6
Red 3 RED 4 3 RED 4 3 RED 4 SPI-CS 7
B LATCH 8 B
2D01
100n
9
PROG 10
BLANK 11
+3V3 12
13
14
TEMP-SENSOR 15
16
17
18
19
20
21
C 22
23
C
24
+24V 25
FD18 26 27
D D
1 2 3 4 5 6 7 8 9 10
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 125
15 LED Everlight
15 LED Everlight
AL2B AL2B
1 2 3 4 5 6 7 8 9 10 11 12 13
2D10 C13
+24V 2D11 H13
3D02-1 A1
8 3D02-1 1
7D01-1
3D02-2 A1
10K
BC847BS(COL)
6
A 2
A 3D02-3 B1
2 3D02-2 7
10K
1 3D02-4 B1
3D03-3 H2
PWM-B4
FD01
3D10
3D03-4 G2
+24V 7300
99-235/RSBB7C-A24/2D
7301
99-235/RSBB7C-A24/2D
7302
99-235/RSBB7C-A24/2D
7303
99-235/RSBB7C-A24/2D
7304
99-235/RSBB7C-A24/2D
7305
99-235/RSBB7C-A24/2D
68R
+24V
3D04-1 F2
3D11 RES
3D04-2 G2
6 3D02-3 3
B BC847BS(COL)
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 3D12
B 3D04-3 E2
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3D04-4 F2
4 3D02-4 5
4
3D05-3 C1
10K
1 3D13-1 8 3D05-4 D1
FD02 1K5
PWM-R4
2 3D13-2 7
3D10 B12
+24V
1K5
3D11 B12
3 3D13-3 6
C C 3D12 B12
3 3D05-3 6
1K5
7D02
10K
4 3D13-4 5
BC847BW 3
1K5
3D13-1 B12
1
3D13-2 C12
2D10
100n
5 3D05-4 4
3D13-3 C12
10K
FD03
3D13-4 C12
PWM-G4
3D15 F12
D D 3D16 F12
3D17 F12
3D18-1 G12
3D18-2 G12
+24V
3D18-3 G12
3D18-4 G12
E E
3
7300 B5
3D04-3
7D03-1
10K
BC847BS(COL)
6
7301 B6
6
2
7302 B7
5
1
3D04-4
10K
7303 B8
4
PWM-B5
FD04 7304 B10
3D15
+24V 7400 7401 7402 7403 7404 7405 68R
+24V 7305 B11
F 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D 99-235/RSBB7C-A24/2D
3D16 RES F 7400 F5
1
7D03-2
7401 F6
10K
BC847BS(COL) 3D17
3 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2 1 GREEN 2
7402 F7
8
68R
5 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4 3 RED 4
7403 F8
7
4
3D04-2
10K
1 3D18-1 8
7404 F10
2
PWM-R5
FD05 1K5
7405 F11
2 3D18-2 7
G +24V
1K5
G 7D01-1 A2
3 3D18-3 6
7D01-2 B2
5
1K5
3D03-4
7D04
10K
1K5
1
7D03-1 E2
2D11
100n
3
7D03-2 F2
2
3D03-3
10K
7D04 G2
6
H FD06 H
PWM-G5
FD01 A1
FD02 C1
FD03 D1
FD04 F1
FD05 G1
FD06 H1
1 2 3 4 5 6 7 8 9 10 11 12 13
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 126
AmbiLight Everlight
18 LED
3B35
3B36
FB01 FC01
FB32
3B03
7B06
3B37
3C00
3B31
3B52
7B25 3B51
3B55
B001
B007
B002
B003
FB12
3B18
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202
FB04
FB11
2B09
3B50 2C15
3B30
2B03
FB07
3C12
3B53
7B26
1M83 1M84
3C15
3B01
3B34
3B07
3B13
3B22
7B50
2B01 7B07
7C20
FB70
2B04
FB40
2B17
7C22
2B11
7B51
FB41 FB05 FB06 FB35
3B21 2B50
3B00
3C11
7B30
3B02
2B10
2B02
2B20
2B08
3B11
2B00
7B23 7B20 3B57
3004
FB13 FB03
FB20 3C10 3C06
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71
24 LED
3B35
3B36
7B26
FB01 FC01
FB32
3B03
7B06
3B37
3C00
3B31
3B52
7B25 3B51
3B55
B001
B007
B002
B003
B004
FD03
FB12
3B18
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202 7203 7204 7205 7300 7301 7302 7303 7304 7305
FB04
FB11
2B09
3B50
3B30
2B03
3C12
3B53
1M83 1M84
FB07
3C15
3B01
3B34
2D10
3B07
3B13
7D02
3B22
7B50
7B07
2B01
7C20
FB70
2B04
FB40
2B17
7C22
2B11 3D05
7B51
FB41 FB05 FB06 FB35
3B21 2B50
3D13
3D10
3B00
3C11
7B30 3D02
3D12
7D01
3B02
2B10
2B02
2B20
2B00
FB13 FB03
FB20 3C10 3C06 FD04 3D11
FB30 3B39 FB08 FB16 FB10 FB31 FB15
FB72
FC02 FC03 FB71
30 LED
3B35
3B36
FB01 FC01
3B03
FB32
B003
B005
B004
3B37
7B06
3C00
3B31
3B52
7B25
3B55
3B51
FB12
B001
B007
B002
7203 7204 7205 7300 7301 7302 7303 7304 7305 7400 7401 7402 7403 7404 7405
FD03 FD05
3B18
7000 7001 7002 7003 7004 7005 7100 7101 7102 7103 7104 7105 7200 7201 7202
FB04
FB11
2B09
3B30
2B03 3B50
FB07
3C12
3B53
7B26
1M83 1M84
3C15
3B01
2D10
3B34
3B07
3B13
7D02
3B22
7D04
2D11
3D12
3D17
7B50
3D03
2B01
7B07
7C20
FD18
2B04
FB70
7C22
FB40
3D13
2B17
7B51
2B11 3D05 3D10
3D04
FB05 FB06
FB41
3B21 2B50
FB35
2D01 3D15
3B00
7B30 3C11
3D02 7D01 7D03
3B02
2B10
2B02
2B20
FD01 FD02
3D18
2B08
3B11
2B00
3004
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 127
Common Interface
B01A B01A
1 2 3 4 5 6 7 8 9 10 11 1P00-A D10
1P00-B G10
2F00 A6
+3V3
3F06
2F01 A2
3F01 CA-RST 100K
2F00
+5V +5VCA TRANSPORT STREAM FROM CAM
7F00
RES
CA-CD1n 4 3F07-4 5
2F02 B6
+T 0R4 100n
20
22u 16V
74LVC245A 10K
2 3F07-2 7
2F03 D6
2F01
1 CA-CD2n
3EN1
3EN2 3F07-3
10K
2F04 E6
RES
19 CA-DATAENn 3 6
A IF01
G3
10K
+3V3
A
CA-MOCLK
3F02
2
1
18 MOCLK CA-DATADIR 1
3F07-1
8 2F05 G6
100R IF02 2 10K
3F03-1
CA-MOVAL
CA-MOSTRT 3F03-2 2 7
1 8
100R
3
4
17
16
MOVAL
MOSTRT CA-ADDENn 1 3F08-1 8
2F06 H6
100R IF03 5
6
15
14 MOCLK
10K
2 3F08-2 7 3F01 A2
7 13 10K
8 12 MOVAL 3 3F08-3 6 3F02 A4
9 11 10K
MOSTRT 4 3F08-4 5 3F03-1 A4
10
10K
MDO0 1 3F09-1 8
3F03-2 A4
B +3V3 10K
2 3F09-2 7
B 3F04-1 C4
2F02 MDO1
RES 10K
7F01 100n MDO2 3 3F09-3 6 3F04-2 C4
20
74LVC245A 10K
1
3EN1 MDO3 4 3F09-4 5
10K
IF04
3F04-3 C4
3EN2
IF05
19
G3
MDO4 1
3F10-1
8
3F04-4 C4
3F04-1 1 8 100R 2 18
CA-MDO0
IF06 2
1 MDO0
MDO5 2
10K
3F10-2
7 3F05-1 C4
CA-MDO1 3F04-2 2 7 100R 3 17 MDO1 10K
CA-MDO2 3F04-3 3 6 100R
3F04-4 4 5 100R
4
5
16
15
MDO2 MDO6 3 3F10-3 6 3F05-2 C4
CA-MDO3 MDO3 10K
C CA-MDO4 3F05-1 1 8 100R
3F05-2 2 7 100R
6
7
14
13
MDO4 MDO7 4 3F10-4 5
10K
C 3F05-3 C4
CA-MDO5 MDO5
CA-MDO6
CA-MDO7
3F05-3 3 6 100R
3F05-4 4 5 100R
8
9
12
11
MDO6
MDO7
3F12
3F05-4 C4
CA-RDY
IF07 +3V3
3F06 A9
10
10K
CA-WAITn 2 3F11-2 7
15-BIT ADDRESS
2F03
RES CA-WP
10K
4 3F11-4 5
3F07-2 A9
7F02 100n 3F11-1
10K
3F07-3 A9
20
74LVC245A CA-VS1n 8 1 +3V3 ROW_A
1 10K 1P00-A
D 3EN1
3EN2
GND1
1 D 3F07-4 A9
19 CA-ADDENn CA-D03 D3
G3 2
XIO-A00 18 2 CA-A00
CA-D04
CA-D05
D4
D5
3 3F08-1 A9
1 4
XIO-A01 17
2
3 CA-A01
CA-D06
CA-D07
D6
D7
5
6
3F08-2 A9
16 4 CE1
XIO-A02
XIO-A03 15 5
CA-A02
CA-A03
CA-CE1n
CA-A10 A10
7
8
3F08-3 B9
XIO-A04 14 6 CA-A04 CA-OEn OE
XIO-A05 13
12
7
8
CA-A05 CA-A11 A11
A9
9
10 3F08-4 B9
XIO-A06 CA-A06 CA-A09 11
XIO-A07 11 9 CA-A07 CA-A08
CA-A13
A8
A13
12 3F09-1 B9
13
3F09-2 B9
10
CA-A14 A14
E CA-WEn WE|P
RDY|BSY
14
15 E
CA-RDY
+3V3 +5VCA VCC1
16
17
3F09-3 B9
VPP1
7F03
2F04
RES CA-MIVAL A16
A15
18
19 3F09-4 B9
100n CA-MICLK 20
3F10-1 C9
20
F XIO-A09
XIO-A10
17
16
3
4
CA-A09
CA-A10
CA-A01
CA-A00
A1
A0
28
F 3F10-4 C9
29
XIO-A11
XIO-A12
15
14
5
6
CA-A11
CA-A12
CA-D00
CA-D01
D0
D1
30 3F11-1 D9
31
13 7 D2
XIO-A13
XIO-A14 12 8
CA-A13
CA-A14
CA-D02
CA-WP WP|IOIS16
32
33
3F11-2 C9
11 9 GND2
70 69
34
3F11-3 D9
10
10074595-050MLF 3F11-4 D9
+3V3
2F05
ROW_B
1P00-B 3F12 C9
8-BIT DATA RES GND3
7F04 CA-CD1n CD1
35 7F00 A5
G 100n 36
G
20
VPP2
52
CA-MDI4 A22
+3V3
CA-MDI5 A23
A24
53
54
IF03 A4
CA-MDI6 55
CONTROL
2F06
RES
CA-MDI7
MOCLK
A25
VS2
56 IF04 B9
57
7F05 100n CA-RST RESET
58 IF05 C4 1X04 1X01
20
18
G3
2
MOSTRT BVD1|STSCHG
D8
62
63 IF07 C5
XIO-D11 CA-REGn MDO0
I 17
1
2
3
MDO1 D9
D10
64
65 I IF08 D9
XIO-D09 CA-CE1n MDO2 66
XIO-D08 16 4 CA-CE2n CA-CD2n CD2
67
XIO-OEn 15 5 CA-OEn GND4
68
XIO-WEn 14 6 CA-WEn 72 71
XIO-D14 13 7 CA-IORDn
XIO-D15 12 8 CA-IOWRn 10074595-050MLF
CA-WAITn 11 9 XIO-D10
10
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 128
Flash
Flash
B01B B01B
1 2 3 4
2F20 A3 3F20-1 B1 3F20-4 C2 3F21-3 C1 3F22-2 C1 3F23 C2 IF21 C3
2F21 A3 3F20-2 B2 3F21-1 C1 3F21-4 C2 3F22-3 C2 3F24 D2 IF22 D3
3F19 D2 3F20-3 B1 3F21-2 C2 3F22-1 C2 3F22-4 C2 7F20 B3 IF23 D3
+3V3
A A
2F20
2F21
100n
100n
7F20
12
37
NAND04GW3B2DN6F
B Φ VCC
1
2 B
[FLASH] 3
4Gx16 4
5
XIO-D00 3F20-1 1 8 100R 29 6
0
XIO-D01 3F20-2 2 7 100R 30 10
1
XIO-D02 3F20-3 3 6 100R 31 11
2
XIO-D03 3F20-4 4 5 100R 32 14
3
XIO-D04 3F21-1 1 8 100R 41 IO 15
4
XIO-D05 3F21-2 2 7 100R 42 20
5
XIO-D06 3F21-3 3 6 100R 43 21
6
XIO-D07 3F21-4 4 5 100R 44 22
7
NC 23
24
C NAND-CE1n
IF21
25
26
C
NAND-CLE 3F22-2 2 7 100R 16 27
CLE
NAND-ALE 3F22-3 3 6 100R 17 28
ALE
+3V3 3F23 10K 9 33
CE
XIO-OEn 3F22-1 1 8 100R 8 34
RE
XIO-WEn 3F22-4 4 5 100R 18 35
WE
NAND-WPn IF22 19 38
WP
+3V3 3F24 7 39
R
40
2K2 B
NAND-RDY1n 45
IF23 46
47
3F19
48
10K
D VSS
D
13
36
+3V3
1 2 3 4
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 129
USB Hub
USB Hub
B01C B01C
1F24 E9
1 2 3 4 5 6 7 8 9 1F25 B1
1P07 B9
1P08 D9
2F25 A2
2F26 A2
2F27 A2
2F28 A4
IF44 +5V
2F29 A4
+3V3 2F30 A4
+T 0R4
2F31 A5
3F25
2F25
100n
2F32 A5
FF40 2F33 A5
+5V-USB1
3F26-1 2F34 B1
A 1
100K
A 2F35 B2
IF43 3F26-2 3F25 A8
USB-OC1n 2 7
3F26-1 A8
100K 3F26-2 A8
3F26-3 3F26-3 A8
2F26
2F27
2F28
2F29
2F30
2F31
2F32
2F33
100n
100n
100n
100n
100n
100n
3 6
1u0
1u0
100K 3F26-4 B8
3F26-4 3F28 B2
4 5
3F30 C2
100K 3F31-2 C2
3F28
1M0
14
34
36
23
15
10
29
USB2513B-AEZG 3F31-4 D2
5
1F25
B 1 3 CR PLL
FILT
VDD_3V3 USB-DP 9F25 USB-DP2
B 3F32 C8
24M Φ USB-DM 9F26 USB-DM2
3F34-1 C8
4
2
2F34
2F35
10K
10p
10p
IF33 IF35
33 13 USB-OC1n SIDE USB BOTTOM 3F34-3 D8
XTALIN|CLKIN OSC1
9F20
9F21
USBDP_DN1|PRT_DIS_P1
2 USB-DP1 3F34-4 D8
IF34
32 1 USB-DM1 1P07 3F35 B1
XTALOUT USBDM_DN1|PRT_DIS_M1
12 +5V-USB1
IF30 BC_EN1|PWRTPWR1 1 3F36 D6
RESET-USBn 26 IF36 USB-DM1 FF34
RESET 2 7F25 B2
17 USB-OC2n USB-DP1 FF35
OSC2 3 9F20 B7
11 4 USB-DP2
TEST USBDP_DN2|PRT_DIS_P2 +5V 4
IF42 USBDM_DN2|PRT_DIS_M2
3 USB-DM2 5 6 9F21 B7
3F31-2
2 7 28 16 9F25 B8
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2
IF37 292303-4
10K 9F26 B8
C USB-DP IF31
IF32
31
DP OSC3
19 USB-OC3n
C FF30 E8
+T 0R4
USB-DM 30 USBUP 7 USB-DP3
3F32
DM USBDP_DN3|PRT_DIS_P3 FF31 E9
+3V3 27 6 USB-DM3
VBUS_DET USBDM_DN3|PRT_DIS_M3
BC_EN3|PWRTPWR3
18 FF32 E9
3F30 IF41 3F34-1 FF33
35 1 +5V-USB2 FF33 C9
RBIAS
12K IF40 8
3F31-3 100K FF34 C7
3 6 22 9
SDA|SMBDATA|NON_REM1 3F34-2 FF35 C7
10K 24 NC 20 USB-OC2n 2 7
3F31-4 IF39 SCL|SMBCLK|CFG_SEL0 FF36 D7
4 5 25 21 100K
HS_IND|CFG_SEL1
10K FF37 D7
3F34-3
3 6 FF38 E9
VIA
GND_HS
3F36 100K FF39 E8
37
38
39
40
41
+3V3 USB-OC3n
4
3F34-4
5 FF40 A8
10K
IF30 C2
D 100K SIDE USB TOP D IF31 C1
1P08 IF32 C1
+5V-USB2 1 IF33 B2
USB-DM2 FF36
2 IF34 B2
USB-DP2 FF37
3 IF35 B5
4 IF45
FF32 5 6 IF36 C5
IF37 C5
292303-4
IF39 D2
IF40 C2
IF41 C2
IF42 C2
E FF39 +5V
FF38
1F24
1
E IF43 A3
IF44 A3
USB-DM3 2
USB-DP3
IF45 D9
3
FF30 4
FF31 5
7 6
502382-0570
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 130
SD Card
SD Card
B01D B01D
1 2 3 4
1P09-1 C4
1P09-2 D4
2F40 A2
3F40 A2
3F41-1 C1
A A 3F41-2 C1
3F40 FF45
3F41-3 C1
+3V3 +3V3-SD
+T
3F41-4 C1
0R4
22u 16V
3F42-1 C1
2F40
3F42-2 D1
3F42-3 D1
3F43-1 C3
3F43-2 C3
3F43-3 C3
B B 3F44-1 C3
+3V3 3F44-2 C3
3F44-3 C3
3F41-2 IF47 3F44-2
3F45 C1
2 7 SDIO-DAT3 SDIO-DAT3 2 7 FF47
1P09-1
FF41 C3
47K 3F41-3 100R 3F43-2
3 6 SDIO-CMD SDIO-CMD 2 7 FF48
1 FF42 C3
47K 100R 2
+3V3-SD 3 FF43 C3
3F45 RES
SDIO-CLK SDIO-CLK 1 3F44-1 8
4 FF44 D3
C 10K 100R
FF49
5
6 C FF45 A2
3F41-1 3F43-3 7
1 8 SDIO-DAT0 SDIO-DAT0 3 6 FF41
8 FF46 C4
47K 3F41-4 100R 3F43-1 9 FF46
4 5 SDIO-DAT1 SDIO-DAT1 1 8 FF42 1314 FF47 C3
1
3F42-1
8
47K
SDIO-DAT2 SDIO-DAT2 3
3F44-3
6
100R
FF43 1939115-1 FF48 C3
47K 100R FF49 C3
FF50 D3
IF46 D1
1P09-2
2
3F42-2
7 SDIO-CDn SDIO-CDn FF44
IF47 B1
D 47K
10
11 D
3F42-3 IF46 12
3 6 SDIO-WP SDIO-WP FF50
1939115-1
47K
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 131
PNX85500 Control
PNX85500 Control
B01E B01E
1 2 3 4 5 6 7 8 9
1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
A A 3F51 B1
+3V3-STANDBY +3V3-STANDBY
3F52 B3
3F53 C6
+3V3-STANDBY
+3V3 +3V3
3F54 D7
+3V3
3F51
100n
2F52
RES
10K
3F58 E1
3F59 E3
3F60 E3
RES
3F66
10K
3F52
10K
3F62 D5
8
7F52
B B
3F67
M25P05-AVMN6
3F63 E5
RES
10K
BACKLIGHT-BOOST
VCC IF50
PNX-SPI-SDI IF51 2
Q Φ D
5 PNX-SPI-SDO 7F53 RES
PDTA114EU +5V
3F64 F5
512K IF52
3F65 F5
6 PNX-SPI-CLK
FLASH C
IF53 3F66 B7
RES
1 PNX-SPI-CSBn
S
IF54
IF55
3F67 B6
3
3F68
47K
W PNX-SPI-WPn BOOST-PWM
7F54-1 RES 3F68 C7
7 BC847BPN(COL) 6
HOLD +3V3-STANDBY
FF29 IF61 7F54-2 RES
3F69 D7
IF56
VSS SPI-PROG BC847BPN(COL)
4 2
7F52 B2
C IF57
1 C 7F53 B7
4
IF62 5
FF04
SDM 7F54-1 C7
3
7F54-2 C7
3F53
9CH0 FF58
7F58 D1
10K RES 9CH0 C7
RES
RES
FF04 C4
2F53
3F69
3F54
RES
1K0
FF29 C4
1u0
10K
+3V3 MAIN NVM FF55 E3
D D FF56 E3
DEBUG ONLY
FF57 E2
IF58 2F58 RES FF61 3F62 100R
1F52 FF58 C7
SCL-SSB 1 SCL
100n
FF62
2
FF61 D4
SDA-SSB SDA
7F58
3F63
3 FF62 D7
8
FF63 100R 4 5
Φ FF63 E4
3F58
10K
(8K×8) 7 FF64 F7
WC
EEPROM 3F59 FF55
FF65 F4
IF59 1 6 SCL-UP-MIPS
0 SCL
2
1 ADR 100R FF56 FF66 F4
E 3
2 SDA
5
3F60
SDA-UP-MIPS E IF50 B3
100R
4
IF51 B1
FF57 IF52 B3
DEBUG / RS232 INTERFACE LEVEL IF53 B3
IF54 C3
SHIFTED
1F51 IF55 C6
FF65 3F64
TXD-UP
FF64
1
FOR IF56 C7
FF66 100R 3F65 2
RXD-UP UP IF57 C7
3
F RESET-STBYn
SPI-PROG
100R
4 DEBUG F IF58 D2
5
7 6
USE ONLY IF59 E1
IF61 C4
IF62 C4
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 132
HDMI & CI
HDMI & CI
B01F B01F
1F75 B5 2F62 B10 2F70 B10 2F75 B8 2F80 B9 2F86 D1 2F93 C2 3F76 C2 3F80 C9 5F71 B9 6F72 C7 9F02 A8 9F71 E4 FF00 B2 FF76 B1 IF12 C9 IF72 C5 IF77 B6 IF82 C4 IF90 D7
1T01 A1 2F63 C9 2F71 A7 2F76 B9 2F81 B1 2F88 E5 2F94 D7 3F77 C4 3F81 C9 5F72 E4 7F70 D8 9F03 A8 AF70 B3 FF01 C4 FF81 C1 IF13 C9 IF73 B6 IF78 B8 IF86 C5
2F59 B1 2F64 C9 2F72 A9 2F77 B9 2F82 B9 2F90 C6 3F71 C7 3F78 C7 3F82 B10 5F73 C5 7F75 A6 9F04 B3 AF71 B3 FF71 A1 FF82 C2 IF14 C9 IF74 B8 IF79 C5 IF87 C2
2F60 B1 2F65 B10 2F73 A9 2F78 B6 2F84 C1 2F91 D6 3F72 C7 3F79-1 B8 5F66 C10 5F74 B10 9F00 A6 9F05 C4 AF72 B9 FF74 B1 IF10 A5 IF15 C9 IF75 B6 IF80 B8 IF88 D2
2F61 B1 2F66 C10 2F74 B6 2F79 B8 2F85 C4 2F92 C7 3F75 D2 3F79-4 B8 5F70 D6 5F76 B10 9F01 A6 9F06 C4 AF73 B9 FF75 B2 IF11 A5 IF16 B10 IF76 B8 IF81 B6 IF89 D5
1 2 3 4 5 6 7 8 9 10
IF10
IF11
A 1T01
TX31XX PNX-IF-P
A
2F71
9F00
9F01
9F02
9F03
FF71 +5V-TUN-PIN
15
TUNER 14
4MHZ_REF 10n
2F72
2F73
15p
1p0
I2C_ADR
I2C_SDA
IF_OUT1
IF_OUT2
RF_AGC
I2C_SCL
7F75
B+_TUN
B+_LNA
1
16 13
RF_IO
UPC3221GV-E1
TUN
NC
AF72
2F65
VCC
15p
IF75 2F74 IF73 2F75 IF76 3F79-1
1F75 2 INPUT1 OUTPUT1 7 IF74 1
10
11
12
2p2 RES
1 4
1
5F71
2F76
2F77
5F74
2F62
2F70
680n
820n
2 5
22p
10p
1p0
IGND O2 2F78 IF77
3 INPUT2 OUTPUT2 6 IF78
2F79 IF80 3F79-4
AF71 TUN-IF-N 3 4
GND IF81 10n
820R
5F76
3F82
330n
AF70 TUN-IF-P
GND1
GND2
FF74 FF76 220R
B TUN-P1 FF00
9F04 IF-AGC
X7251X
36M17
4 VAGC AGC CONTROL
10n AF73
B
RES
RES
2F80
2F82
15p
1p0
2F81
2F59
2F60
100n
4u7
5
2F61 FF75
4n7
4u7
PNX-IF-N
2F93
100n
IF82 3F77
TUN-P6 FF81 PNX-IF-AGC IF12 IF13
3F80 2F63
TUN-P7 FF82 4K7 IF79 IF-
FF01 220R 10n
5F66
680n
22p
IF-AGC IF72
+5V-TUN-PIN 2F66
+5V-TUN-PIN
9F05
9F06
IF+
C C
BA591
2F85
3F71
6F72
2F92
4K7
1K0
47n
10n
3F72 220R 10n
IF86 2F90
2F84 3F76 IF87 SCL-TUNER 10n
3F78
3K3
15p 47R 3 5F73 2
TUN-P6 TUN-IF-N
5F70
470n
2F86 3F75 IF88 4 1
SDA-TUNER TUN-IF-P
15p 47R ATB2012 2F91
TUN-P7
10n RES
D IF89
SELECT-SAW
IF90
7F70
D
PDTC114EU
2F94
RES
10n
9F71
E 5F72
+5V-TUN-PIN
E
+5V-TUN
30R RES
2F88
22u
1 2 3 4 5 6 7 8 9 10
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 133
Toshiba Supply
Toshiba Supply
B01G B01G
1 2 3
2FA2 C1
2FA3 C2
2FA4 C3
A A 5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2
+3V3 +1V2-BRA-DR1
+1V2-BRA-VDDC
B B
5FA3
5FA4
30R
30R
7FA3
LD1117DT12
FFAF
3 2
IN OUT
COM
2FA2
2FA3
2FA4
100n
100n
10u
1
FFA2
C C
D D
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 134
HDMI
HDMI
B01H B01H
1P05 B1 3FBF-1 C4 3FBF-2 C4 FFB1 C2 FFB2 C2 FFB3 C2 FFB4 C2 FFB5 C1 FFB6 C2
1 2 3 4
A A
B 4
5
DRX1+
B
6 DRX1-
7 DRX0+
8
9 DRX0-
1 3FBF-1 8
10 DRXC+
47K
11
12 DRXC-
13 PCEC-HDMI
14
FFB1 DRX-DDC-SCL DRX-DDC-SCL
15 3FBF-2
FFB2 DRX-DDC-SDA DRX-DDC-SDA 2 7 DIN-5V
16
17 47K
FFB3
C 18
19 FFB4
DIN-5V
DRX-HOTPLUG C
FFB5 21 20
23 22 FFB6
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 135
VGA
VGA
B01I B01I
1 2 3 4 5 6 7 8 9 1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
1FC4 C4
A A 1FC5 D4
FFC1 3FC5
1FC6 F4
R-VGA
2FC1 B4
CDS4C12GTA
18R
2FC2 B4
2FC1
1FC1
RES 6FC1
100p
12V
2FC3 C4
2FC4 C4
FFC2 3FC6
G-VGA 2FC5 D4
B B
CDS4C12GTA
18R
2FC6 E4
RES 6FC2
2FC2
1FC2
100p
12V
2FC7 E4
1E05 2FC8 F4
1
2 3FC7
3FC1 D3
B-VGA
3
3FC2 E3
CDS4C12GTA
4 FFC3 18R
5
3FC3 C6
RES 6FC3
2FC3
1FC3
100p
12V
6
VGA 7
3FC4 D6
8
CONNECTOR
C 9
10
FFC4 C 3FC5 A6
11
12
FFC5
9FC5 H-SYNC-VGA 3FC6 B6
13
3FC7 C6
RES 6FC4
CDS4C12GTA
14
2FC4
1FC4
3FC3
12V
47p
4K7
15 16 6FC1 B5
17
1216-00D-15S-1EF
FFC6 6FC2 B5
FFC7
6FC3 C5
9FC6 V-SYNC-VGA
6FC4 C5
CDS4C12GTA
D D
RES 6FC5
6FC5 D5
2FC5
1FC5
3FC4
12V
47p
4K7
6FC6 E5
RES
9FC1 VGA-SDA-EDID-HDMI 6FC7 E5
3FC1 FFC8
9FC2 VGA-SDA-EDID 6FC8 F5
RES
CDS4C12GTA
10K
9FC1 D6
6FC6
2FC6
12V
47p
9FC2 E6
9FC3 E6
E RES
3FC2 FFC9
9FC3 VGA-SCL-EDID-HDMI
E 9FC4 E6
9FC4 VGA-SCL-EDID
9FC5 C6
CDS4C12GTA
10K RES
9FC6 D6
2FC7
6FC7
12V
47p
FFC1 A4
FFC2 B4
+5V-VGA FFC3 C4
CDS4C12GTA
FFC4 C3
F
2FC8
1FC6
6FC8
F
12V
47p
FFC5 C4
FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 136
3FD1
3FD2 RES
1K0
RES 3FD3 B3
2FD1
9FD1
9FD2
100n
1K0
3FD4 B2
LTST-C190KGKT
3FD6 C4
8
RES 7FD1
LM75BDP 3FD7 C4
6FD1
+VS
B 3
OS A0
7 IFD1
B 3FDG-1 D4
IFD2
SDA-SSB
3FD3
1
SDA A1
6 IFD3 3FDG-2 D4
100R IFD4
SCL-SSB
3FD4
2
SCL A2
5 IFD5 6FD1 B3
GND
100R
6FD2 D4
3FD6 RES
3FD7 RES
9FD5
1K0
1K0
6FD3 D5
4 7FD1 B3
9FD1 A4
C C 9FD2 A4
9FD5 C5
1329
FFDA D5
1
2
FFDB D5
5 4
3 FFDC D6
502382-0370 IFD1 B4
IFD2 B3
D FFDA 1328
D IFD3 B4
AMP1 2
AMP2 3 IFD4 B3
1
CDS4C12GTA
CDS4C12GTA FFDB
IFD5 B4
8
FFDC
3FDG-1
3FDG-2
2FDC
2FDD
1FD2
6FD2
1FD3
6FD3
1K0
1K0
12V
12V
1n0
1n0
MSJ-035-29D PPO (PHT)
1
E E
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 137
Tuner Brazil
Tuner Brazil
B01K B01K
1 2 3 4 5 6 7 8 9 10 11 12 13
1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
A A 2FF1 A7
5FE0 IF63 IF64 2FF2 B6
+2V5-BRA +1V2-BRA-VDDC 2FF3 B6
30R
2FF4 B6
2FE0
2FE3
2FE4
2FE5
2FF0
2FF1
100n
100n
100n
100n
1u0
1u0
2FF5 B6
+3V3-BRA-FLT
2FF6 B7
2FF7 C6
AGND 2FF8 C6
5FE3 IF65 IF66 5FE4
+3V3-BRA-FLT
+3V3-BRA 2FF9 C7
30R 30R 2FG0 C6
B B 2FG1 C7
2FE6
2FF2
2FF3
2FF4
2FF5
2FF6
100n
100n
100n
100n
1u0
1u0
2FG2 C1
2FG3 C2
AGND
2FG4 D3
5FE5 IF67 IF68 2FG6 D3
+1V2-BRA-DR1
5FE7 IF48 2FG7 E3
30R
+3V3 +3V3-BRA 2FG8 E3
2FE8
2FF7
2FF8
2FF9
100n
100n
1u0
1u0
30R 2FG9 E3
2FH2 D11
2FH3 D12
C IF69 5FE8
+2V5-BRA C 2FH4 D12
30R 7FE3 2FH5 D6
1FE0 LD3985M25
2FH6 E3
2FG0
2FG1
100n
1 3
1u0
5FE9 FF03
25M4 +5V
1
IN OUT
5 +2V5-BRA 2FH7 E3
30R 2FH8 E7
2FG2
4 2
2FG3
3 4
18p
18p
INH BP
3FE5 E7
COM 3FE6 F3
7FE0
3FE7 F3
32
22
20
16
36
56
63
13
35
49
64
34
DR1VDD 48
43
2FH2
2FH3
2FH4
TC90517FG
1u0
10n
1u0
2
AGND AGND AGND
3FE8 F3
AD_DVDD
AD_AVDD
PLLVDD
DR2VDD
19
VDDC Φ VDDS
21
2FH5
I FIL
AGND 3FE9 F3
D 18
O
X
PBVAL
58
1n5
3FG6-4 4 5 33R TS-FE-VALID D 3FG2-1 F6
3 53
DFE6
4 9F27-4 5
3FG2-2 F7
0 RERR TS-DVBS-VALID
2 XSEL 3FG4-1 F7
1 DFE7
RLOCK
54 3FG4-2 F6
IF+ 2FG4 10n IF17 30
IF- 2FG6 10n IF18 29
P
ADI_AI 55
DFE8
2 9F27-2 7 TS-DVBS-SOP
3FG6-2 E7
N RSEORF
3FG6-3 E7
2FG7 100n BFE1 28 59 3FG6-3 3 6 33R
P SBYTE TS-FE-SOP 3FG6-4 D7
2FG8 100n BFE2 27 ADQ_AI
N DFE9
52 9F28 TS-DVBS-CLOCK 5FG0
3FG7 E7
AGND BFE3 SLOCK
2FG9 100n 24 5FE0 A3
BFE4 P
2FH6 100n 25 AD_VREF 61 3FG7 33R TS-FE-CLOCK
N SRCK 30R 5FE3 B3
E AGND
2FH7 100n BFE5 26
AD_VREF SRDT
60 3FG6-2 2 7 33R TS-FE-DATA 5FG2 E 5FE4 B7
39 38
DFF1
1 9F27-1 8
5FE5 B3
AGND DTCLK STSFLG1 TS-DVBS-DATA 30R
IF27 IF28 5FE7 C11
3FE5 AGND
40 9 IF-AGC 5FE8 C7
+3V3-BRA-FLT DTMB AGCCNTI
18K 5FE9 C11
2FH8
8 10
10n
S_INFO AGCCNTR
DFF2 5FG0 E11
3FE6 10K 1 51
41
0
TSMD
STSFLG0 5FG2 E11
1
SYRSTN
42 7FE0 D4
3FE7 10K IF29 7 7FE3 C11
AGCI 3FG2-1
6 RESET-SYSTEMn
11 SLADRS
0
5 10K 3FG2-2 9F27-1 E8
F CKI 1
3FG4-2
10K F 9F27-2 D8
AD_DVSS
AD_AVSS
31
17
4
15
33
37
44
47
50
57
62
BFE2 E4
BFE3 E4
BFE4 E4
AGND AGND
BFE5 E4
DFE6 D6
DFE7 D6
G G DFE8 D6
DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
H H IF48 C12
IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6
1 2 3 4 5 6 7 8 9 10 11 12 13
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 138
Common Interface
B01A B01A
1 2 3 4 5 6 7 8 9 10 11
1P00-A D10
1P00-B G10
+3V3
3F06
2F00 A6
CA-RST 100K
+5V
3F01
+5VCA TRANSPORT STREAM FROM CAM
2F00
RES 2F01 A2
CA-CD1n 4 3F07-4 5
+T 0R4 7F00 100n 2F02 B6
20
22u 16V 74LVC245A 10K
2 3F07-2 7
2F01
1
3EN1 CA-CD2n
10K
2F03 D6
3EN2 3F07-3
2F04 E6
RES
19 CA-DATAENn 3 6
A 3F02 IF01
G3
3F07-1
10K
+3V3
A
CA-MOCLK 2
1
18 MOCLK CA-DATADIR 1 8 2F05 G6
100R IF02 2 10K
3F03-1
CA-MOVAL 1 8 3 17 MOVAL 2F06 H6
CA-MOSTRT 3F03-2 2 7 100R 4 16 MOSTRT CA-ADDENn 1 3F08-1 8
100R IF03 5 15 10K 3F01 A2
6 14 MOCLK 2 3F08-2 7
7 13 10K 3F02 A4
8 12 MOVAL 3 3F08-3 6
9 11 10K 3F03-1 A4
4 3F08-4 5
MOSTRT
3F03-2 A4
10
10K
MDO0 1 3F09-1 8
3F04-1 C4
B +3V3 10K
2 3F09-2 7
B 3F04-2 C4
2F02 MDO1
RES 10K
3 3F09-3 6
3F04-3 C4
7F01 100n MDO2
3F04-4 C4
20
74LVC245A 10K
1 MDO3 4 3F09-4 5 IF04
3EN1
3EN2 10K 3F05-1 C4
19
IF05
G3
MDO4 1
3F10-1
8 3F05-2 C4
CA-MDO0 3F04-1 1 8 100R 2 18 MDO0 10K
IF06 2
1
MDO5 2
3F10-2
7 3F05-3 C4
3F04-2 2 7 100R 3 17
CA-MDO1
CA-MDO2 3F04-3 3 6 100R 4 16
MDO1
MDO2 MDO6
10K
3 3F10-3 6 3F05-4 C4
C CA-MDO3
CA-MDO4 3F05-1 1
3F04-4
8 100R
4 5 100R 5
6
15
14
MDO3
MDO4 MDO7
10K
4 3F10-4 5 C 3F06 A9
CA-MDO5
CA-MDO6 3F05-3 3
3F05-2
6 100R
2 7 100R 7
8
13
12
MDO5
MDO6
10K 3F07-1 A9
CA-MDO7 3F05-4 4 5 100R 9 11 MDO7
3F12 3F07-2 A9
IF07 CA-RDY +3V3
3F07-3 A9
10
10K
CA-WAITn 2 3F11-2 7
3F11-3
10K
IF08
3F07-4 A9
+3V3 CA-INPACKn 3 6
2F03 10K
+5VCA
3F08-1 A9
15-BIT ADDRESS RES CA-WP 4 3F11-4 5
7F02 10K 3F08-2 A9
100n 3F11-1
20
74LVC245A 8 1
1
CA-VS1n
10K
+3V3 ROW_A
1P00-A
3F08-3 B9
D 3EN1
3EN2
19
GND1
D3
1 D 3F08-4 B9
G3 CA-ADDENn CA-D03 2
18 2
CA-D04 D4
D5
3 3F09-1 B9
XIO-A00 1 CA-A00 CA-D05 4
2 CA-D06 D6
5 3F09-2 B9
XIO-A01 17 3 CA-A01 CA-D07 D7
6
XIO-A02 16 4 CA-A02 CA-CE1n CE1
7
3F09-3 B9
XIO-A03 15 5 CA-A03 CA-A10 A10
XIO-A04 14 6 CA-A04 CA-OEn OE
8
9
3F09-4 B9
XIO-A05 13 7 CA-A05 CA-A11 A11
XIO-A06 12 8 CA-A06 CA-A09 A9
10
11
3F10-1 C9
11 9 A8
XIO-A07 CA-A07 CA-A08
CA-A13 A13
12 3F10-2 C9
13
10
E CA-A14
CA-WEn
A14
WE|P
14
E 3F10-3 C9
15
+3V3
CA-RDY RDY|BSY
VCC1
16 3F10-4 C9
+5VCA 17
2F04
RES
VPP1
A16
18 3F11-1 D9
CA-MIVAL 19
7F03 100n CA-MICLK A15
20 3F11-2 C9
20
10074595-050MLF 7F05 I5
+3V3 ROW_B IF01 A4
1P00-B
8-BIT DATA
2F05
RES GND3 IF02 A5
35
CD1
G 7F04
100n CA-CD1n 36
G IF03 A4
20
VPP2
52
CA-MDI4 A22
53
CA-MDI5 A23
54
+3V3 CA-MDI6 A24
55
CA-MDI7 A25
2F06 56 1X04 1X01
CONTROL RES MOCLK VS2
57 REF EMC HOLE REF EMC HOLE
7F05 CA-RST RESET
100n 58
20
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div. table
Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 139
Flash
Flash
B01B B01B
1 2 3 4
+3V3
A A
2F20
2F21
100n
100n
7F20
12
37
NAND04GW3B2DN6F
B Φ VCC
1
2 B
[FLASH] 3
4Gx16 4
5
XIO-D00 3F20-1 1 8 100R 29 6
0
XIO-D01 3F20-2 2 7 100R 30 10
1
XIO-D02 3F20-3 3 6 100R 31 11
2
XIO-D03 3F20-4 4 5 100R 32 14
3
XIO-D04 3F21-1 1 8 100R 41 IO 15
4
XIO-D05 3F21-2 2 7 100R 42 20
5
XIO-D06 3F21-3 3 6 100R 43 21
6
XIO-D07 3F21-4 4 5 100R 44 22
7
NC 23
24
C NAND-CE1n
IF21
25
26
C
NAND-CLE 3F22-2 2 7 100R 16 27
CLE
NAND-ALE 3F22-3 3 6 100R 17 28
ALE
+3V3 3F23 10K 9 33
CE
XIO-OEn 3F22-1 1 8 100R 8 34
RE
XIO-WEn 3F22-4 4 5 100R 18 35
WE
NAND-WPn IF22 19 38
WP
+3V3 3F24 7 39
R
40
2K2 B
NAND-RDY1n 45
IF23 46
47
3F19
48
10K
D VSS
D
13
36
+3V3
1 2 3 4
2F20 A3 3F20-1 B1 3F20-4 C2 3F21-3 C1 3F22-2 C1 3F23 C2 IF21 C3
2F21 A3 3F20-2 B2 3F21-1 C1 3F21-4 C2 3F22-3 C2 3F24 D2 IF22 D3 5 2010-03-12
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 140
USB Hub
USB Hub
B01C B01C
1 2 3 4 5 6 7 8 9
1F24 E9
1F25 B1
1P07 B9
1P08 D9
2F25 A2
IF44 +5V 2F26 A2
+3V3 2F27 A2
+T 0R4
2F28 A4
3F25
2F25
100n
2F29 A4
FF40 2F30 A4
+5V-USB1
3F26-1
A 1
100K
A 2F31 A5
2F32 A5
IF43 3F26-2
USB-OC1n 2 7 2F33 A5
100K 2F34 B1
3F26-3 2F35 B2
2F26
2F27
2F28
2F29
2F30
2F31
2F32
2F33
100n
100n
100n
100n
100n
100n
3 6
1u0
1u0
100K
3F25 A8
3F26-4 3F26-1 A8
4 5
3F26-2 A8
100K
3F26-3 A8
3F28
1M0
14
34
36
23
15
10
29
USB2513B-AEZG
5
1F25 3F28 B2
B 1 3 CR PLL
FILT
VDD_3V3 USB-DP 9F25 USB-DP2
B 3F30 C2
24M Φ USB-DM 9F26 USB-DM2 3F31-2 C2
4
2
USB HUB
3F35
2F34
2F35
10K
10p
10p
9F20
9F21
2 USB-DP1
IF34 USBDP_DN1|PRT_DIS_P1
32
XTALOUT USBDM_DN1|PRT_DIS_M1
1 USB-DM1 1P07 3F32 C8
12 +5V-USB1
IF30
26
BC_EN1|PWRTPWR1
FF34
1 3F34-1 C8
RESET-USBn RESET IF36 USB-DM1 2
17 USB-OC2n USB-DP1 FF35 3F34-2 C8
OSC2 3
11
TEST USBDP_DN2|PRT_DIS_P2
4 USB-DP2 4 3F34-3 D8
3 USB-DM2 +5V 5 6
2
3F31-2
7
IF42
28
USBDM_DN2|PRT_DIS_M2
16
3F34-4 D8
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2 3F35 B1
10K IF37 292303-4
C USB-DP IF31
IF32
31
DP OSC3
19 USB-OC3n
C 3F36 D6
+T 0R4
USB-DM 30 USBUP 7 USB-DP3 7F25 B2
3F32
DM USBDP_DN3|PRT_DIS_P3
+3V3 27 6 USB-DM3
VBUS_DET USBDM_DN3|PRT_DIS_M3 9F20 B7
18
3F30 IF41 BC_EN3|PWRTPWR3 3F34-1 FF33
35
RBIAS
1 +5V-USB2 9F21 B7
12K IF40 8
3
3F31-3
6 22 9
100K 9F25 B8
SDA|SMBDATA|NON_REM1 3F34-2 9F26 B8
10K 24 NC 20 USB-OC2n 2 7
3F31-4 IF39 SCL|SMBCLK|CFG_SEL0
4 5 25
HS_IND|CFG_SEL1
21 100K FF30 E8
10K
3
3F34-3
6
FF31 E9
VIA FF32 E9
GND_HS 100K
3F36
FF33 C9
37
38
39
40
41
+3V3 USB-OC3n
3F34-4
4 5
10K FF34 C7
D 100K SIDE USB TOP D FF35 C7
1P08 FF36 D7
FF36
+5V-USB2 1 FF37 D7
USB-DM2 2
USB-DP2 FF37 FF38 E9
3
4 IF45 FF39 E8
FF32 5 6
FF40 A8
292303-4 IF30 C2
IF31 C1
IF32 C1
IF33 B2
E FF39 +5V
FF38
1F24
1
E IF34 B2
IF35 B5
USB-DM3 2
USB-DP3 IF36 C5
3
FF30 4
IF37 C5
FF31 5 IF39 D2
7 6
IF40 C2
502382-0570 IF41 C2
IF42 C2
IF43 A3
IF44 A3
IF45 D9
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 141
SD Card
SD Card
B01D B01D
1 2 3 4
A A
3F40 FF45
+3V3 +3V3-SD
+T 0R4
22u 16V
2F40
B B
+3V3
1P09-2
3F42-2 FF44
2 7 SDIO-CDn SDIO-CDn
D 47K
10
11 D
3F42-3 IF46 12
3 6 SDIO-WP SDIO-WP FF50
1939115-1
47K
1 2 3 4
1P09-1 C4 3F41-1 C1 3F42-1 C1 3F43-2 C3 3F44-3 C3 FF43 C3 FF47 C3 IF46 D1
1P09-2 D4 3F41-2 C1 3F42-2 D1 3F43-3 C3 3F45 C1 FF44 D3 FF48 C3 IF47 B1
2F40 A2 3F41-3 C1 3F42-3 D1 3F44-1 C3 FF41 C3 FF45 A2 FF49 C3 5 2010-03-12
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 142
PNX85500 Control
PNX85500 Control
B01E B01E
1 2 3 4 5 6 7 8 9
1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
A A 3F51 B1
+3V3-STANDBY +3V3-STANDBY
3F52 B3
3F53 C6
+3V3-STANDBY
+3V3 +3V3 +3V3 3F54 D7
3F51
100n
2F52
RES
10K
3F58 E1
3F59 E3
RES
3F66
10K
3F60 E3
3F52
10K
8
7F52 3F62 D5
B B
3F67
M25P05-AVMN6
RES
10K
BACKLIGHT-BOOST
VCC IF50 3F63 E5
PNX-SPI-SDI IF51 2
Q Φ D
5 PNX-SPI-SDO 7F53 RES
PDTA114EU +5V
3F64 F5
512K IF52
6 PNX-SPI-CLK
FLASH C 3F65 F5
IF53
RES
1
S
IF54
PNX-SPI-CSBn
3F66 B7
3 IF55
3F67 B6
3F68
47K
W PNX-SPI-WPn BOOST-PWM
7F54-1 RES
HOLD
7
+3V3-STANDBY
BC847BPN(COL) 6 3F68 C7
IF61 7F54-2 RES
VSS
FF29
SPI-PROG BC847BPN(COL)
IF56 3F69 D7
4 2
7F52 B2
C IF57
1 C
4
RES
RES
9CH0 C7
2F53
3F69
3F54
RES
1K0
FF04 C4
1u0
10K
MAIN NVM FF29 C4
+3V3
FF55 E3
D DEBUG ONLY D FF56 E3
IF58 2F58 RES FF61 3F62
1F52 FF57 E2
SCL-SSB 100R
100n
FF62
1
2
SCL FF58 C7
7F58 SDA-SSB
3F63
3 SDA FF61 D4
8
FF63 100R 4 5
Φ FF62 D7
3F58
10K
(8K × 8) 7 FF63 E4
WC
EEPROM 3F59 FF55 FF64 F7
IF59 1 6 SCL-UP-MIPS
0 SCL
2
1 ADR 100R FF56 FF65 F4
E 3
2 SDA
5
3F60
SDA-UP-MIPS E FF66 F4
100R
4
IF50 B3
FF57 IF51 B1
DEBUG / RS232 INTERFACE LEVEL IF52 B3
IF53 B3
SHIFTED
FF65 3F64
1F51 IF54 C3
TXD-UP
100R FF64
1
FOR IF55 C6
FF66 3F65 2 UP
RXD-UP 3 IF56 C7
F RESET-STBYn
SPI-PROG
100R
4 DEBUG F IF57 C7
5
7 6
USE ONLY IF58 D2
IF59 E1
IF61 C4
IF62 C4
1 2 3 4 5 6 7 8 9 5 2010-03-12
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 143
HDMI & CI
HDMI & CI
B01F B01F
1 2 3 4 5 6 7 8 9 10
IF10
IF11
A TH2603
1T01
PNX-IF-P
A
2F71
9F00
9F01
9F02
9F03
FF71 +5V-TUN-PIN
RF-IN 15 14 10n
2F72
2F73
15p
1p0
IF_OUT1
IF_OUT2
RF_AGC
7F75
1
16 13 UPC3221GV-E1
4Mhz
SDA
NC1
NC2
NC3
SCL
+5V
DC
AS
AF72
2F65
VCC
15p
IF75 2F74 IF73 2F75 IF76 3F79-1
1F75 2 INPUT1 OUTPUT1 7 IF74 1
10
11
12
2p2 RES
1 4
1
2
3
4
5
6
7
8
9
I O1 10n 10n 220R IF16
5F71
2F76
2F77
5F74
2F62
2F70
680n
820n
2 5
22p
10p
1p0
IGND O2 2F78 IF77
3 INPUT2 OUTPUT2 6 IF78
TUN-P1 2F79 IF80 3F79-4
AF71 TUN-IF-N 3 4
GND IF81 10n
820R
5F76
3F82
330n
AF70 TUN-IF-P
GND1
GND2
FF74 FF76 220R
B FF00
9F04 IF-AGC
X7251X
36M17
4 VAGC AGC CONTROL
10n AF73
B
RES
RES
2F80
2F82
15p
1p0
2F81
2F59
2F60
100n
4u7
5
2F61 FF75
4n7
4u7
PNX-IF-N
2F93
100n
IF82 3F77
TUN-P6 FF81 PNX-IF-AGC IF12 IF13
3F80 2F63
TUN-P7 FF82 4K7 IF79 IF-
FF01 220R 10n
5F66
680n
22p
IF-AGC IF72
+5V-TUN-PIN 2F66
+5V-TUN-PIN
9F05
9F06
IF+
C C
BA591
2F85
3F71
6F72
2F92
4K7
1K0
47n
10n
3F72 220R 10n
IF86 2F90
2F84 3F76 IF87 SCL-TUNER 10n
3F78
3K3
15p 47R 3 5F73 2
TUN-P6 TUN-IF-N
5F70
470n
2F86 3F75 IF88 4 1
SDA-TUNER TUN-IF-P
15p 47R ATB2012 2F91
TUN-P7
10n RES
D IF89
SELECT-SAW
IF90
7F70
D
PDTC114EU
2F94
RES
10n
9F71
E 5F72
+5V-TUN-PIN
E
+5V-TUN
30R RES
2F88
22u
1 2 3 4 5 6 7 8 9 10
1F75 B5 2F62 B10 2F70 B10 2F75 B8 2F80 B9 2F86 D1 2F93 C2 3F76 C2 3F80 C9 5F71 B9 6F72 C7 9F02 A8 9F71 E4 FF00 B2 FF76 B1 IF12 C9 IF72 C5 IF77 B6 IF82 C4 IF90 D7
1T01 A1 2F63 C9 2F71 A7 2F76 B9 2F81 B1 2F88 E5 2F94 D7 3F77 C4 3F81 C9 5F72 E4 7F70 D8 9F03 A8 AF70 B3 FF01 C4 FF81 C1 IF13 C9 IF73 B6 IF78 B8 IF86 C5
2F59 B1 2F64 C9 2F72 A9 2F77 B9 2F82 B9 2F90 C6 3F71 C7 3F78 C7 3F82 B10 5F73 C5 7F75 A6 9F04 B3 AF71 B3 FF71 A1 FF82 C2 IF14 C9 IF74 B8 IF79 C5 IF87 C2
2F60 B1 2F65 B10 2F73 A9 2F78 B6 2F84 C1 2F91 D6 3F72 C7 3F79-1 B8 5F66 C10 5F74 B10 9F00 A6 9F05 C4 AF72 B9 FF74 B1 IF10 A5 IF15 C9 IF75 B6 IF80 B8 IF88 D2
2F61 B1 2F66 C10 2F74 B6 2F79 B8 2F85 C4 2F92 C7 3F75 D2 3F79-4 B8 5F70 D6 5F76 B10 9F01 A6 9F06 C4 AF73 B9 FF75 B2 IF11 A5 IF16 B10 IF76 B8 IF81 B6 IF89 D5
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 144
Toshiba Supply
Toshiba Supply
B01G B01G
1 2 3
2FA2 C1
2FA3 C2
2FA4 C3
5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2
A A
+3V3 +1V2-BRA-DR1
+1V2-BRA-VDDC
B B
5FA3
5FA4
30R
30R
7FA3
LD1117DT12
FFAF
3 2
IN OUT
COM
2FA2
2FA3
2FA4
100n
100n
10u
1
FFA2
C C
D D
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 145
HDMI
HDMI
B01H B01H
1 2 3 4
A A
B 4
5
DRX1+
B
6 DRX1-
7 DRX0+
8
9 DRX0-
1 3FBF-1 8
10 DRXC+
47K
11
12 DRXC-
13 PCEC-HDMI
14
FFB1 DRX-DDC-SCL DRX-DDC-SCL
15 3FBF-2
FFB2 DRX-DDC-SDA DRX-DDC-SDA 2 7 DIN-5V
16
17 47K
FFB3
C 18
19 FFB4
DIN-5V
DRX-HOTPLUG C
FFB5 21 20
23 22 FFB6
1 2 3 4
5 2010-03-12
1P05 B1 3FBF-1 C4 3FBF-2 C4 FFB1 C2 FFB2 C2 FFB3 C2 FFB4 C2 FFB5 C1 FFB6 C2 TUNER, HDMI & CI
8204 000 8994
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 146
VGA
VGA
B01I B01I
1 2 3 4 5 6 7 8 9
1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
A A 1FC4 C4
1FC5 D4
FFC1 3FC5
R-VGA 1FC6 F4
CDS4C12GTA
18R
2FC1 B4
2FC1
1FC1
RES 6FC1
100p
12V
2FC2 B4
2FC3 C4
FFC2 3FC6
2FC4 C4
G-VGA
B B 2FC5 D4
CDS4C12GTA
18R
2FC6 E4
RES 6FC2
2FC2
1FC2
100p
12V
2FC7 E4
1E05
1
2FC8 F4
2
3
3FC7
B-VGA 3FC1 D3
CDS4C12GTA
4
5
FFC3 18R
3FC2 E3
RES 6FC3
2FC3
1FC3
100p
12V
VGA
6
7
3FC3 C6
CONNECTOR 8 3FC4 D6
C 9
10
FFC4 C 3FC5 A6
11 FFC5
12
9FC5 H-SYNC-VGA
3FC6 B6
13
3FC7 C6
RES 6FC4
CDS4C12GTA
14
2FC4
1FC4
3FC3
12V
47p
4K7
15
17
16
6FC1 B5
FFC6
1216-00D-15S-1EF 6FC2 B5
FFC7
V-SYNC-VGA
6FC3 C5
9FC6
6FC4 C5
CDS4C12GTA
D D
RES 6FC5
6FC5 D5
2FC5
1FC5
3FC4
12V
47p
4K7
6FC6 E5
RES
9FC1 VGA-SDA-EDID-HDMI 6FC7 E5
3FC1 FFC8
9FC2 VGA-SDA-EDID 6FC8 F5
RES
CDS4C12GTA
10K
9FC1 D6
6FC6
2FC6
12V
47p
9FC2 E6
9FC3 E6
E RES
3FC2 FFC9
9FC3 VGA-SCL-EDID-HDMI
E 9FC4 E6
9FC4 VGA-SCL-EDID
9FC5 C6
CDS4C12GTA
10K RES
9FC6 D6
2FC7
6FC7
12V
47p
FFC1 A4
FFC2 B4
+5V-VGA
FFC3 C4
FFC4 C3
CDS4C12GTA
F FFC5 C4
2FC8
1FC6
6FC8
F
12V
47p
FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 147
3FD1
3FD2 RES
1K0
RES
3FD3 B3
2FD1
9FD1
9FD2
100n
1K0
3FD4 B2
LTST-C190KGKT
3FD6 C4
8
RES 7FD1
LM75BDP 3FD7 C4
6FD1
+VS
B 3
OS A0
7 IFD1
B 3FDG-1 D4
IFD2
SDA-SSB
3FD3
1
SDA A1
6 IFD3 3FDG-2 D4
100R IFD4
SCL-SSB
3FD4
2
SCL A2
5 IFD5 6FD1 B3
GND
100R
6FD2 D4
3FD6 RES
3FD7 RES
9FD5
1K0
1K0
6FD3 D5
4
7FD1 B3
9FD1 A4
9FD2 A4
C C
9FD5 C5
FFDA D5
1329
1
FFDB D5
2 FFDC D6
3
5 4
IFD1 B4
502382-0370
IFD2 B3
IFD3 B4
D FFDA 1328
D IFD4 B3
AMP1 2
3
AMP2
1 IFD5 B4
CDS4C12GTA
CDS4C12GTA
FFDB
8
FFDC
3FDG-1
3FDG-2
2FDC
2FDD
1FD2
6FD2
1FD3
6FD3
1K0
1K0
12V
12V
1n0
1n0
MSJ-035-29D PPO (PHT)
1
E E
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 148
Tuner Brazil
Tuner Brazil
B01K B01K
1 2 3 4 5 6 7 8 9 10 11 12 13 1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
2FF1 A7
2FF2 B6
A A 2FF3 B6
5FE0 IF63 IF64
+2V5-BRA +1V2-BRA-VDDC
2FF4 B6
30R 2FF5 B6
2FF6 B7
2FE0
2FE3
2FE4
2FE5
2FF0
2FF1
100n
100n
100n
100n
1u0
1u0
+3V3-BRA-FLT
2FF7 C6
2FF8 C6
AGND
2FF9 C7
5FE3 IF65 IF66 +3V3-BRA-FLT
5FE4 2FG0 C6
+3V3-BRA
2FG1 C7
30R 30R
2FG2 C1
B B
2FE6
2FF2
2FF3
2FF4
2FF5
2FF6
100n
100n
100n
100n
1u0
1u0
2FG3 C2
2FG4 D3
2FG6 D3
AGND
5FE5 IF67 IF68
2FG7 E3
+1V2-BRA-DR1 2FG8 E3
30R 5FE7 IF48
+3V3-BRA
2FG9 E3
+3V3
2FE8
2FF7
2FF8
2FF9
100n
100n
2FH2 D11
1u0
1u0
30R
2FH3 D12
2FH4 D12
2FH5 D6
C IF69 5FE8
+2V5-BRA C 2FH6 E3
30R 7FE3
1FE0 LD3985M25 2FH7 E3
2FG0
2FG1
100n
1 3
1u0
5FE9 FF03 2FH8 E7
1 5 +2V5-BRA
25M4 +5V IN OUT
30R 3FE5 E7
2FG2
4 2
2FG3
3 4
18p
18p
INH BP 3FE6 F3
COM 3FE7 F3
7FE0 3FE8 F3
32
22
20
16
36
56
63
13
35
49
64
34
DR1VDD 48
43
2FH2
2FH3
2FH4
TC90517FG
1u0
10n
1u0
2
AGND AGND AGND 3FE9 F3
AD_DVDD
AD_AVDD
PLLVDD
DR2VDD
19
VDDC Φ VDDS
21
2FH5
3FG2-1 F6
I FIL
AGND
D 18
O
X
PBVAL
58
1n5
3FG6-4 4 5 33R TS-FE-VALID D 3FG2-2 F7
3FG4-1 F7
DFE6
3 53 4 9F27-4 5 TS-DVBS-VALID
2
0
XSEL
RERR 3FG4-2 F6
1 DFE7
54 3FG6-2 E7
RLOCK
IF+ 2FG4 10n IF17 30 3FG6-3 E7
P DFE8
IF- 2FG6 10n IF18 29 ADI_AI 55 2 9F27-2 7 TS-DVBS-SOP
N RSEORF 3FG6-4 D7
2FG7 100n BFE1 28 59 3FG6-3 3 6 33R 3FG7 E7
P SBYTE TS-FE-SOP
2FG8 100n BFE2 27 ADQ_AI
N
52
DFE9
9F28
5FE0 A3
AGND SLOCK TS-DVBS-CLOCK 5FG0
2FG9 100n BFE3 24
P
5FE3 B3
2FH6 100n BFE4 25 AD_VREF 61 3FG7 33R
N SRCK TS-FE-CLOCK 30R 5FE4 B7
E AGND
2FH7 100n BFE5 26
AD_VREF SRDT
60 3FG6-2 2 7 33R TS-FE-DATA 5FG2 E 5FE5 B3
5FE7 C11
DFF1
39 38 1 9F27-1 8 TS-DVBS-DATA
AGND DTCLK STSFLG1 30R 5FE8 C7
IF27 3FE5 IF28 AGND
+3V3-BRA-FLT
40
DTMB AGCCNTI
9 IF-AGC 5FE9 C11
18K 5FG0 E11
2FH8
8 10
10n
S_INFO AGCCNTR 5FG2 E11
DFF2
3FE6 10K 1
0 STSFLG0
51 7FE0 D4
41 TSMD
1
42 7FE3 C11
SYRSTN
3FE7 10K IF29 7
AGCI
9F27-1 E8
6 3FG2-1 RESET-SYSTEMn
11 SLADRS
0
5 10K 3FG2-2
9F27-2 D8
F CKI 1
3FG4-2
10K F 9F27-4 D8
AD_DVSS
AD_AVSS
31
17
4
15
33
37
44
47
50
57
62
BFE3 E4
BFE4 E4
BFE5 E4
DFE6 D6
AGND AGND
DFE7 D6
DFE8 D6
G G DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
IF48 C12
H H IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6
1 2 3 4 5 6 7 8 9 10 11 12 13
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 149
Common Interface
B01A B01A
1 2 3 4 5 6 7 8 9 10 11
1P00-A D10
1P00-B G10
+3V3
2F00 A6
3F06
3F01 2F00 CA-RST 100K 2F01 A2
+5V +5VCA TRANSPORT STREAM FROM CAM RES
+T 0R4 7F00 100n CA-CD1n 4 3F07-4 5 2F02 B6
20
74LVC245A 10K
22u 16V 2 3F07-2 7 2F03 D6
2F01
1 CA-CD2n
3EN1
10K
3EN2 3F07-3 2F04 E6
RES
19 CA-DATAENn 3 6
A 3F02 IF01
2
G3
18 1
3F07-1
10K
8
+3V3
A 2F05 G6
CA-MOCLK 1 MOCLK CA-DATADIR
100R
1
3F03-1
8
IF02
3
2
17
10K 2F06 H6
CA-MOVAL MOVAL
CA-MOSTRT 3F03-2 2 7 100R 4 16 MOSTRT CA-ADDENn 1 3F08-1 8 3F01 A2
100R IF03 5 15 10K
6 14 MOCLK 2 3F08-2 7 3F02 A4
7 13 10K
8 12 MOVAL 3 3F08-3 6 3F03-1 A4
9 11 10K
MOSTRT 4 3F08-4 5 3F03-2 A4
3F04-1 C4
10
10K
20
74LVC245A 10K
1
3EN1 MDO3 4 3F09-4 5 IF04 3F05-1 C4
19
3EN2 10K
3F05-2 C4
G3 3F10-1
CA-MDO0 3F04-1 1 8 100R
IF05
2 18 MDO0
MDO4 1 8
10K
3F05-3 C4
1 3F10-2
3F04-2 2 7 100R
IF06
3
2
17
MDO5 2 7 3F05-4 C4
CA-MDO1 MDO1 10K
CA-MDO2 3F04-3 3 6 100R 4 16 MDO2 MDO6 3 3F10-3 6 3F06 A9
CA-MDO3 3F04-4 4 5 100R 5 15 MDO3 10K
C CA-MDO4 3F05-1 1 8 100R
3F05-2 2 7 100R
6
7
14
13
MDO4 MDO7 4 3F10-4 5
10K
C 3F07-1 A9
CA-MDO5 MDO5
CA-MDO6 3F05-3 3 6 100R 8 12 MDO6 3F07-2 A9
3F05-4 4 5 100R 9 11
CA-MDO7 MDO7
CA-RDY
3F12 3F07-3 A9
IF07 +3V3
3F07-4 A9
10
10K
CA-WAITn 2 3F11-2 7
10K 3F08-1 A9
+3V3 CA-INPACKn 3 3F11-3 6 IF08
+5VCA
2F03 10K 3F08-2 A9
15-BIT ADDRESS RES CA-WP 4 3F11-4 5
7F02 100n 10K 3F08-3 B9
8 3F11-1 1
20
74LVC245A CA-VS1n
1 10K
+3V3 ROW_A
1P00-A 3F08-4 B9
D 3EN1
3EN2
19
GND1
D3
1 D 3F09-1 B9
G3 CA-ADDENn CA-D03 2
18 2
CA-D04 D4
D5
3 3F09-2 B9
XIO-A00 1 CA-A00 CA-D05 4
2 CA-D06 D6
5 3F09-3 B9
XIO-A01 17 3 CA-A01 CA-D07 D7
XIO-A02 16 4 CA-A02 CA-CE1n CE1
6
7
3F09-4 B9
XIO-A03 15 5 CA-A03 CA-A10 A10
XIO-A04 14 6 CA-A04 CA-OEn OE
8
9
3F10-1 C9
13 7 A11
XIO-A05
XIO-A06 12 8
CA-A05
CA-A06
CA-A11
CA-A09 A9
10 3F10-2 C9
11
XIO-A07 11 9 CA-A07 CA-A08
CA-A13
A8
A13
12 3F10-3 C9
13
3F10-4 C9
10
CA-A14 A14
E CA-WEn WE|P
14
15 E
CA-RDY RDY|BSY
16 3F11-1 D9
+3V3 +5VCA VCC1
2F04
VPP1
17
18
3F11-2 C9
RES CA-MIVAL A16
7F03 100n CA-MICLK A15
19
20
3F11-3 D9
20
74LVC245A A12
1
CA-A12
CA-A07 A7
21 3F11-4 D9
3EN1 22
3EN2
19 CA-ADDENn
CA-A06
CA-A05
A6
A5
23 3F12 C9
G3 24
18 2
CA-A04 A4
A3
25 7F00 A5
XIO-A08 1 CA-A08 CA-A03 26
2 CA-A02 A2
27 7F01 B5
XIO-A09 17 3 CA-A09 CA-A01 A1
F XIO-A10 16
15
4
5
CA-A10 CA-A00 A0
D0
28
29 F 7F02 D5
XIO-A11 CA-A11 CA-D00
XIO-A12 14 6 CA-A12 CA-D01 D1
30
31
7F03 E5
13 7 D2
XIO-A13
XIO-A14 12 8
CA-A13
CA-A14
CA-D02
CA-WP WP|IOIS16
32 7F04 G5
33
11 9 GND2
34 7F05 I5
70 69
IF01 A4
10
10074595-050MLF
IF02 A5
+3V3 ROW_B
2F05
1P00-B IF03 A4
8-BIT DATA RES GND3
35 IF04 B9
7F04 100n CA-CD1n CD1
G 36
G
20
74LVC245A D11
1 CA-DATADIR
MDO3
MDO4 D12
37 IF05 C4
3EN1 38
3EN2
19
MDO5 D13
D14
39 IF06 C5
G3 CA-DATAENn MDO6 40
MDO7 D15
41 IF07 C5
XIO-D00 18 2 CA-D00 CA-CE2n CE2
1 42
2 CA-VS1n VS1
43
IF08 D9
XIO-D01 17 3 CA-D01 CA-IORDn IORD
44
XIO-D02 16 4 CA-D02 CA-IOWRn IOWR
45
XIO-D03 15 5 CA-D03 CA-MISTRT A17
46
XIO-D04 14 6 CA-D04 CA-MDI0 A18
47 1X04
XIO-D05 13 7 CA-D05 CA-MDI1 A19 REF EMC HOLE
48
XIO-D06 12 8 CA-D06 CA-MDI2 A20
49
XIO-D07 11 9 CA-D07 CA-MDI3 A21
H +5VCA VCC2
50
51 H
10
VPP2
52
CA-MDI4 A22
53
CA-MDI5 A23
54
+3V3 CA-MDI6 A24
55
CA-MDI7 A25
2F06 56
CONTROL RES MOCLK VS2
57
7F05 CA-RST RESET
100n 58
20
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 150
Flash
Flash
B01B B01B
1 2 3 4
+3V3
A A
2F20
2F21
100n
100n
7F20
12
37
NAND04GW3B2DN6F
B Φ VCC
1
2 B
[FLASH] 3
4G × 16 4
5
XIO-D00 3F20-1 1 8 100R 29 6
0
XIO-D01 3F20-2 2 7 100R 30 10
1
XIO-D02 3F20-3 3 6 100R 31 11
2
XIO-D03 3F20-4 4 5 100R 32 14
3
XIO-D04 3F21-1 1 8 100R 41 IO 15
4
XIO-D05 3F21-2 2 7 100R 42 20
5
XIO-D06 3F21-3 3 6 100R 43 21
6
XIO-D07 3F21-4 4 5 100R 44 22
7
NC 23
24
C NAND-CE1n
IF21
25
26
C
NAND-CLE 3F22-2 2 7 100R 16 27
CLE
NAND-ALE 3F22-3 3 6 100R 17 28
ALE
+3V3 3F23 10K 9 33
CE
XIO-OEn 3F22-1 1 8 100R 8 34
RE
XIO-WEn 3F22-4 4 5 100R 18 35
WE
NAND-WPn IF22 19 38
WP
+3V3 3F24 7 39
R
40
2K2 B
NAND-RDY1n 45
IF23 46
47
48
10K
D 3F19 VSS
D
13
36
+3V3
1 2 3 4
2F20 A3 3F20-1 B1 3F20-4 C2 3F21-3 C1 3F22-2 C1 3F23 C2 IF21 C3
2F21 A3 3F20-2 B2 3F21-1 C1 3F21-4 C2 3F22-3 C2 3F24 D2 IF22 D3 2 2010-02-01
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 151
USB Hub
USB Hub
B01C B01C
1 2 3 4 5 6 7 8 9
1F24 E9
1F25 B1
1P07 B9
1P08 D9
2F25 A2
IF44 +5V
2F26 A2
+3V3 2F27 A2
+T 0R4
2F28 A4
3F25
2F25
100n
2F29 A4
FF40 2F30 A4
+5V-USB1
3F26-1
A 1
100K
A 2F31 A5
2F32 A5
IF43 3F26-2
USB-OC1n 2 7 2F33 A5
100K 2F34 B1
3F26-3 2F35 B2
2F26
2F27
2F28
2F29
2F30
2F31
2F32
2F33
100n
100n
100n
100n
100n
100n
3 6
1u0
1u0
100K
3F25 A8
3F26-4
3F26-1 A8
4 5
3F26-2 A8
100K
3F26-3 A8
1M0
14
34
36
23
15
10
29
USB2513B-AEZG
5
1F25 3F28 B2
B 1 3 CR PLL
FILT
VDD_3V3 USB-DP 9F25 USB-DP2
B 3F30 C2
24M Φ USB-DM 9F26 USB-DM2 3F31-2 C2
4
2
USB HUB
2F34
2F35
10K
10p
10p
9F20
9F21
2 USB-DP1
IF34 USBDP_DN1|PRT_DIS_P1
32
XTALOUT USBDM_DN1|PRT_DIS_M1
1 USB-DM1 1P07 3F32 C8
IF30 12 +5V-USB1 3F34-1 C8
BC_EN1|PWRTPWR1 1
RESET-USBn 26 IF36 USB-DM1 FF34
RESET
17 USB-OC2n USB-DP1 FF35
2 3F34-2 C8
OSC2 3
11
TEST USBDP_DN2|PRT_DIS_P2
4 USB-DP2 4
3F34-3 D8
3 +5V 5 6
3F31-2 IF42 USBDM_DN2|PRT_DIS_M2 USB-DM2 3F34-4 D8
2 7 28 16
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2
292303-4 3F35 B1
10K IF37
3F36 D6
C USB-DP IF31
IF32
31
DP OSC3
19 USB-OC3n
C
+T 0R4
USB-DM 30 USBUP 7 USB-DP3 7F25 B2
3F32
DM USBDP_DN3|PRT_DIS_P3
+3V3 27 6 USB-DM3
VBUS_DET USBDM_DN3|PRT_DIS_M3
18 9F20 B7
3F30 IF41 BC_EN3|PWRTPWR3 3F34-1 FF33
35 1 +5V-USB2 9F21 B7
RBIAS
12K IF40 8 100K 9F25 B8
3F31-3
3 6 22 9
24
SDA|SMBDATA|NON_REM1
NC 20 2
3F34-2
7
9F26 B8
10K IF39 SCL|SMBCLK|CFG_SEL0 USB-OC2n
3F31-4 FF30 E8
4 5 25 21 100K
HS_IND|CFG_SEL1
10K 3F34-3 FF31 E9
3 6
GND_HS
VIA FF32 E9
3F36 100K
FF33 C9
37
38
39
40
41
+3V3 USB-OC3n
3F34-4
10K 4 5 FF34 C7
D 100K SIDE USB TOP D FF35 C7
1P08 FF36 D7
+5V-USB2 1 FF37 D7
USB-DM2 FF36
2 FF38 E9
USB-DP2 FF37
3 FF39 E8
4 IF45
FF32 5 6 FF40 A8
IF30 C2
292303-4
IF31 C1
IF32 C1
IF33 B2
IF34 B2
E FF39 +5V
FF38
1F24
1
E IF35 B5
USB-DM3 2 IF36 C5
USB-DP3 3 IF37 C5
FF30 4
FF31 IF39 D2
5
7 6 IF40 C2
502382-0570
IF41 C2
IF42 C2
IF43 A3
IF44 A3
IF45 D9
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 152
SD Card
SD Card
B01D B01D
1 2 3 4
A A
3F40 FF45
+3V3 +3V3-SD
+T 0R4
22u 16V
2F40
B B
+3V3
1P09-2
3F42-2 FF44
2 7 SDIO-CDn SDIO-CDn
D 47K
10
11 D
3F42-3 IF46 12
3 6 SDIO-WP SDIO-WP FF50
1939115-1
47K
1 2 3 4
1P09-1 C4 3F41-1 C1 3F42-1 C1 3F43-2 C3 3F44-3 C3 FF43 C3 FF47 C3 IF46 D1
1P09-2 D4 3F41-2 C1 3F42-2 D1 3F43-3 C3 3F45 C1 FF44 D3 FF48 C3 IF47 B1
2F40 A2 3F41-3 C1 3F42-3 D1 3F44-1 C3 FF41 C3 FF45 A2 FF49 C3 2 2010-02-01
3F40 A2 3F41-4 C1 3F43-1 C3 3F44-2 C3 FF42 C3 FF46 C4 FF50 D3 TUNER, HDMI & CI
8204 000 9081
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 153
PNX85500 Control
PNX85500 Control
B01E B01E
1 2 3 4 5 6 7 8 9
1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
A A 3F51 B1
+3V3-STANDBY +3V3-STANDBY
3F52 B3
3F53 C6
+3V3-STANDBY
+3V3 +3V3 +3V3 3F54 D7
3F51
100n
2F52
RES
10K
3F58 E1
3F59 E3
RES
10K
3F66 3F60 E3
3F52
10K
8
7F52 3F62 D5
B M25P05-AVMN6 B
RES
10K
BACKLIGHT-BOOST
VCC IF50
3F67 3F63 E5
PNX-SPI-SDI IF51 2
Q Φ D
5 PNX-SPI-SDO 7F53 RES
PDTA114EU +5V 3F64 F5
512K IF52
FLASH C
6 PNX-SPI-CLK 3F65 F5
IF53
3F66 B7
RES
1 PNX-SPI-CSBn
S
IF54
3 IF55 3F67 B6
3F68
47K
W PNX-SPI-WPn BOOST-PWM
7F54-1 RES 3F68 C7
7 BC847BPN(COL) 6
HOLD +3V3-STANDBY
FF29 IF61 7F54-2 RES IF56 3F69 D7
VSS SPI-PROG BC847BPN(COL)
4 2 7F52 B2
C IF57
1 C 7F53 B7
4
IF62 5
FF04
SDM
3
7F54-1 C7
7F54-2 C7
3F53
9CH0 FF58 7F58 D1
10K RES 9CH0 C7
RES
RES
FF04 C4
2F53
3F69
3F54
RES
1K0
1u0
FF29 C4
10K
+3V3 MAIN NVM FF55 E3
D DEBUG ONLY D FF56 E3
FF57 E2
IF58 1F52
2F58 RES
SCL-SSB
FF61 3F62 100R FF58 C7
1 SCL
100n
FF62
2 FF61 D4
7F58 SDA-SSB 3 SDA
3F63 FF62 D7
8
FF63 100R 4 5
Φ FF63 E4
10K
3F58 (8K × 8)
WC
7
FF64 F7
EEPROM 3F59 FF55
IF59 1
0 SCL
6 SCL-UP-MIPS FF65 F4
2
E 3
1
2
ADR
SDA
5
100R 3F60 FF56
SDA-UP-MIPS E FF66 F4
100R IF50 B3
4
IF51 B1
FF57
IF52 B3
DEBUG / RS232 INTERFACE LEVEL IF53 B3
SHIFTED
IF54 C3
FF65 3F64
1F51 IF55 C6
TXD-UP
100R FF64
1
FOR IF56 C7
FF66 3F65 2 UP
RXD-UP 3 IF57 C7
F RESET-STBYn
SPI-PROG
100R
4 DEBUG F IF58 D2
5
7 6
USE ONLY IF59 E1
IF61 C4
IF62 C4
1 2 3 4 5 6 7 8 9
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div. table
Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 154
HDMI & CI
HDMI & CI
B01F B01F
1 2 3 4 5 6 7 8 9 10
IF10
IF11
A 1T01
TX31XX PNX-IF-P
A
2F71
9F00
9F01
9F02
9F03
FF71 +5V-TUN-PIN
15
TUNER 14
4MHZ_REF
10n
2F72
2F73
15p
1p0
I2C_ADR
I2C_SDA
IF_OUT1
IF_OUT2
RF_AGC
I2C_SCL
7F75
B+_TUN
B+_LNA
1
16 13
RF_IO
UPC3221GV-E1
TUN
NC
AF72
2F65
VCC
15p
IF75 2F74 IF73 2F75 IF76 3F79-1
1F75 2 INPUT1 OUTPUT1 7 IF74 1
10
11
12
2p2 RES
1 4
1
9
I O1 10n 10n 220R IF16
5F71
2F76
2F77
5F74
2F62
2F70
680n
820n
2 5
22p
10p
1p0
IGND O2 2F78 IF77
3 INPUT2 OUTPUT2 6 IF78
2F79 IF80 3F79-4
AF71 TUN-IF-N 3 4
GND IF81 10n
820R
5F76
330n
AF70 TUN-IF-P
GND1
GND2
FF74 FF76 220R
B TUN-P1 FF00
9F04 IF-AGC
X7251X
36M17
4 VAGC AGC CONTROL
10n AF73 3F82
B
RES
RES
2F80
2F82
15p
1p0
2F81
2F59
2F60
2F61
100n
4u7
5
FF75
4n7
4u7
PNX-IF-N
2F93
100n
IF82 3F77
TUN-P6 FF81 PNX-IF-AGC IF12 IF13
3F80 2F63
TUN-P7 FF82 4K7 IF79 IF-
FF01 220R 10n
5F66
2F66
680n
22p
IF-AGC IF72
+5V-TUN-PIN
+5V-TUN-PIN
9F05
9F06
IF+
C C
BA591
2F85
6F72
3F72
2F92
4K7
1K0
47n
10n
3F71 220R 10n
IF86 2F90
2F84 3F76 IF87 SCL-TUNER 10n
3K3
15p 47R 3 5F73 2 3F78
TUN-P6 TUN-IF-N
5F70
470n
2F86 3F75 IF88 4 1
SDA-TUNER TUN-IF-P
15p 47R ATB2012 2F91
TUN-P7
10n RES
D IF89
SELECT-SAW
IF90
7F70
D
PDTC114EU
2F94
RES
10n
9F71
E 5F72
+5V-TUN-PIN
E
+5V-TUN
30R RES
2F88
22u
1 2 3 4 5 6 7 8 9 10
1F75 B5 2F62 B10 2F70 B10 2F75 B8 2F80 B9 2F86 D1 2F93 C2 3F76 C2 3F80 C9 5F71 B9 6F72 C7 9F02 A8 9F71 E4 FF00 B2 FF76 B1 IF12 C9 IF72 C5 IF77 B6 IF82 C4 IF90 D7
1T01 A1 2F63 C9 2F71 A7 2F76 B9 2F81 B1 2F88 E5 2F94 D7 3F77 C4 3F81 C9 5F72 E4 7F70 D8 9F03 A8 AF70 B3 FF01 C4 FF81 C1 IF13 C9 IF73 B6 IF78 B8 IF86 C5
2F59 B1 2F64 C9 2F72 A9 2F77 B9 2F82 B9 2F90 C6 3F71 C7 3F78 C7 3F82 B10 5F73 C5 7F75 A6 9F04 B3 AF71 B3 FF71 A1 FF82 C2 IF14 C9 IF74 B8 IF79 C5 IF87 C2
2F60 B1 2F65 B10 2F73 A9 2F78 B6 2F84 C1 2F91 D6 3F72 C7 3F79-1 B8 5F66 C10 5F74 B10 9F00 A6 9F05 C4 AF72 B9 FF74 B1 IF10 A5 IF15 C9 IF75 B6 IF80 B8 IF88 D2
2F61 B1 2F66 C10 2F74 B6 2F79 B8 2F85 C4 2F92 C7 3F75 D2 3F79-4 B8 5F70 D6 5F76 B10 9F01 A6 9F06 C4 AF73 B9 FF75 B2 IF11 A5 IF16 B10 IF76 B8 IF81 B6 IF89 D5
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 155
Toshiba Supply
Toshiba Supply
B01G B01G
2FA2 C1
1 2 3 2FA3 C2
2FA4 C3
5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2
A A
+3V3 +1V2-BRA-DR1
+1V2-BRA-VDDC
B B
5FA3
5FA4
30R
30R
7FA3
LD1117DT12
FFAF
3 2
IN OUT
COM
2FA2
2FA3
2FA4
100n
100n
10u
1
FFA2
C C
D D
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 156
HDMI
HDMI
B01H B01H
1 2 3 4
A A
B 4
5
DRX1+
B
6 DRX1-
7 DRX0+
8
9 DRX0-
1 3FBF-1 8
10 DRXC+
47K
11
12 DRXC-
13 PCEC-HDMI
14
FFB1 DRX-DDC-SCL DRX-DDC-SCL
15 3FBF-2
FFB2 DRX-DDC-SDA DRX-DDC-SDA 2 7 DIN-5V
16
17 47K
FFB3
C 18
19 FFB4
DIN-5V
DRX-HOTPLUG C
FFB5 21 20
23 22 FFB6
1 2 3 4
1P05 B1 3FBF-1 C4 3FBF-2 C4 FFB1 C2 FFB2 C2 FFB3 C2 FFB4 C2 FFB5 C1 FFB6 C2 2 2010-02-01
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 157
VGA
VGA
B01I B01I
1 2 3 4 5 6 7 8 9
1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
A A 1FC4 C4
1FC5 D4
FFC1 3FC5
R-VGA 1FC6 F4
CDS4C12GTA
18R
2FC1 B4
2FC1
1FC1
RES 6FC1
100p
12V
2FC2 B4
2FC3 C4
FFC2 3FC6
2FC4 C4
G-VGA
B B 2FC5 D4
CDS4C12GTA
18R
2FC6 E4
RES 6FC2
2FC2
1FC2
100p
12V
2FC7 E4
1E05
1
2FC8 F4
2 3FC7
B-VGA
3FC1 D3
3
3FC2 E3
CDS4C12GTA
4 FFC3 18R
5
RES 6FC3
2FC3
1FC3
100p
3FC3 C6
12V
6
VGA 7
CONNECTOR 8 3FC4 D6
C 9
10
FFC4 C 3FC5 A6
11 FFC5
12
9FC5 H-SYNC-VGA 3FC6 B6
13
3FC7 C6
RES 6FC4
CDS4C12GTA
14
2FC4
1FC4
3FC3
12V
47p
4K7
15
17
16
6FC1 B5
FFC6
1216-00D-15S-1EF
6FC2 B5
FFC7 6FC3 C5
9FC6 V-SYNC-VGA
6FC4 C5
CDS4C12GTA
D D
RES 6FC5
6FC5 D5
2FC5
1FC5
3FC4
12V
47p
4K7
6FC6 E5
RES
9FC1 VGA-SDA-EDID-HDMI 6FC7 E5
3FC1 FFC8
9FC2 VGA-SDA-EDID 6FC8 F5
RES
CDS4C12GTA
10K
9FC1 D6
6FC6
2FC6
12V
47p
9FC2 E6
9FC3 E6
E RES
3FC2 FFC9
9FC3 VGA-SCL-EDID-HDMI
E 9FC4 E6
9FC4 VGA-SCL-EDID
9FC5 C6
CDS4C12GTA
10K RES
9FC6 D6
2FC7
6FC7
12V
47p
FFC1 A4
FFC2 B4
+5V-VGA
FFC3 C4
FFC4 C3
CDS4C12GTA
F
2FC8
1FC6
6FC8
F FFC5 C4
12V
47p
FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 158
3FD1
3FD2 RES
1K0
RES 3FD3 B3
2FD1
9FD1
9FD2
100n
1K0
3FD4 B2
LTST-C190KGKT
3FD6 C4
8
RES 7FD1
LM75BDP 3FD7 C4
6FD1
3FDG-1 D4
+VS
B 3FD3 IFD2
3
OS A0
7 IFD1
B 3FDG-2 D4
SDA-SSB 1 6 IFD3
SDA A1
SCL-SSB
3FD4 100R IFD4
2 5 IFD5
6FD1 B3
SCL A2
6FD2 D4
GND
100R
3FD6 RES
3FD7 RES
6FD3 D5
9FD5
1K0
1K0
4
7FD1 B3
9FD1 A4
9FD2 A4
C C 9FD5 C5
FFDA D5
1329 FFDB D5
1
2
FFDC D6
5 4
3 IFD1 B4
502382-0370 IFD2 B3
IFD3 B4
D FFDA 1328
D IFD4 B3
AMP1
AMP2
2
3
IFD5 B4
1
CDS4C12GTA
CDS4C12GTA FFDB
8
FFDC
2FDC
2FDD
1FD2
6FD2
1FD3
6FD3
1K0
1K0
12V
12V
1n0
1n0
MSJ-035-29D PPO (PHT)
3FDG-1 3FDG-2
1
E E
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 159
Tuner Brazil
Tuner Brazil
B01K B01K
1 2 3 4 5 6 7 8 9 10 11 12 13
1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
A A 2FF1 A7
5FE0 IF63 IF64 2FF2 B6
+2V5-BRA +1V2-BRA-VDDC 2FF3 B6
30R
2FF4 B6
2FE0
2FE3
2FE4
2FE5
2FF0
2FF1
100n
100n
100n
100n
1u0
1u0
2FF5 B6
+3V3-BRA-FLT
2FF6 B7
2FF7 C6
AGND
5FE3 IF65 IF66 5FE4
2FF8 C6
+3V3-BRA-FLT
+3V3-BRA 2FF9 C7
30R 30R 2FG0 C6
B B
2FE6
2FF2
2FF3
2FF4
2FF5
2FF6
100n
100n
100n
100n
2FG1 C7
1u0
1u0
2FG2 D1
2FG3 D2
AGND 2FG4 D3
5FE5 IF67 IF68
+1V2-BRA-DR1 2FG6 D3
30R 5FE7 IF48 2FG7 E3
+3V3 +3V3-BRA
2FG8 E3
2FE8
2FF7
2FF8
2FF9
100n
100n
1u0
1u0
30R
2FG9 E3
2FH2 D11
C IF69 5FE8
+2V5-BRA
C 2FH3 D12
7FE3
2FH4 D12
30R
1FE0 LD3985M25 2FH5 D6
2FG0
2FG1
100n
1 3
1u0
5FE9
1 5
FF03 2FH6 E3
25M4 +5V IN OUT +2V5-BRA
30R
2FH7 E3
2FG2
4 2
2FG3
3 4
18p
18p
INH BP 2FH8 F7
COM 3FE5 E7
7FE0 3FE6 F3
32
22
20
16
36
56
63
13
35
49
64
34
DR1VDD 48
43
2FH2
2FH3
2FH4
TC90517FG
1u0
10n
1u0
2
AGND AGND AGND 3FE7 F3
AD_DVDD
AD_AVDD
PLLVDD
DR2VDD
19
VDDC Φ VDDS
21
2FH5
I FIL 3FE8 F3
D 18
O
X
PBVAL
58
1n5
AGND
3FG6-4 4 5 33R TS-FE-VALID
D 3FE9 F3
DFE6 3FG2-1 F6
3 53 4 9F27-4 5 TS-DVBS-VALID
2
0
XSEL
RERR 3FG2-2 F7
1 DFE7
RLOCK
54 3FG4-1 F7
IF+ 2FG4 10n IF17 30
2FG6 10n IF18 29
P
ADI_AI 55
DFE8
2 9F27-2 7
3FG4-2 F6
IF- N RSEORF TS-DVBS-SOP
3FG6-2 E7
2FG7 100n 28 59 3FG6-3 3 6 33R
2FG8 100n BFE2 27
P
ADQ_AI
SBYTE TS-FE-SOP 3FG6-3 E7
N DFE9
52 9F28 TS-DVBS-CLOCK 5FG0
3FG6-4 D7
AGND BFE3 SLOCK
2FG9 100n 24 3FG7 E7
P
2FH6 100n 25 AD_VREF 61 3FG7 33R TS-FE-CLOCK
N SRCK 30R 5FE0 A3
E AGND
2FH7 100n 26
AD_VREF SRDT
60 3FG6-2 2 7 33R TS-FE-DATA 5FG2
E 5FE3 B3
39 38
DFF1
1 9F27-1 8 TS-DVBS-DATA
5FE4 B7
AGND DTCLK STSFLG1 30R
IF27 3FE5 IF28 AGND 5FE5 B3
40 9 IF-AGC
+3V3-BRA-FLT DTMB AGCCNTI 5FE7 C11
18K
5FE8 C7
2FH8
8 10
10n
S_INFO AGCCNTR
3FE6 10K 1 51
DFF2 5FE9 C11
0 STSFLG0 5FG0 E11
41 TSMD
1
42 5FG2 E11
SYRSTN
3FE7 10K IF29 7
AGCI
6 3FG2-1 RESET-SYSTEMn 7FE0 D4
0
F 11
CKI
SLADRS
1
5
3FG4-2
10K 3FG2-2
10K F 7FE3 C11
9F27-1 E8
AD_DVSS
AD_AVSS
31
17
4
15
33
37
44
47
50
57
62
BFE2 E4
BFE3 E4
DFE6 D6
AGND AGND DFE7 D6
DFE8 D6
G G DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
IF48 C12
H H IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6
1 2 3 4 5 6 7 8 9 10 11 12 13
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 160
Common Interface
B01A B01A
1 2 3 4 5 6 7 8 9 10 11
1P00-A D10
1P00-B G10
+3V3
3F06
2F00 A6
CA-RST 100K
+5V
3F01
+5VCA TRANSPORT STREAM FROM CAM
2F00
RES 2F01 A2
4 3F07-4 5
+T 0R4 7F00 100n CA-CD1n
2F02 B6
20
74LVC245A 10K
22u 16V
2 3F07-2 7
2F01
1
3EN1 CA-CD2n
10K
2F03 D6
3EN2 3F07-3
2F04 E6
RES
19 CA-DATAENn 3 6
A 3F02 IF01
G3
3F07-1
10K
+3V3
A
CA-MOCLK 2
1
18 MOCLK CA-DATADIR 1 8 2F05 G6
100R IF02 2 10K
3F03-1
CA-MOVAL 1 8 3 17 MOVAL 2F06 H6
CA-MOSTRT 3F03-2 2 7 100R 4 16 MOSTRT CA-ADDENn 1 3F08-1 8
100R IF03 5 15 10K 3F01 A2
6 14 MOCLK 2 3F08-2 7
7 13 10K 3F02 A4
8 12 MOVAL 3 3F08-3 6
9 11 10K 3F03-1 A4
MOSTRT 4 3F08-4 5
3F03-2 A4
10
10K
7F01
RES
MDO2
10K
3 3F09-3 6
3F04-3 C4
100n
20
74LVC245A
1 4 3F09-4
10K
5 IF04
3F04-4 C4
3EN1 MDO3
3EN2 10K 3F05-1 C4
19
G3
IF05 MDO4 1
3F10-1
8 3F05-2 C4
CA-MDO0 3F04-1 1 8 100R 2 18 MDO0 10K
IF06 2
1
MDO5 2
3F10-2
7 3F05-3 C4
CA-MDO1 3F04-2 2 7 100R 3 17 MDO1 10K
CA-MDO2 3F04-3 3 6 100R 4 16 MDO2 MDO6 3 3F10-3 6 3F05-4 C4
CA-MDO3 3F04-4 4 5 100R 5 15 MDO3 10K
C CA-MDO4 3F05-1 1 8 100R 6 14 MDO4 MDO7 4 3F10-4 5 C 3F06 A9
3F05-2 2 7 100R 7 13
CA-MDO5
CA-MDO6 3F05-3 3 6 100R 8 12
MDO5
MDO6
10K
3F07-1 A9
CA-MDO7 3F05-4 4 5 100R 9 11 MDO7
CA-RDY
3F12 3F07-2 A9
IF07 +3V3
3F07-3 A9
10
10K
CA-WAITn 2 3F11-2 7
+3V3
10K
3 3F11-3 6 IF08
3F07-4 A9
CA-INPACKn +5VCA
2F03 10K 3F08-1 A9
15-BIT ADDRESS RES CA-WP 4 3F11-4 5
7F02 100n 10K 3F08-2 A9
8 3F11-1 1
20
74LVC245A CA-VS1n ROW_A
1 10K
+3V3
1P00-A 3F08-3 B9
D 3EN1
3EN2
19
GND1
D3
1 D 3F08-4 B9
G3 CA-ADDENn CA-D03 2
CA-D04 D4
XIO-A00 18
1
2 CA-A00 CA-D05 D5
3
4
3F09-1 B9
D6
XIO-A01 17
2
3 CA-A01
CA-D06
CA-D07 D7
5 3F09-2 B9
6
XIO-A02
XIO-A03
16
15
4
5
CA-A02
CA-A03
CA-CE1n
CA-A10
CE1
A10
7 3F09-3 B9
8
XIO-A04
XIO-A05
14
13
6
7
CA-A04
CA-A05
CA-OEn
CA-A11
OE
A11
9 3F09-4 B9
10
XIO-A06 12
11
8
9
CA-A06 CA-A09 A9
A8
11 3F10-1 C9
XIO-A07 CA-A07 CA-A08 12
CA-A13 A13
13 3F10-2 C9
10
CA-A14 A14
E CA-WEn WE|P
RDY|BSY
14
15 E 3F10-3 C9
CA-RDY
+3V3 +5VCA VCC1
16
17
3F10-4 C9
VPP1
2F04
RES CA-MIVAL A16
18
19
3F11-1 D9
7F03 CA-MICLK A15
100n 20 3F11-2 C9
20
10074595-050MLF
7F05 I5
+3V3 ROW_B
1P00-B
IF01 A4
2F05
8-BIT DATA
7F04 100n
RES
CA-CD1n
GND3
CD1
35 IF02 A5
G 36
G
20
74LVC245A
1
MDO3 D11
D12
37 IF03 A4
3EN1 CA-DATADIR MDO4 38
3EN2
19
MDO5 D13
D14
39 IF04 B9
G3 CA-DATAENn MDO6 40
MDO7 D15
41 IF05 C4
XIO-D00 18 2 CA-D00 CA-CE2n CE2
1
2 CA-VS1n VS1
42
43
IF06 C5
XIO-D01 17 3 CA-D01 CA-IORDn IORD
XIO-D02 16 4 CA-D02 CA-IOWRn IOWR
44
45
IF07 C5
XIO-D03 15 5 CA-D03 CA-MISTRT A17
XIO-D04 14 6 CA-D04 CA-MDI0 A18
46
47
IF08 D9
XIO-D05 13 7 CA-D05 CA-MDI1 A19
48
XIO-D06 12 8 CA-D06 CA-MDI2 A20
49
XIO-D07 11 9 CA-D07 CA-MDI3 A21
H +5VCA VCC2
50
51 H
10
VPP2
52
CA-MDI4 A22
53
CA-MDI5 A23
54
+3V3 CA-MDI6 A24
55
CA-MDI7 A25
2F06 56
CONTROL RES MOCLK VS2
57
7F05 CA-RST RESET
100n 58
20
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 161
Flash
Flash
B01B B01B
1 2 3 4
+3V3
A A
2F20
2F21
100n
100n
7F20
12
37
NAND04GW3B2DN6F
B Φ VCC
1
2 B
[FLASH] 3
4G × 16 4
5
XIO-D00 3F20-1 1 8 100R 29 6
0
XIO-D01 3F20-2 2 7 100R 30 10
1
XIO-D02 3F20-3 3 6 100R 31 11
2
XIO-D03 3F20-4 4 5 100R 32 14
3
XIO-D04 3F21-1 1 8 100R 41 IO 15
4
XIO-D05 3F21-2 2 7 100R 42 20
5
XIO-D06 3F21-3 3 6 100R 43 21
6
XIO-D07 3F21-4 4 5 100R 44 22
7
NC 23
24
C NAND-CE1n
IF21
25
26
C
NAND-CLE 3F22-2 2 7 100R 16 27
CLE
NAND-ALE 3F22-3 3 6 100R 17 28
ALE
+3V3 3F23 10K 9 33
CE
XIO-OEn 3F22-1 1 8 100R 8 34
RE
XIO-WEn 3F22-4 4 5 100R 18 35
WE
NAND-WPn IF22 19 38
WP
+3V3 3F24 7 39
R
40
2K2 B
NAND-RDY1n 45
IF23 46
47
48
10K
D 3F19 VSS
D
13
36
+3V3
1 2 3 4
2F20 A3 3F20-1 B1 3F20-4 C2 3F21-3 C1 3F22-2 C1 3F23 C2 IF21 C3
2F21 A3 3F20-2 B2 3F21-1 C1 3F21-4 C2 3F22-3 C2 3F24 D2 IF22 D3 3 2010-03-12
3F19 D2 3F20-3 B 1 3F21-2 C2 3F22-1 C2 3F22-4 C2 7F20 B3 IF23 D3 TUNER, HDMI & CI
8204 000 9081
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div. table
Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 162
USB Hub
USB Hub
B01C B01C
1 2 3 4 5 6 7 8 9
1F24 E9
1F25 B1
1P07 B9
1P08 D9
2F25 A2
IF44 +5V 2F26 A2
+3V3 2F27 A2
2F28 A4
+T 0R4
3F25
2F25
100n
2F29 A4
FF40
+5V-USB1
2F30 A4
3F26-1
A 1
100K
A 2F31 A5
2F32 A5
IF43
USB-OC1n 2
3F26-2
7 2F33 A5
100K 2F34 B1
3F26-3 2F35 B2
2F26
2F27
2F28
2F29
2F30
2F31
2F32
2F33
100n
100n
100n
100n
100n
100n
3 6
1u0
1u0
3F25 A8
100K
3F26-1 A8
3F26-4
4 5 3F26-2 A8
100K 3F26-3 A8
1M0
14
34
36
23
15
10
29
USB2513B-AEZG 3F28 B2
5
1F25
B 1 3 CR PLL
FILT
VDD_3V3 USB-DP 9F25 USB-DP2
B 3F30 C2
24M Φ USB-DM 9F26 USB-DM2 3F31-2 C2
4
2
USB HUB
2F34
2F35
10K
3F31-3 C2
10p
10p
IF33 IF35
3F35 33 13
XTALIN|CLKIN OSC1 USB-OC1n SIDE USB BOTTOM 3F31-4 D2
9F20
9F21
2 USB-DP1
IF34 USBDP_DN1|PRT_DIS_P1
32
XTALOUT USBDM_DN1|PRT_DIS_M1
1 USB-DM1 1P07 3F32 C8
IF30 12 +5V-USB1 3F34-1 C8
BC_EN1|PWRTPWR1 1
RESET-USBn 26 IF36 USB-DM1 FF34
RESET
17 USB-OC2n USB-DP1 FF35
2 3F34-2 C8
OSC2 3
11 4 USB-DP2 3F34-3 D8
TEST USBDP_DN2|PRT_DIS_P2 +5V 4
3 USB-DM2 5 6 3F34-4 D8
3F31-2 IF42 USBDM_DN2|PRT_DIS_M2
2 7 28 16
SUSP_IND|LOCAL_PWR|NON_REM0BC_EN2|PWRTPWR2
292303-4
3F35 B1
10K IF37
3F36 D6
C USB-DP IF31
IF32
31
DP OSC3
19 USB-OC3n
C
+T 0R4
USB-DM 30 USBUP 7 USB-DP3 7F25 B2
3F32
DM USBDP_DN3|PRT_DIS_P3
+3V3 27 6 USB-DM3
VBUS_DET USBDM_DN3|PRT_DIS_M3
18
9F20 B7
3F30 IF41 BC_EN3|PWRTPWR3 3F34-1 FF33
35 1 +5V-USB2 9F21 B7
RBIAS
12K IF40 8 100K 9F25 B8
3F31-3
3 6 22 9
24
SDA|SMBDATA|NON_REM1
NC 20 2
3F34-2
7
9F26 B8
10K IF39 SCL|SMBCLK|CFG_SEL0 USB-OC2n
3F31-4 FF30 E8
4 5 25 21 100K
HS_IND|CFG_SEL1
10K 3F34-3 FF31 E9
3 6
GND_HS
VIA FF32 E9
3F36 100K
FF33 C9
37
38
39
40
41
+3V3 USB-OC3n
3F34-4
10K 4 5 FF34 C7
D 100K SIDE USB TOP D FF35 C7
1P08 FF36 D7
+5V-USB2 1 FF37 D7
USB-DM2 FF36
FF37
2 FF38 E9
USB-DP2 3 FF39 E8
4 IF45
FF32 5 6 FF40 A8
292303-4
IF30 C2
IF31 C1
IF32 C1
IF33 B2
IF34 B2
E FF39 +5V
FF38
1F24
1
E IF35 B5
USB-DM3 2 IF36 C5
USB-DP3 3 IF37 C5
FF30 4
FF31 5 IF39 D2
7 6 IF40 C2
502382-0570 IF41 C2
IF42 C2
IF43 A3
IF44 A3
IF45 D9
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 163
SD Card
SD Card
B01D B01D
1 2 3 4
A A
3F40 FF45
+3V3 +3V3-SD
+T 0R4
22u 16V
2F40
B B
+3V3
1P09-2
3F42-2 FF44
2 7 SDIO-CDn SDIO-CDn
D 47K
10
11 D
3F42-3 IF46 12
3 6 SDIO-WP SDIO-WP FF50
1939115-1
47K
1 2 3 4
1P09-1 C4 3F41-1 C1 3F42-1 C1 3F43-2 C3 3F44-3 C3 FF43 C3 FF47 C3 IF46 D1
1P09-2 D4 3F41-2 C1 3F42-2 D1 3F43-3 C3 3F45 C1 FF44 D3 FF48 C3 IF47 B1
2F40 A2 3F41-3 C1 3F42-3 D1 3F44-1 C3 FF41 C3 FF45 A2 FF49 C3 TUNER, HDMI & CI
3
2
2010-03-12
2010-02-01
3F40 A2 3F41-4 C1 3F43-1 C3 3F44-2 C3 FF42 C3 FF46 C4 FF50 D3 8204 000 9081
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 164
PNX85500 Control
PNX85500 Control
B01E B01E
1 2 3 4 5 6 7 8 9
1F51 F8
1F52 D8
2F52 B1
2F53 D6
2F58 D2
A A 3F51 B1
+3V3-STANDBY +3V3-STANDBY
3F52 B3
3F53 C6
+3V3-STANDBY
+3V3 +3V3 +3V3
3F54 D7
3F51
100n
2F52
RES
10K
3F58 E1
3F59 E3
3F60 E3
RES
10K
3F66
3F52
10K
3F62 D5
8
7F52
B M25P05-AVMN6 B
RES
10K
BACKLIGHT-BOOST
VCC IF50
3F67 3F63 E5
PNX-SPI-SDI IF51 2
Q Φ D
5 PNX-SPI-SDO 7F53 RES
PDTA114EU +5V 3F64 F5
512K IF52
FLASH C
6 PNX-SPI-CLK 3F65 F5
IF53
3F66 B7
RES
1 PNX-SPI-CSBn
S
3
IF54
IF55 3F67 B6
3F68
47K
W PNX-SPI-WPn BOOST-PWM
7
7F54-1 RES
BC847BPN(COL) 6
3F68 C7
HOLD +3V3-STANDBY
FF29 IF61 7F54-2 RES IF56
3F69 D7
VSS SPI-PROG BC847BPN(COL)
4 2 7F52 B2
C IF57
1 C 7F53 B7
4
IF62 5
FF04
SDM
3
7F54-1 C7
7F54-2 C7
3F53
9CH0 FF58 7F58 D1
RES
10K 9CH0 C7
RES
RES
2F53
3F69
3F54
FF04 C4
RES
1K0
1u0
10K
FF29 C4
MAIN NVM
+3V3 FF55 E3
D DEBUG ONLY D FF56 E3
1F52
FF57 E2
IF58 2F58 RES FF61 3F62
SCL-SSB 100R
1 SCL FF58 C7
FF62
7F58
100n
SDA-SSB
2
3 SDA FF61 D4
3F63
8
4
FF63 100R 5 FF62 D7
Φ
FF63 E4
10K
3F58 (8K × 8) 7
WC
EEPROM 3F59 FF55 FF64 F7
IF59 1 6 SCL-UP-MIPS
2
0
1 ADR
SCL
100R FF56
FF65 F4
E 3
2 SDA
5
3F60
SDA-UP-MIPS E FF66 F4
100R
IF50 B3
4
FF57 IF51 B1
LEVEL IF52 B3
DEBUG / RS232 INTERFACE
IF53 B3
SHIFTED IF54 C3
1F51
FF65 3F64
TXD-UP 1 IF55 C6
100R FF64 FOR
RXD-UP
FF66 3F65 2
3
UP IF56 C7
F RESET-STBYn
SPI-PROG
100R
4 DEBUG F IF57 C7
5
7 6 IF58 D2
USE ONLY
IF59 E1
IF61 C4
IF62 C4
1 2 3 4 5 6 7 8 9
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 165
HDMI & CI
HDMI & CI
B01F B01F
1 2 3 4 5 6 7 8 9 10
IF10
IF11
A 1T01
TX31XX PNX-IF-P
A
2F71
9F00
9F01
9F02
9F03
FF71 +5V-TUN-PIN
15
TUNER 14
4MHZ_REF
10n
2F72
2F73
15p
1p0
I2C_ADR
I2C_SDA
IF_OUT1
IF_OUT2
RF_AGC
I2C_SCL
7F75
B+_TUN
B+_LNA
1
16 13
RF_IO
UPC3221GV-E1
TUN
NC
AF72
2F65
VCC
15p
IF75 2F74 IF73 2F75 IF76 3F79-1
1F75 2 INPUT1 OUTPUT1 7 IF74 1
10
11
12
2p2 RES
1 4
1
9
I O1 10n 10n 220R IF16
5F71
2F76
2F77
5F74
2F62
2F70
680n
820n
2 5
22p
10p
1p0
IGND O2 2F78 IF77
3 INPUT2 OUTPUT2 6 IF78
2F79 IF80 3F79-4
AF71 TUN-IF-N 3 4
GND IF81 10n
820R
5F76
330n
AF70 TUN-IF-P
GND1
GND2
FF74 FF76 220R
B TUN-P1 FF00
9F04 IF-AGC
X7251X
36M17
4 VAGC AGC CONTROL
10n AF73 3F82
B
RES
RES
2F80
2F82
15p
1p0
2F81
2F59
2F60
2F61
100n
4u7
5
FF75
4n7
4u7
PNX-IF-N
2F93
100n
IF82 3F77
TUN-P6 FF81 PNX-IF-AGC IF12 IF13
3F80 2F63
TUN-P7 FF82 4K7 IF79 IF-
FF01 220R 10n
5F66
2F66
680n
22p
IF-AGC IF72
+5V-TUN-PIN
+5V-TUN-PIN
9F05
9F06
IF+
C C
BA591
2F85
6F72
3F72
2F92
4K7
1K0
47n
10n
3F71 220R 10n
IF86 2F90
2F84 3F76 IF87 SCL-TUNER 10n
3K3
15p 47R 3 5F73 2 3F78
TUN-P6 TUN-IF-N
5F70
470n
2F86 3F75 IF88 4 1
SDA-TUNER TUN-IF-P
15p 47R ATB2012 2F91
TUN-P7
10n RES
D IF89
SELECT-SAW
IF90
7F70
D
PDTC114EU
2F94
RES
10n
9F71
E 5F72
+5V-TUN-PIN
E
+5V-TUN
30R RES
2F88
22u
1 2 3 4 5 6 7 8 9 10
1F75 B5 2F62 B10 2F70 B10 2F75 B8 2F80 B9 2F86 D1 2F93 C2 3F76 C2 3F80 C9 5F71 B9 6F72 C7 9F02 A8 9F71 E4 FF00 B2 FF76 B1 IF12 C9 IF72 C5 IF77 B6 IF82 C4 IF90 D7
1T01 A1 2F63 C9 2F71 A7 2F76 B9 2F81 B1 2F88 E5 2F94 D7 3F77 C4 3F81 C9 5F72 E4 7F70 D8 9F03 A8 AF70 B3 FF01 C4 FF81 C1 IF13 C9 IF73 B6 IF78 B8 IF86 C5
2F59 B1 2F64 C9 2F72 A9 2F77 B9 2F82 B9 2F90 C6 3F71 C7 3F78 C7 3F82 B10 5F73 C5 7F75 A6 9F04 B3 AF71 B3 FF71 A1 FF82 C2 IF14 C9 IF74 B 8 IF79 C5 IF87 C2
2F60 B1 2F65 B10 2F73 A9 2F78 B6 2F84 C1 2F91 D6 3F72 C7 3F79-1 B8 5F66 C10 5F74 B10 9F00 A6 9F05 C4 AF72 B9 FF74 B1 IF10 A5 IF15 C9 IF75 B6 IF80 B8 IF88 D2
2F61 B1 2F66 C10 2F74 B6 2F79 B8 2F85 C4 2F92 C7 3F75 D2 3F79-4 B8 5F70 D6 5F76 B10 9F01 A6 9F06 C4 AF73 B9 FF75 B2 IF11 A5 IF16 B10 IF76 B8 IF81 B6 IF89 D5
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 166
Toshiba Supply
Toshiba Supply
B01G B01G
1 2 3
2FA2 C1
2FA3 C2
2FA4 C3
5FA3 B2
5FA4 B3
7FA3 B2
FFA2 C2
FFAF B2
A A
+3V3 +1V2-BRA-DR1
+1V2-BRA-VDDC
B B
5FA3
5FA4
30R
30R
7FA3
LD1117DT12
FFAF
3 2
IN OUT
COM
2FA2
2FA3
2FA4
100n
100n
10u
1
FFA2
C C
D D
1 2 3 3 2010-03-12
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 167
HDMI
HDMI
B01H B01H
1 2 3 4
A A
B 4
5
DRX1+
B
6 DRX1-
7 DRX0+
8
9 DRX0-
1 3FBF-1 8
10 DRXC+
47K
11
12 DRXC-
13 PCEC-HDMI
14
FFB1 DRX-DDC-SCL DRX-DDC-SCL
15 3FBF-2
FFB2 DRX-DDC-SDA DRX-DDC-SDA 2 7 DIN-5V
16
17 47K
FFB3
C 18
19 FFB4
DIN-5V
DRX-HOTPLUG C
FFB5 21 20
23 22 FFB6
1 2 3 4 3 2010-03-12
1P05 B1 3FBF-1 C4 3FBF-2 C4 FFB1 C2 FFB2 C2 FFB3 C2 FFB4 C2 FFB5 C1 FFB6 C2 8204 000 9081
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 168
VGA
VGA
B01I B01I
1 2 3 4 5 6 7 8 9
1E05 B2
1FC1 B4
1FC2 B4
1FC3 C4
A A 1FC4 C4
1FC5 D4
FFC1 3FC5
R-VGA 1FC6 F4
CDS4C12GTA
18R
2FC1 B4
2FC1
1FC1
RES 6FC1
100p
12V
2FC2 B4
2FC3 C4
FFC2 3FC6 2FC4 C4
G-VGA
B B 2FC5 D4
CDS4C12GTA
18R
RES 6FC2
2FC6 E4
2FC2
1FC2
100p
12V
2FC7 E4
1E05
1
2FC8 F4
2
3
3FC7
B-VGA 3FC1 D3
CDS4C12GTA
4
5
FFC3 18R
3FC2 E3
RES 6FC3
2FC3
1FC3
100p
12V
VGA
6
7
3FC3 C6
CONNECTOR 8 3FC4 D6
C 9 FFC4 C
10
11 FFC5
3FC5 A6
9FC5 H-SYNC-VGA
12
13
3FC6 B6
3FC7 C6
RES 6FC4
CDS4C12GTA
14
2FC4
1FC4
3FC3
12V
47p
4K7
15 16
17 6FC1 B5
FFC6
1216-00D-15S-1EF 6FC2 B5
FFC7
9FC6 V-SYNC-VGA
6FC3 C5
6FC4 C5
CDS4C12GTA
D D
RES 6FC5
2FC5
1FC5
3FC4
6FC5 D5
12V
47p
4K7
6FC6 E5
RES
9FC1 VGA-SDA-EDID-HDMI 6FC7 E5
3FC1 FFC8
9FC2 VGA-SDA-EDID 6FC8 F5
RES
CDS4C12GTA
10K
9FC1 D6
6FC6
2FC6
12V
47p
9FC2 E6
9FC3 E6
E RES
3FC2 FFC9
9FC3 VGA-SCL-EDID-HDMI
E 9FC4 E6
9FC4 VGA-SCL-EDID
10K CDS4C12GTA
RES 9FC5 C6
9FC6 D6
2FC7
6FC7
12V
47p
FFC1 A4
FFC2 B4
+5V-VGA FFC3 C4
CDS4C12GTA
FFC4 C3
F
2FC8
1FC6
6FC8
F
12V
47p
FFC5 C4
FFC6 D2
FFC7 D4
FFC8 D4
FFC9 E4
1 2 3 4 5 6 7 8 9
3 2010-03-12
2 2010-02-01
TUNER, HDMI & CI
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 169
3FD1
3FD2 RES
1K0
RES 3FD4 B2
2FD1
9FD1
9FD2
100n
1K0
3FD6 C4
LTST-C190KGKT
3FD7 C4
3FDG-1 D4
8
RES 7FD1
LM75BDP
3FDG-2 D4
6FD1
+VS
B 3FD3 IFD2
3
OS A0
7 IFD1
B 6FD1 B3
SDA-SSB 1
SDA A1
6 IFD3
6FD2 D4
100R IFD4
SCL-SSB
3FD4
2
SCL A2
5 IFD5 6FD3 D5
GND
100R
7FD1 B3
3FD6 RES
3FD7 RES
9FD5
1K0
1K0
9FD1 A4
4
9FD2 A4
9FD5 C5
FFDA D5
C C FFDB D5
FFDC D6
IFD1 B4
1329
1
IFD2 B3
2 IFD3 B4
3
5 4 IFD4 B3
502382-0370 IFD5 B4
D FFDA 1328
D
AMP1 2
AMP2 3
1
CDS4C12GTA
CDS4C12GTA
FFDB
8
FFDC
2FDC
2FDD
1FD2
6FD2
1FD3
6FD3
1K0
1K0
12V
12V
1n0
1n0
MSJ-035-29D PPO (PHT)
3FDG-1 3FDG-2
1
E E
1 2 3 4 5 6 7 8 9
3 2010-03-12
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 170
Tuner Brazil
Tuner Brazil
B01K B01K
1 2 3 4 5 6 7 8 9 10 11 12 13
1FE0 C2
2FE0 A3
2FE3 A6
2FE4 A6
2FE5 A6
2FE6 B3
2FE8 C3
2FF0 A6
A A 2FF1 A7
5FE0 IF63 IF64 2FF2 B6
+2V5-BRA +1V2-BRA-VDDC 2FF3 B6
30R
2FF4 B6
2FE0
2FE3
2FE4
2FE5
2FF0
2FF1
100n
100n
100n
100n
1u0
1u0
2FF5 B6
+3V3-BRA-FLT
2FF6 B7
2FF7 C6
AGND
5FE3 IF65 IF66 5FE4
2FF8 C6
+3V3-BRA-FLT
+3V3-BRA 2FF9 C7
30R 30R 2FG0 C6
B B
2FE6
2FF2
2FF3
2FF4
2FF5
2FF6
100n
100n
100n
100n
2FG1 C7
1u0
1u0
2FG2 D1
2FG3 D2
AGND 2FG4 D3
5FE5 IF67 IF68
+1V2-BRA-DR1 2FG6 D3
30R 5FE7 IF48 2FG7 E3
+3V3 +3V3-BRA
2FG8 E3
2FE8
2FF7
2FF8
2FF9
100n
100n
1u0
1u0
30R
2FG9 E3
2FH2 D11
C IF69 5FE8
+2V5-BRA
C 2FH3 D12
7FE3
2FH4 D12
30R
1FE0 LD3985M25 2FH5 D6
2FG0
2FG1
100n
1 3
1u0
5FE9
1 5
FF03 2FH6 E3
25M4 +5V IN OUT +2V5-BRA
30R
2FH7 E3
2FG2
4 2
2FG3
3 4
18p
18p
INH BP 2FH8 F7
COM 3FE5 E7
7FE0 3FE6 F3
32
22
20
16
36
56
63
13
35
49
64
34
DR1VDD 48
43
2FH2
2FH3
2FH4
TC90517FG
1u0
10n
1u0
2
AGND AGND AGND 3FE7 F3
AD_DVDD
AD_AVDD
PLLVDD
DR2VDD
19
VDDC Φ VDDS
21
2FH5
I FIL 3FE8 F3
D 18
O
X
PBVAL
58
1n5
AGND
3FG6-4 4 5 33R TS-FE-VALID
D 3FE9 F3
DFE6 3FG2-1 F6
3 53 4 9F27-4 5 TS-DVBS-VALID
2
0
XSEL
RERR 3FG2-2 F7
1 DFE7
RLOCK
54 3FG4-1 F7
IF+ 2FG4 10n IF17 30
2FG6 10n IF18 29
P
ADI_AI 55
DFE8
2 9F27-2 7
3FG4-2 F6
IF- N RSEORF TS-DVBS-SOP
3FG6-2 E7
2FG7 100n 28 59 3FG6-3 3 6 33R
2FG8 100n BFE2 27
P
ADQ_AI
SBYTE TS-FE-SOP 3FG6-3 E7
N DFE9
52 9F28 TS-DVBS-CLOCK 5FG0
3FG6-4 D7
AGND BFE3 SLOCK
2FG9 100n 24
P 3FG7 E7
2FH6 100n 25 AD_VREF 61 3FG7 33R TS-FE-CLOCK
N SRCK 30R 5FE0 A3
E AGND
2FH7 100n 26
AD_VREF SRDT
60 3FG6-2 2 7 33R TS-FE-DATA 5FG2
E 5FE3 B3
39 38
DFF1
1 9F27-1 8 TS-DVBS-DATA
5FE4 B7
AGND DTCLK STSFLG1 30R
IF27 3FE5 IF28 AGND
5FE5 B3
40 9 IF-AGC
+3V3-BRA-FLT DTMB AGCCNTI 5FE7 C11
18K
5FE8 C7
2FH8
8 10
10n
S_INFO AGCCNTR
3FE6 10K 1 51
DFF2 5FE9 C11
0 STSFLG0 5FG0 E11
41 TSMD
1
42 5FG2 E11
SYRSTN
3FE7 10K IF29 7
AGCI
6 3FG2-1 RESET-SYSTEMn 7FE0 D4
0
F 11
CKI
SLADRS
1
5
3FG4-2
10K 3FG2-2
10K F 7FE3 C11
9F27-1 E8
AD_DVSS
AD_AVSS
31
17
4
15
33
37
44
47
50
57
62
BFE2 E4
BFE3 E4
DFE6 D6
AGND AGND DFE7 D6
DFE8 D6
G G DFE9 E6
DFF1 E6
DFF2 F6
FF03 C12
IF17 D4
IF18 D4
IF27 E7
IF28 E7
IF29 F4
IF48 C12
H H IF49 F4
IF63 A4
IF64 A5
IF65 B4
IF66 B5
IF67 B4
IF68 B5
IF69 C6
1 2 3 4 5 6 7 8 9 10 11 12 13
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 171
D D
7S00-11
PNX85500
H H
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 172
PNX SDRAM
PNX SDRAM
B02B B02B
1 2 3 4 5 6 7 8 9 10 11
2S12 D4
2S17 E7
2S20 E7
2S24 E7
2S25 E7
A A 3S06 D3
3S07 D3
3S0V F8
3S20 D2
3S22 D2
B B 3S30 C7
7S00-8
DDR2-BA0
PNX85500
H1 MEMORY J1 DDR2-A0
3S33 C8
0 0
DDR2-BA1
DDR2-BA2
H2
G1
1 BA
2
1
2
J3
K1
G4
DDR2-A1
DDR2-A2 3S6P E10
3 DDR2-A3
DDR2-DQM0
DDR2-DQM1
D1
D5
0
1
M0 4
5
L3
G3
DDR2-A4
DDR2-A5
3S6Q E10
DDR2-DQM2 R3 DM L2 DDR2-A6
DDR2-DQM3 T5
2
3
6
7
H5
L1
DDR2-A7
DDR2-A8
7S00-8 B6
A 8
C FS01 D3
DDR2-D0 F3 J5 DDR2-A9
0 9
C +1V8
DDR2-D1
DDR2-D3
C2
F2
1
2
10
11
J2
M3
DDR2-A10
DDR2-A11
DDR2-D2
DDR2-D6
C3
B4
3
4
12
13
J4
M2
DDR2-A12
DDR2-A13
FS02 D2
DDR2-D5 F1 K5 DDR2-A14
DDR2-D4
DDR2-D7
C1
E1
5
6
7
14
N
N5 3S30 DDR2-CLK_N
IS42 E8
100u 2.0V
180R 1%
DDR2-D8 8 P 10R
3S20
3S06
2S12
DDR2-D9 B2 10R
9
DDR2-D10 E5 E2 DDR2-DQS0_N
10 N
DDR2-D11 C5 DQS0 E3 DDR2-DQS0_P
FS02 11 P
DDR2-D12 A4
DDR2-VREF-CTRL3 FS01 12
DDR2-D13 G5 D3 DDR2-DQS1_N
DDR2-VREF-CTRL2 13 N
B3 DQS1 D4 DDR2-DQS1_P
180R 1%
DDR2-D14 14 P
3S22
D DDR2-D15 F5
U3
15
DQ R1 D
180R 1%
DDR2-D16 16 N DDR2-DQS2_N
3S07
IS42
2S20
2S17
1%
2S24
2S25
100p
100n
100n
100p
3S0V
261R
F F
1 2 3 4 5 6 7 8 9 10 11
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 173
2S2E F5
3S0W E5
A A 7S00-6 D6
IS01 E6
IS10 E7
B B
C C
D D
7S00-6
PNX85500
HDMIA-RX1+ U25
P
HDMIA-RX1- U26 RX1_A Y26 DDCA-SCL
N SCL
DDC_A Y25 DDCA-SDA
SDA
HDMIA-RX0+ V25 IS10
P
HDMIA-RX0- V26 RX2_A T24
N HOT_PLUG_A
E HDMIA-RXC+ W25
P
E
HDMIA-RXC- W26 RXC_A
N
+3V3 IS01
3S0W W24
RREF
12K
2S2E
10u
RES
F F
G G
H H
I I
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 174
PNX Audio
PNX Audio
B02D B02D
2S2G C12 IS1G G7
1 2 3 4 5 6 7 8 9 10 11 12 13 14 2S2H D12 IS1K H9
2S2J G12 IS1L F5
2S2K F12 IS1N C7
2S2L D4 IS1S D7
2S2R B7 IS44 H9
2S2S B9
2S2T B8
2S2V B3
A A 2S2W B3
2S2Y C3
2S2Z B3
3S0Z 2S30 C3
3S53-1 +2V5-AUDIO +24V-AUDIO-POWER 2S31 C3
4R7 +24V-AUDIO-VDD
100R
2S32 D3
+3V3
3S53-2
2S33 C3
2S3J
220n
7S08 2S34 B9
100R LD3985M25
1 3S16-1 8 2S36 C6
1 2S2W FS03
3S12-1 8 10K 3S53-3 FS08 5 1 2S38 E9
AUDIO-IN1-L OUT IN
22K 100R IS12 4 2S39 E9
1u0 IS13 3S14
RES
4 3 ADAC(1) 12 7S05-4 2S3A E8
2 BP INH
B 3S53-4 +2V5 LM324 14 3S38
B
2S2R
2S2S
3S16-2 7
10u
2 3S12-2 2S2V 22K +AUDIO-L 2S3B E8
AUDIO-IN1-R 7 10K COM IS02 13
10u
100R 100R 2S3C E8
2S2T
100n
22K 1u0 11 2S3D E8
2S34
100n
2
3S16-3 3 6
3S12-3 6 2S3E E3
3 2S2Z
AUDIO-IN2-L 10K 2S3F E2
22K 1u0 10K 2S3G E3
2 3S36-2 7
3S16-4 5 8 3S36-1 1
2S3H E3
IS0V 4 2S2Y 10K
4 3S12-4
100u 4V
2S3J B11
3S51
2S42
2S41
10K
4R7
5
1u0
AUDIO-IN2-R 2S2G
22K
2S3K G6
1u0
47p 2S3L H8
3S13-4 IS0R 4 3S17-4 5 7S00-2 2S3M H9
2S31
AUDIO-IN3-L 10K PNX85500 +24V-AUDIO-VDD
2S3Q G5
C 4
22K
5
3
1u0
AE10 AUDIO AC7
2S36
1
3S3G-1
8 ADAC(1)
C 2S41 C6
L P
3S13-3 3S17-3 6 AF10 AIN1 ADACL AB7 IS1N 33R 3S3G-3 4
2S42 C6
2S30 R N 1u0 IS03
AUDIO-IN3-R 3 6 10K 3 6 ADAC(2) ADAC(2) 10 7S05-3 3S0Z A11
AD10 AC6 LM324 8 3S39
22K 1u0 L P 33R -AUDIO-R 3S10 D4
AC10 AIN2 ADACR AB6 9
3S17-1 R N 100R 3S11 F5
1 8
3S13-1 2S33 11 3S12-1 B2
AUDIO-IN4-L 10K AE9 AD7
L 1 3S3G-2
1 22K 8 AF9 AIN3 AE7 2 7 ADAC(3) 3S12-2 B2
1u0 R 2
AF7 3S12-3 B2
2 3 33R
3S17-2 7 AD9 ADAC AD6 4 3S3G-4 5 ADAC(4) 3S12-4 C2
2S32 L 4
AUDIO-IN4-R 2 3S13-2 10K AC9 AIN4 AE6 IS1S 33R
7 R 5
AF6
3S13-1 C2
22K 1u0 6 3S13-2 D2
AF8
L
D 3S10
AE8
R
AIN5
OSCLK
AD4
AD1
3 3S36-3 6
10K
5 3S36-4 4
D 3S13-3 C2
3S13-4 C2
I2S_OUT SCK 3S3H 10K
2S2L 100R AB9 AD2 ADAC(5) 3S14 B9
POS WS 2S2H
IS1B AB8 VR_AADC 33R
1u0 NEG
AE1
3S16-1 B3
IS19 1 3S3U 47p
AD8 AF2 ADAC(6)
3S16-2 B3
VREF_AADC 2
AE3 +24V-AUDIO-VDD 3S16-3 B3
IS1A I2S_OUT_SD 3 33R
AC8 AF3 3S16-4 C3
VCOM_AADC 4
3S3F 3S17-1 C3
AF5
SPDIF_OUT 3S17-2 D3
2S3D
2S3C
2S3B
2S3A
2S39
2S38
1n0
1n0
1n0
1n0
1n0
1n0
56R DBS8 3S17-3 C3
AE5 IS07 4
SPDIF_IN1
2S3G
2S3H
2S3E
3S17-4 C3
2S3F
100n
100n
3 7S05-1
10u
10u
ADAC(5)
LM324 1
9S06
AUDIO-OUT-L 3S18-1 G7
E 2 E 3S18-2 G8
11 3S18-3 G8
3S19 H5
3S25 H9
3S32 G12
3S34 G11
3S36-1 C12
3S37 3S6L 3S36-2 B11
10K 22K
3S36-3 D11
2S2K 3S36-4 D12
3S37 F11
+3V3 47p 3S38 B13
F +3V3-ARC F 3S39 C13
+24V-AUDIO-VDD 3S3F E4
3S11
3S3G-1 C7
IS1L 3S3G-2 D8
1R0 3S3G-3 C8
3S3G-4 D7
4
2S3Q
3S3H D7
100n
ADAC(6) 5 7S05-2
LM324 7
IS06 AUDIO-OUT-R 3S3U D8
6 3S51 C6
11 3S53-1 A6
7S09-1
3S53-2 B6
14
74LVC00APW
IS1D
G SPDIF-OUT-PNX SPDIF-OUT-PNX 1 &
3
2S3K
IS1G 1 3S18-1 8 SPDIF-OUT
G 3S53-3 B6
3S53-4 B6
2 220R 3S6L F12
100n 3S34 3S32
2 3S18-2 7
3 3S18-3 6
+3V3 3S6M H8
220R
220R
7
+3V3-ARC
10K
74LVC00APW 7S09-3
7S08 B8
14
4 & 74LVC00APW
6 9 & IS1K IS44 7S09-1 G6
IS1E 2S3L 180R 2S3M
SEL-HDMI-ARC 5 8 eHDMI+ 7S09-2 H6
H +3V3
10
100n 3S6M 100n H 7S09-3 H7
7
7S09-4 I7
7
9S06 E4
3S25
68R
DBS8 E4
FS03 B12
FS08 B7
+3V3-ARC IS02 B11
IS03 C11
7S09-4 IS06 G11
14
IS19 D3
IS1A D3
IS1B D4
IS1D G5
IS1E H5
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 175
PNX Mips
PNX Mips
B02E B02E
1F10 A12
1 2 3 4 5 6 7 8 9 10 11 12 13 14 2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
3S40 A1
3S45 A1
3S55 C3
3S56 A5
3S57 A6
+3V3 3S58 A5
A 7S00-3
PNX85500 A 3S5W B6
3S5Y B5
CONTROL C25 1 3S56 2 3S69 1F10 3S5Z B6
IS05 SDA SDA-UP-MIPS SDA-UP-MIPS
3S45 1 C26 100R 1 2 3S57 3S6A 4K7 4K7 FS44
+3V3 BOOTMODE SCL SCL-UP-MIPS SCL-UP-MIPS EJTAG-TRSTn-PNX85500 1 3S60 B5
100R EJTAG-TMS-PNX85500 FS49
10K 2 3S61 B6
BOOTMODE Y21 B26 1 3S58 2 SDA-SET SDA-SET 3S6B 4K7 EJTAG-TDO-PNX85500 FS50
3S40
GPIO1 GPIO1 Y22
GPIO_0
2
SDA
A25 100R 1 2 3S5W SCL-SET SCL-SET 3S6C 4K7 EJTAG-TCK-PNX85500 FS51
3 FOR FACTORY 3S62 B1
+3V3 GPIO_1 SCL 4
RXD1-MIPS Y23 100R EJTAG-TDI-PNX85500 FS52 USE ONLY 3S64 C1
10K GPIO_2 5
DS52 TXD1-MIPS Y24 B25 1 3S5Y 2 SDA-SSB SDA-SSB 3S6D 2K2 3S65 E11
3S82 RES GPIO_3 SDA 3S5Z 6
BOOST-PWM RXD2-MIPS W21 3 A24 100R 1 2 SCL-SSB SCL-SSB 3S6E 2K2 EJTAG-DETECTn FS53 3S66 E11
+3V3 GPIO_4 SCL 7
TXD2-MIPS W22 100R
10K GPIO_5 8 3S67 E11
3S80 FS10 TXD2-MIPS PNX-SPI-CS-AMBIn W23 B24 1 3S60 2 SDA-TUNER SDA-TUNER 3S6F 4K7 10 9
+3V3 GPIO_6 SDA 3S68 E11
3S81 10K FS11 RXD2-MIPS PNX-SPI-CS-BLn V22 4 A23 100R 1 2 3S61 SCL-TUNER SCL-TUNER 3S6G 4K7
+3V3 GPIO_7 SCL 3S69 A9
B +3V3
3S21
10K
PNX-SPI-CS-AMBIn
BOOST-PWM
SELECT-SAW
V23
U23
GPIO_10
GPIO_11 TRSTN
AA25
100R
EJTAG-TRSTn-PNX85500 EJTAG-TRSTn-PNX85500 3S6K B 3S6A A8
IS04 AA24 EJTAG-TMS-PNX85500 EJTAG-TMS-PNX85500 1 8 3S6H-1 10K +3V3 3S6B A9
10K TMS +3V3-STANDBY FS57 BM08B-SRSS-TBT
USB-DM R26 AA23 EJTAG-TCK-PNX85500 EJTAG-TCK-PNX85500 10K 3 6 3S6H-3
3S62 PNX-SPI-CS-BLn DN TCK 3S6C B8
+3V3 USB-DP R25 AB26 EJTAG-TDO-PNX85500 EJTAG-TDO-PNX85500 10K 2 7 3S6H-2
IS4Z R24 DP USB TDO
AB25 EJTAG-TDI-PNX85500 EJTAG-TDI-PNX85500 10K 4 5 3S6H-4 3S6D B9
10K RREF TDI
10K 3S6E B8
3S00
3S55
RESET_SYS
AE4 RESET-SYSTEMn 3S6F B9
5K6
3S64 FS64 33R 3S6G B8
SELECT-SAW AD5 BACKLIGHT-PWM
+3V3 BL_PWM 3S6H-1 B8
10K 3S6H-2 B9
AC5
CLK_54_OUT 3S6H-3 B9
3S26
3S27
3S6J
10K
10K
10K
3S6H-4 B9
C +3V3
3S83
RXD1-MIPS
C 3S6J C5
3S6K B9
10K 3S72 C6
3S84 +3V3 +3V3
TXD1-MIPS IS40 3S80 B1
+3V3 3S72
10K PXCLK54 3S81 B1
47R 3S82 B1
3S83 C1
3S84 C1
7S00-3 A4
7S00-4 G12
RES
7S01 E8
9S10 F8
D D 9S11 F8
+3V3 9S12 F8
9S13 F8
2S89 DS52 B2
FS10 B2
100n +3V3 FS11 B2
FS2W F9
3
7S01
PCA9540B 3S65 FS2Y F9
VDD SC0 5 SCL-DISP SCL-DISP 2 1 FS31 F8
3S66 4K7 FS44 A12
SC1 8 SCL-BL SCL-BL 2 1
FS49 A12
3S67 4K7
FS50 A12
E SCL-SET 1 SCL
INP
I 2 C
-BUS
SD0 4 SDA-DISP SDA-DISP 2
3S68
1
4K7 E FS51 B12
2 SDA FIL SD1 7 2 1
SDA-SET CTRL SDA-BL SDA-BL FS52 B12
4K7
FS53 B12
VSS
FS57 B12
FS64 C2
6
FS31 IS04 B2
IS05 A2
IS08 F8
IS09 F8
9S10 SCL-BL IS40 C6
IS08 IS4Z B4
F SCL-SET 9S11 FS2W SCL-DISP
F IS50 G12
9S12 FS2Y SDA-DISP
IS09
SDA-SET 9S13 SDA-BL
7S00-4
PNX85500
ETH-RXCLK AA3
RXCLK ETHERNET
G ETH-RXD(0)
ETH-RXD(1)
Y5
Y6
0
1 TXCLK
AA2 ETH-TXCLK
G
ETH-RXD(2) IS50 AB4 RXD ETH
2
ETH-RXD(3) AC1 AA1 ETH-TXD(0)
3 0
AA4 ETH-TXD(1)
1
ETH-RXDV AC2 TXD AB1 ETH-TXD(2)
RXDV 2
ETH-RXER Y4 AB2 ETH-TXD(3)
RXER 3
ETH AA5 ETH-TXEN
TXEN
SDIO-DAT3 W2 AB3 ETH-TXER
CC_DAT3 TXER
SDIO-CLK W1 AC3 ETH-COL
CLK COL
SDIO-CMD W6 Y2 ETH-CRS
CMD CRS
SDIO-DAT0 W5 Y3 ETH-MDC
0 MDC
SDIO-DAT1 W4 SDIO Y1 ETH-MDIO
1 DAT MDIO
SDIO-DAT2 W3
2
H SDIO-CDn
SDIO-WP
U6
V6
SDCD
SDWP
H
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 176
A A
B B
C 7S00-7
PNX85500 C
PX1A- A7 LVDS D7 PX3A-
N N
PX1A+ B7 A A E7 PX3A+
P P
PX1B- C8 E8 PX3B-
N N
PX1B+ B8 B B D8 PX3B+
P P
F F
G G
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 177
+1V1
POL
3S1B C2
3S1C C1
3S1D C2
IS3B
3S1E C1
3S1F C2
5S04
RES
30R
3S1G D2
2S10
100n
1u0
2S13 3S1H D1
2S37 3S1J D2
3S1K D1
1u0 3S1L E2
9S24
RES
3S1P D11
B 2S11 B 3S2A D2
100n 3S2F D7
IS20 DS50 2S4G 3S2G D7
3
3S2H D7
1 10p
AC17
3S2K D7
AA17
AF26
1S02
54M
7S00-9
PNX85500 2S4F 3S2L D10
VDDA_1V1_DCS
VDDA_ADC2V5
VDD_XTAL
3S2M E10
AE17
1
+3V3-STANDBY 2S4D XTAL_IN 10p +3V3-STANDBY 3S2S E10
3S1B 1n0 AD19
RC RC
3S1C RES 10K AE19
0
AF17
3S2V F11
TACHO TACHO 1 XTAL_OUT
10K 3S1D CEC-HDMI CEC-HDMI AF19 3S3L C2
2 P1
3S1E RES 27K BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP AA20 AA26 RESET-STBYn 3S3M C1
3 RESET_IN
C +3V3-STANDBY
10K 3S1F
10K
SDM SDM AB20
7
STANDBY EA
AB24 EA EA
IS3F 3S44 C 3S3N C2
3S3P C1
3S3L RES LCD-PWR-ONn LCD-PWR-ONn AC20
0 ALE IS3E 10K 3S43 3S3Q C2
3S3M 10K EJTAG-DETECTn EJTAG-DETECTn AD20 AB23 ALE
3S3N RES 1 ALE 3S3R D2
10K LAMP-ON LAMP-ON AE20 IS3D 10K
2 10K 3S42
3S3P 10K STANDBY STANDBY AF20 AC26 PSEN PSEN 3S3S D1
3 PSEN
10K 3S3Q RES FAN-CTRL1 FAN-CTRL1 AA21 P2 3S3T D1
RES 3S3S 4 3S2F 100R RES 3S6V
10K FAN-CTRL2 FAN-CTRL2 AB21 AC23 SDA-UP-MIPS SDA-UP-MIPS 3S3W E9
5 SDA
10K 3S3R POWER-OK POWER-OK AC21 MC AC24 3S2G 100R SCL-UP-MIPS SCL-UP-MIPS 4K7 3S6W
3S3T 10K RES AD21
6 SCL 3S3Y D9
ENABLE-3V3n ENABLE-3V3n 7 4K7 RES
10K AD26 3S2H 100R LED1
LED1 RES 3S1P 3S41 D12
+3V3-STANDBY 3S1G 0
RXD-UP RXD-UP AE21 PWM AC25 3S2K 100R LED2 LED2 10K 3S41 3S42 C11
0 1
3S1H 10K TXD-UP TXD-UP AF21 3S43 C11
1 10K
10K DETECT2 AA22 AE23 PNX-SPI-SDO 3S44 C11
3S2A RES 2 SDO
D 10K
DETECT2 AB22
AC22
3
4
P3
SPI
SDI
CLK
AF25
AF24
PNX-SPI-SDI
PNX-SPI-CLK
D 3S46 D10
AD22 AF23 PNX-SPI-CSBn
3S47 E10
5 CSB
3S49 E10
3S1K RES RES 3S2L
RESET-SYSTEMn RESET-SYSTEMn AD23 AB17 IS2V CTRL-DISP CTRL-DISP 3S6V C11
0 0 RES 3S46
AV2-BLK AE26 AA18 IS2Z RESET-DVBS RESET-DVBS 10K 3S6W D12
10K 1 1
AV1-BLK AE25 P5 AD18 RESET-USBn RESET-USBn RES 3S3Y 10K
3S1J KEYBOARD AE24
2 2
AE18 10K 3S47 +3V3-STANDBY 5S04 B6
KEYBOARD 3 3 RESET-ETHERNETn RESET-ETHERNETn RES
LIGHT-SENSOR P0 AF18 SEL-HDMI-ARC SEL-HDMI-ARC 3S2S 10K 7S00-9 B6
100K 2S4E 4
AV1-STATUS AF22 AA19 RESET-AVPIP RESET-AVPIP 10K RES 3S2M 7S20 G10
4 5
VSS_XTAL
AV2-STATUS AE22 P6 AB19 RESET-AUDIO RESET-AUDIO 3S3W 10K RES 9S0D G9
100n 5 6
AC19 AUDIO-MUTE-UP AUDIO-MUTE-UP 4K7 3S49 9S0E G9
7
AD17
3S1L
SPI-PROG SPI-PROG 4K7
9S24 B6
10K PNX-SPI-WPn
DS50 B8
E E FS0Z G11
FS45 G9
IS20 B6
IS2U G10
IS2V D7
IS2Z D7
IS3B A6
IS3D C10
IS3E C10
IS3F C10
F F
+3V3-STANDBY +3V3-STANDBY
1 3S2V 2
10K
9S0E
FS0Z
7S20 RESET-STBYn
NCP303LSN28
FS45 2
INP
1 IS2U 1
OUTP
5
CD
NC GND
G G
3
9S0D
2S4K
100n
RES
H H
1 2 3 4 5 6 7 8 9 10 11 12 13
6 2009-12-07
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 178
PNX Power
PNX Power
B02H B02H
1 2 3 4 5 6 7 8 9 10 11 12 13 14 2S21 F6 2S5K-4 C5
IS3Q 5S80 2S23 B6 2S5M G11
+1V1
30R 2S26 A6 2S5P F5
RES 10u
2S6A
2S5A
100n
2S27 B3 2S60 A6
2S28 B3 2S61 A6
1
5S81 2S29 C6 2S62 A7
A +2V5
A 2S43 B2 2S63 A7
2
30R
RES 10u
2S45 F11 2S64 A7
2S6B
2S5B
100n
2S46 F11 2S65 A7
2S4M B12 2S66 A7
1
+1V8
IS3S 5S82
2S26
2S60
2S61
2S62
2S63
2S64
2S65
2S66
2S67
2S68
100n
100n
100n
100n
100n
100n
100n
100n
100n
2S4N C11 2S67 A8
47u
+3V3
30R
2
2S4P C11
RES 10u
2S68 A8
2S5C
2S5D
100n
2S4Q B3 2S6A A11
2S4R B4 2S6B A11
SENSE+1V1 c001
7S00-10
5S93
2S4S F5 2S6C C11
G6
G7
R6
R7
U7
C6
D6
A5
A6
B5
B6
E6
F6
F7
L6
L7
+2V5
B PNX85500 30R
B 2S4T H11 2S6D B11
2S6E 2
220u 6.3V
VDD_1V8
2S4M
2S6D
100n
100n
AF1 V20
+1V1 2S4U D11 2S6E B11
7
AE2 HDMI_VDDA_1V1 V21
5
AD3
2S4V D11 2S6F C11
1
2S5G-1
2S5G-2
2S5G-3
2S5G-4
2S5H-1
2S5H-2
2S5H-3
2S5H-4
2S4Q
2S4R
2S43
2S28
2S27
2S23
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
AC4 VDD U20
22u
22u
47u
1
AB5
H20
HDMI_VDDA_2V5 U21 2S4W D11 2S6G C11
4
F11 U22 +2V5-LVDS 2S4Y D11 2S6H H11
2
HDMI_VDDA_3V3_TERM
G11
F13 N6 2S4Z E11 2S6K H11
2S4N
2S4P
100n
G13 VDD_2V5 N7
10u
F15 2S50 E11 2S6L I11
2S5J-3 6
2S5J-1 8
8
5
G15 C7
2S51 E9 2S6M I11
2S5K-1
2S5K-2
2S5K-3
2S5K-4
2S5J-2
2S5J-4
C C
100n
100n
100n
100n
100n
100n
100n
100n
100u 2.0V
F17 C9
G17 C11
2S29 F19 VDD_2V5_LVDS C14
5S85 2S52 E9 2S6N C11
1
4
+3V3
2
1 2S6G 2
G19 C16
2S53 H11 2S6P C12
1
30R
2S6N
2S6C
2S6P
2S6F
100n
100n
100n
100n
J9 C18
10u
J11 2S55 G11 2SHW I11
AA16
AA8
Y11
Y14
J13 W20
Y16
Y9
7S00-12
1
PNX85500 J15 P20 2S56 G11 5S80 A12
VSSA J17 M20
A1 M7 L9 VDD_3V3 K20
+3V3-STANDBY
2S57 G11 5S81 A12
A10 N2 L11 V7
2S58 H11 5S82 A12
2S4U
2S4V
100n
A12 N20 L13 Y8
10u
A15 P10 L15
A17 P12 L17
VDD_1V1
Y19 2S59 I11 5S83 D12
D A19
A26 VSS
P14
P16
N9
N11
VDD_3V3_SBY Y18
IS3K 5S83
D 2S5A A11 5S84 E12
A3
A8
P18
P4
N13
N15
VDDA_1V1_LVDS_PLL
B13
+1V1 2S5B A11 5S85 C12
IS3L 30R
2S4W
2S4Y
2S5C B11
100n
B1 P6 N17 AA15
5S87 F12
RES 1u0
B20 P7 R9 Y15
VDDA_1V2
C20 T10 R11 AA13 2S5D B11 5S88 G12
C4 T12 R13 5S95 +2V5
D2
VSS
VSS T14 R15
VDDA_2V5
Y12
5S84 2S5G-1 B4 5S89 H12
D20 T16 R17
30R 2S5G-2 B4 5S90 H12
6.3V
E13 T18 U9 AA9 +1V2
VDDA_2V5_AADC 30R
2S4Z
2S51
2S52
2S50
100n
100n
E20 T2 U11
10u
E4 T6 U13 AA7 c000 SENSE+1V2 2S5G-3 B4 5S92 I12
10u
VDDA_2V5_ADAC
F10 T7 U15
2S5G-4 B5 5S93 B12
E F12
F14
U4
V10
U17
J6
VDDA_2V5_DCS
Y17
E 2S5H-1 B5 5S94 F5
F16 V12 AA6 D13
VDDA_2V5_LVDS_BG
F18
F20
V14
V16
Y7
W7 T20 POL 2S5H-2 B5 5S95 E10
VSSA_1V1_LVDS_PLL
VSSA_2V5_LVDS_BG
VDDA_2V5_USB
F8 V18 F9 2S5H-3 B5 7S00-10 B6
G10 V2 G9 Y13 +2V5-AUDIO
VDDA_2V5_VADC
G12 Y20 2S5H-4 B5 7S00-12 C1
V24 HDMI_AGND
5S94
2S46
100n
J7 Y10
VSSA_USB
VSS +1V1
30R
VDD_1V1_DDR VDDA_2V5_VDAC
2S5J-1 C5 IS3K D10
2
G14
G16
G18
G2
G20
G8
H4
H6
H7
J20
K10
K12
K14
K16
K18
K2
K6
K7
L20
L4
M10
M12
M14
M16
M18
M6
R21
VDDA_3V3_USB 2S5J-2 C5 IS3L D10
2S4S
2S5P
2S21
100n
10u
1u0
RES
2S5J-3 C5 IS3Q A10
U24
A13
C13
R20
1
2S45
100n
IS58 I10
2S5K-2 C4 c000 E13
5S87 2S5K-3 C4 c001 B5
+2V5
30R
2S55
2S56
100n
1u0
G 5S88
+2V5-LVDS
G
30R
2S5M
2S57
100n
10u
5S89
+2V5
2
30R
2S6H
2S6K
100n
100n
2S58
10u
1
1
H 5S90
+2V5
H
30R
2S4T
2S53
100n
10u
2SHW
100n
I I
IS58 5S92
+3V3
2
30R
2S6M
2S6L
2S59
100n
100n
1u0
1
1
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 179
3S59
47R
Connectivity 22n
2S22 A11
3S5B
47R
A A 2S40 B11
AV1-R 2S7J 2S75 F11
22n 2S22 C-SVHS
2S76 F11
3S4J
2S77 F12
56R
22n
3S05
56R
2S78 G12
2S7E G6
EU: SCART1 CVBS-MON-OUT1 2S7H B6
AV1-B 2S7K
AP: - 2S7J A6
3S5E
560R
22n
2S7K B6
3S4L
56R
B B 2S7L C6
IS4V
2S7M C6
2S7N D6
560R
2S40
3S08
47p
2S7H
AV1-G 2S7P D6
22n 2S7Q E6
3S4K
56R
IS4W
2S7R F6
2S7U F6
3S09
8K2
C C 2S84 G6
2S7M
YPBPR1-SYNCIN1 2S85 H6
10n
2S7L
2S86 H6
AV3-Y
2S87 A6
22n
3S4P
2S8A A11
56R
2S8G E6
2S7N
AV3-PR 3S05 A11
EU: YPBPR1 22n
3S08 B11
3S4R
56R
D AP: YPBPR1
7S00-1
PNX85500 D 3S09 C11
2S7P ANALOG_VIDEO 3S4G G6
AV3-PB
22n
AB15
CVBS_Y1 ATV_CVBS_Y3 AC12 3S4J A6
2S19
2S18
2S16
2S15
2S14
3S4T
AC13 IS5C
56R
AF13
22n
22n
22n
22n
22n
R C3
AD13
AE13
B AV1
AD11
3S4K C6
G CVBS_Y7
C7
AC11 3S4L B6
AV2-CVBS 2S8G AF15
AE15
SYNCIN1
Y_G1 CVBS1_OUT
AF11
BS13
3S4P D6
22n AC15 AE11
PR_R_C1 CVBS2_OUT 3S4R D6
3S5L
AD15
47R
PB_B1
AB14
RESREF AB10
AA11 IS5E 3S5S
3S4T D6
E 2S7Q
AF14
CVBS_Y2
SYNCIN2
CURREF
10K E 3S4U F6
YPBPR2-SYNCIN2 AE14 AC16 IS5D
Y_G2 1
10n
AC14
PR_R_C2 2 AB16 IS5F
IS5G
3S4W F6
AD14 AB13
PB_B2 3
REF 4 AB12 IS5H 3S50 H6
AF16 AA12 IS5J
AD16
R
G VGA
5
6
AA10 3S75
PNX-IF-AGC 3S52 H6
AE16
B 47K 3S54 I6
2S75
2S7R AB18 BS15
10n
AV4-Y HSYNC_IN IF_AGC AD12
AC18 BS17
EU: 22n AF4
IN
VSYNC
RF_AGC AB11
3S59 A6
SCART2 OUT
3S4U
2S76
AGND
10n
AA14
AV4-PR 2S7U
3S5S E9
22n
3S5T-1 I5
3S4W
56R
2S77
PNX-IF-P 3S5T-2 I11
10n
3S5T-3 I5
2S7E
3S5T-4 I11
AV4-PB
22n 2S78
3S5V-1 I5
3S4G
56R
G 10n
PNX-IF-N
G 3S5V-2 I12
3S5V-3 I5
R-VGA
2S84 3S5V-4 I12
22n 3S75 E12
3S50
56R
3S76 F12
7S00-1 D8
G-VGA
2S85 9S14 I3
22n 9S15 I3
3S52
56R
H H 9S17 A13
BS09 F9
2S86
B-VGA BS10 F10
22n BS13 E9
3S54
56R
EU: VGA
BS15 F9
4 3S5T-4 5
2 3S5T-2 7
4 3S5V-4 5
2 3S5V-2 7
AP: VGA
100R
100R
100R
100R
H-SYNC-VGA 1 3S5T-1 8
BS17 F10
100R IS11 F13
V-SYNC-VGA 3 3S5T-3 6 IS4V B10
100R
IS4W C10
I VGA-SCL-EDID 3 3S5V-3 6
I IS5C D9
100R IS5D E9
VGA-SDA-EDID 1 3S5V-1 8 IS5E E9
100R
VGA-SCL-EDID-TCON 9S14
* IS5F E9
VGA-SDA-EDID-TCON 9S15
* *
= TCON ONLY IS5G E9
IS5H E9
IS5J E9
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 180
XIO-A00 J25
00
06
07
A22
E22
XIO-D06
XIO-D07 3S03 F6
XIO-A01 J26 XIO_D F24 XIO-D08
B XIO-A02
XIO-A03
H21
H22
01
02
08
09
F25
F26
XIO-D09
XIO-D10
B 3S04-1 F6
03 10
XIO-A04
XIO-A05
H23
H24
04
05
11
12
E23
E24
XIO-D11
3S04-2 F3
IS26 3S15
H25 E25
XIO-A06
XIO-A07 H26
06
07
13
14
E26
INPACK
XIO-D14
INPACK
10K
3S15 B9
XIO-A08 G21 XIO_A D24 XIO-D15
08 15
XIO-A09
XIO-A10
G22
G23
09
B22 XIO-OEn
3S1R F10
10 OE_
XIO-A11
XIO-A12
G24
G25
11
12
XIO
WE_
C22 XIO-WEn
3S1S F10
XIO-A13 G26 B21
XIO-A14
XIO-A15 IS25
F22
F23
13
14
CLK_BURST
E21 NAND-CE1n
3S1T G10
15 CE1_
C CE2_
NAND RDY2
D21
A20 C 3S1U G10
F21
RDY1
WP_
A21 9S08
NAND-RDY1n
NAND-WPn 3S23 G10
IS00
3S24 G10
3S28 G10
3S29 G10
7S00-11 E7
D D 7S00-5 A7
7S02 F2
9S00 F8
7S00-11
9S01 F4
PNX85500
9S08 C8
CA-MDI0 3S01-1 8 1 P21 VIDEO_STREAM N26 CA-MDO0
CA-MDI1 33R 7 3S01-2 2 P22
0
1
0
1
M21 CA-MDO1 IS00 C8
E CA-MDI2
CA-MDI3
3S01-3 6 3 33R
33R 5 3S02-4 4
P23
P24
2
3
2
3
M22
M23
CA-MDO2
CA-MDO3
E IS25 C6
CA-MDI4 7 3S02-2 2 33R P25 MDI MDO M24 CA-MDO4
4 4
33R 8 3S02-1 1
CA-MDI5
CA-MDI6 6 3 33R
P26
N21
5
6
5
6
M25
M26
CA-MDO5
CA-MDO6 IS26 B9
CA-MDI7 3S02-3 33R 5 3S01-4 4 N22 L21 CA-MDO7
7 7
33R
CA-ADDENn J22
ADD_EN
+3V3
CA-DATADIR K25 K23 CA-VS1n
DATA_DIR 1
VS K24 9S00 CA-MOCLK
2S09 2
*
CA-DATAENn K26 RES
DATA_EN
K21 CA-CD1n
100n 3S03 1
CA-MICLK N23 CD K22 CA-CD2n
I 2
F 7S02
74LVC1G08GW
10R
L25
MCLK
CA F
5
CA-MOCLK O
1 3S04 +3V3
4 9S01 N24
MISTRT
2 3S31
33R 3S1R
CA-MIVAL N25 TS-FE-DATA
MIVAL
3
H H 1X06
EMC HOLE
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 181
PNX SDRAM
PNX SDRAM
B02B B02B
1 2 3 4 5 6 7 8 9 10 11
2S12 D4
2S17 E7
2S20 E7
2S24 E7
2S25 E7
3S06 D3
A A 3S07 D3
3S0V F8
3S20 D2
3S22 D2
3S30 C7
3S33 C8
3S6P E10
B B 3S6Q E10
7S00-8
PNX85500
DDR2-BA0 H1 MEMORY J1 DDR2-A0
7S00-8 B6
0 0
DDR2-BA1
DDR2-BA2
H2
G1
1 BA 1
J3
K1
DDR2-A1
DDR2-A2
FS01 D3
2 2
DDR2-DQM0 D1 M0
3
G4
L3
DDR2-A3
DDR2-A4
FS02 D2
0 4
DDR2-DQM1
DDR2-DQM2
D5
R3
1
DM
5
G3
L2
DDR2-A5
DDR2-A6
IS42 E8
2 6
DDR2-DQM3 T5 H5 DDR2-A7
3 7
L1 DDR2-A8
A 8
DDR2-D0 F3 J5 DDR2-A9
0 9
C +1V8
DDR2-D1
DDR2-D3
C2
F2
1
2
10
11
J2
M3
DDR2-A10
DDR2-A11 C
DDR2-D2 C3 J4 DDR2-A12
3 12
DDR2-D6 B4 M2 DDR2-A13
4 13
DDR2-D5 F1 K5 DDR2-A14
5 14
DDR2-D4 C1
6
DDR2-D7 E1 N5 3S30 DDR2-CLK_N
7 N
100u 2.0V
180R 1%
DDR2-D8 8 P
3S20
3S06
2S12
DDR2-D9 B2 10R
9
DDR2-D10 E5 E2 DDR2-DQS0_N
10 N
DDR2-D11 C5 DQS0 E3 DDR2-DQS0_P
FS02 11 P
DDR2-D12 A4
DDR2-VREF-CTRL3 FS01 12
DDR2-D13 G5 D3 DDR2-DQS1_N
DDR2-VREF-CTRL2 13 N
B3 DQS1 D4 DDR2-DQS1_P
180R 1%
DDR2-D14 14 P
3S22
D DDR2-D15 F5
U3
15
DQ R1 DDR2-DQS2_N D
180R 1%
DDR2-D16 16 N
3S07
IS42
2S20
2S17
1%
2S24
2S25
100p
100n
100n
100p
3S0V
261R
F F
1 2 3 4 5 6 7 8 9 10 11
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 182
B B
C C
D D
7S00-6
PNX85500
HDMIA-RX1+ U25
P
HDMIA-RX1- U26 RX1_A Y26 DDCA-SCL
N SCL
DDC_A Y25 DDCA-SDA
SDA
HDMIA-RX0+ V25 IS10
P
HDMIA-RX0- V26 RX2_A T24
N HOT_PLUG_A
E HDMIA-RXC+ W25
P
E
HDMIA-RXC- W26 RXC_A
N
+3V3 IS01
3S0W W24
RREF
12K
2S2E
10u
RES
F F
G G
H H
I I
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 183
PNX Audio
PNX Audio
B02D B02D
1 2 3 4 5 6 7 8 9 10 11 12 13 14
2S2G C12 3S19 H5
2S2H D12 3S25 H9
2S2J G12 3S32 G12
A A 2S2K F12 3S34 G11
2S2L D4 3S36-1 C12
3S0Z
3S53-1 +2V5-AUDIO +24V-AUDIO-POWER 2S2R B7 3S36-2 B11
4R7 +24V-AUDIO-VDD
100R +3V3 2S2S B9 3S36-3 D11
3S53-2
2S3J
220n
100R
7S08
LD3985M25 2S2T B8 3S36-4 D12
1 1 3S16-1 8
AUDIO-IN1-L
3S12-1 8 10K
2S2W 3S53-3 FS08 5
OUT IN
1
FS03
2S2V B3 3S37 F11
22K 100R IS12 4
1u0 IS13 3S14
2S2W B3 3S38 B13
RES
4 3 ADAC(1) 12 7S05-4
2 BP INH
B 3S53-4 +2V5 LM324 14 3S38
B
2S2R
2S2S
3S16-2 7
10u
2 3S12-2 2S2V 22K +AUDIO-L
AUDIO-IN1-R 7 10K COM IS02 13
2S2Y C3 3S39 C13
10u
100R 100R
2S2T
100n
22K 1u0 11
2S34
100n
2S2Z B3 3S3F E4
2
3S16-3 3 6
3S12-3 6 2S2Z
3 10K
AUDIO-IN2-L
22K 1u0 10K
2S30 C3 3S3G-1 C7
2 3S36-2 7
4 3S12-4
IS0V 4
3S16-4 5
2S2Y 10K
8 3S36-1 1 2S31 C3 3S3G-2 D8
100u 4V
3S51
2S42
2S41
10K
4R7
5
1u0
AUDIO-IN2-R 2S2G
22K 1u0 2S32 D3 3S3G-3 C8
47p
4 3S17-4 5
AUDIO-IN3-L
3S13-4 IS0R
10K
2S31 7S00-2
PNX85500 +24V-AUDIO-VDD
2S33 C3 3S3G-4 D7
C 4
22K
5
3
1u0
AE10 AUDIO AC7
2S36
1
3S3G-1
8 ADAC(1)
C 2S34 B9 3S3H D7
6 L P
3S17-3 AF10 AIN1 ADACL AB7
AUDIO-IN3-R 3
3S13-3
6 10K
2S30 R N 1u0 IS1N 33R
3
3S3G-3
6 ADAC(2) ADAC(2)
IS03
10
4
7S05-3
LM324 8 3S39
2S36 C6 3S3U D8
AD10 AC6 -AUDIO-R
22K
3S17-1
1u0
AC10
L
R
AIN2 ADACR
P
N
AB6
33R
9
100R 2S38 E9 3S51 C6
1 8
3S13-1 2S33
AUDIO-IN4-L
1 22K 8
10K AE9
AF9
L
AIN3
1
AD7
AE7 2
3S3G-2
7 ADAC(3)
11
2S39 E9 3S53-1 A6
1u0 R 2
3S17-2
2
7 AD9 ADAC
3
AF7
AD6 4 3S3G-4 5
33R
ADAC(4)
2S3A E8 3S53-2 B6
2S32 L 4
2 3S13-2 IS1S
AUDIO-IN4-R
22K
7
10K
1u0
AC9
R
AIN4
5
6
AE6
AF6
33R
2S3B E8 3S53-3 B6
AF8
D AE8
L
R
AIN5
OSCLK
AD4 3 3S36-3 6
10K
D 2S3C E8 3S53-4 B6
3S10 AD1 5 3S36-4 4
10K
2S2L 100R AB9
AB8
POS
I2S_OUT
VR_AADC
SCK
WS
AD2
3S3H
ADAC(5) 2S2H 2S3D E8 3S6L F12
1u0 IS1B NEG 33R
IS19
AD8
1
AE1
AF2
3S3U
ADAC(6)
47p 2S3E E3 3S6M H8
VREF_AADC 2
IS1A AC8
I2S_OUT_SD 3
AE3
AF3 33R
+24V-AUDIO-VDD
2S3F E2 7S00-2 C5
VCOM_AADC 4
3S3F
AF5
SPDIF_OUT
2S3G E3 7S05-1 E12
2S3D
2S3C
2S3B
2S3A
2S39
2S38
1n0
1n0
1n0
1n0
1n0
1n0
56R DBS8 AE5
SPDIF_IN1 IS07 4 2S3H E3 7S05-2 G12
2S3G
2S3H
2S3E
2S3F
100n
100n
3 7S05-1
10u
10u
ADAC(5)
LM324 1
2S3J B11 7S05-3 C12
9S06
AUDIO-OUT-L
E 2 E
11 2S3K G6 7S05-4 B12
2S3L H8 7S08 B8
2S3M H9 7S09-1 G6
3S37 3S6L
2S3Q G5 7S09-2 H6
10K 22K 2S41 C6 7S09-3 H7
2S2K
+3V3
2S42 C6 7S09-4 I7
47p
F +3V3-ARC F 3S0Z A11 9S06 E4
+24V-AUDIO-VDD
3S11
3S10 D4 DBS8 E4
IS1L
1R0 3S11 F5 FS03 B12
4 3S12-1 B2 FS08 B7
2S3Q
100n
ADAC(6) 5 7S05-2
LM324 7
IS06
6
AUDIO-OUT-R
3S12-2 B2 IS02 B11
7S09-1
11 3S12-3 B2 IS03 C11
14
74LVC00APW
G SPDIF-OUT-PNX SPDIF-OUT-PNX
IS1D
1 & 2S3K G 3S12-4 C2 IS06 G11
3 IS1G 1 3S18-1 8 SPDIF-OUT
2
100n 220R 3S34 3S32
3S13-1 C2 IS07 E11
2 3S18-2 7
3 3S18-3 6
+3V3
220R
3S13-2 D2 IS0R C2
220R
7
+3V3-ARC
10K
7S09-2
14
74LVC00APW 7S09-3
3S14 B9 IS13 B9
14
4 & 74LVC00APW
6 9 & IS1K IS44
SEL-HDMI-ARC
IS1E
5 8
2S3L 180R 2S3M
eHDMI+ 3S16-1 B3 IS19 D3
H +3V3
10
100n 3S6M 100n H
3S16-2 B3 IS1A D3
7
IS1B D4
3S25
3S16-3 B3
68R
3S16-4 C3 IS1D G5
+3V3-ARC 3S17-1 C3 IS1E H5
7S09-4 3S17-2 D3 IS1G G7
14
74LVC00APW
12 &
11
3S17-3 C3 IS1K H9
I +3V3
13 I 3S17-4 C3 IS1L F5
7
3S18-1 G7 IS1N C7
3S18-2 G8 IS1S D7
3S18-3 G8 IS44 H9
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 184
PNX Mips
PNX Mips
B02E B02E
1 2 3 4 5 6 7 8 9 10 11 12 13 14
1F10 A12
2S89 D8
3S00 B5
3S21 B1
3S26 C5
3S27 C6
+3V3 3S40 A1
A 7S00-3
PNX85500 A 3S45 A1
CONTROL 1 3S56 2 3S69 1F10
3S45 IS05 SDA
C25
2 3S57
SDA-UP-MIPS SDA-UP-MIPS
FS44
3S55 C3
BOOTMODE 1 C26 100R 1 SCL-UP-MIPS SCL-UP-MIPS 3S6A 4K7 4K7 EJTAG-TRSTn-PNX85500
+3V3
10K
SCL
100R EJTAG-TMS-PNX85500 FS49
1
2
3S56 A5
BOOTMODE Y21 B26 1 3S58 2 SDA-SET SDA-SET 3S6B 4K7 EJTAG-TDO-PNX85500 FS50
+3V3
3S40
GPIO1 GPIO1 Y22
GPIO_0
2
SDA
A25 100R 1 2 3S5W SCL-SET SCL-SET 3S6C 4K7 EJTAG-TCK-PNX85500 FS51
3 FOR FACTORY 3S57 A6
GPIO_1 SCL 4
10K
DS52
RXD1-MIPS Y23
Y24
GPIO_2
B25 1 3S5Y 2
100R
3S6D 2K2
EJTAG-TDI-PNX85500 FS52
5 USE ONLY 3S58 A5
TXD1-MIPS GPIO_3 SDA SDA-SSB SDA-SSB 6
+3V3
3S82 RES
BOOST-PWM RXD2-MIPS W21
GPIO_4
3
SCL
A24 100R 1 2 3S5Z SCL-SSB SCL-SSB 3S6E 2K2 EJTAG-DETECTn FS53
7
3S5W B6
TXD2-MIPS W22 100R
3S80
10K
FS10 TXD2-MIPS PNX-SPI-CS-AMBIn W23
GPIO_5
B24 1 3S60 2 SDA-TUNER SDA-TUNER 3S6F 4K7 10 9
8 3S5Y B5
+3V3 GPIO_6 SDA
3S81 10K FS11 RXD2-MIPS V22 4 A23 100R 1 2 3S61 3S6G 4K7
+3V3 PNX-SPI-CS-BLn GPIO_7 SCL SCL-TUNER SCL-TUNER 3S5Z B6
B +3V3
3S21
10K
PNX-SPI-CS-AMBIn
BOOST-PWM
SELECT-SAW
V23
U23
GPIO_10
GPIO_11 TRSTN
AA25
100R
EJTAG-TRSTn-PNX85500 EJTAG-TRSTn-PNX85500 3S6K B 3S60 B5
IS04 AA24 EJTAG-TMS-PNX85500 EJTAG-TMS-PNX85500 1 8 3S6H-1 10K +3V3
10K FS57
USB-DM R26
DN
TMS
TCK
AA23 EJTAG-TCK-PNX85500 EJTAG-TCK-PNX85500 10K 3 6 3S6H-3
+3V3-STANDBY BM08B-SRSS-TBT 3S61 B6
3S62 PNX-SPI-CS-BLn
R25 AB26 10K 2 7 3S6H-2
+3V3 USB-DP
IS4Z R24 DP USB TDO
AB25
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500
EJTAG-TDO-PNX85500
EJTAG-TDI-PNX85500 10K 4 5 3S6H-4
3S62 B1
10K RREF TDI
3S00
10K 3S64 C1
AE4 RESET-SYSTEMn
RESET_SYS
3S55 3S65 E11
5K6
3S64 FS64 33R
SELECT-SAW AD5 BACKLIGHT-PWM
+3V3 BL_PWM 3S66 E11
10K
CLK_54_OUT
AC5 3S67 E11
3S26
3S27
3S6J
10K
10K
10K
3S68 E11
C +3V3
3S83
RXD1-MIPS
C 3S69 A9
10K
+3V3 +3V3
3S6A A8
3S84
+3V3 TXD1-MIPS
3S72 IS40 3S6B A9
10K PXCLK54
47R
3S6C B8
3S6D B9
3S6E B8
RES
3S6F B9
3S6G B8
D D 3S6H-1 B8
+3V3 3S6H-2 B9
2S89
3S6H-3 B9
3S6H-4 B9
100n +3V3
3S6J C5
3
7S01
PCA9540B 3S65
3S6K B9
VDD SC0 5 SCL-DISP SCL-DISP 2 1
3S72 C6
3S66 4K7
SC1 8 SCL-BL SCL-BL 2 1 3S80 B1
3S67 4K7
E SCL-SET 1 SCL
I 2 C
SD0 4 SDA-DISP SDA-DISP 2 1
E 3S81 B1
INP 4K7
SDA-SET 2 SDA FIL
-BUS
CTRL SD1 7 SDA-BL SDA-BL 2
3S68
1 3S82 B1
4K7
VSS
3S83 C1
3S84 C1
6
FS31 7S00-3 A4
7S00-4 G12
7S01 E8
9S10 SCL-BL 9S10 F8
IS08 9S11 F8
F SCL-SET 9S11 FS2W SCL-DISP
F 9S12 F8
9S12 FS2Y SDA-DISP
IS09 9S13 F8
SDA-SET 9S13 SDA-BL
DS52 B2
FS10 B2
FS11 B2
7S00-4
PNX85500 FS2W F9
ETH-RXCLK AA3 ETHERNET FS2Y F9
RXCLK
FS31 F8
G ETH-RXD(0)
ETH-RXD(1)
Y5
Y6
0
1 TXCLK
AA2 ETH-TXCLK
G FS44 A12
ETH-RXD(2) IS50 AB4 RXD ETH
ETH-RXD(3) AC1
2
AA1 ETH-TXD(0)
FS49 A12
3 0
AA4
ETH-RXDV AC2 TXD
1
AB1
ETH-TXD(1)
ETH-TXD(2)
FS50 A12
RXDV 2
ETH-RXER Y4
RXER 3
AB2 ETH-TXD(3) FS51 B12
ETH AA5 ETH-TXEN
SDIO-DAT3 W2
CC_DAT3
TXEN
TXER
AB3 ETH-TXER FS52 B12
W1 AC3
SDIO-CLK
SDIO-CMD W6
CLK COL
Y2
ETH-COL
ETH-CRS
FS53 B12
CMD CRS
SDIO-DAT0 W5
0 MDC
Y3 ETH-MDC FS57 B12
SDIO-DAT1 W4 SDIO Y1 ETH-MDIO
1 DAT MDIO
SDIO-DAT2 W3
2
FS64 C2
H SDIO-CDn
SDIO-WP
U6
V6
SDCD
SDWP
H IS04 B2
IS05 A2
IS08 F8
IS09 F8
IS40 C6
IS4Z B4
IS50 G12
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 185
A A
B B
C 7S00-7
PNX85500 C
PX1A- A7 LVDS D7 PX3A-
N N
PX1A+ B7 A A E7 PX3A+
P P
PX1B- C8 E8 PX3B-
N N
PX1B+ B8 B B D8 PX3B+
P P
F F
G G
1 2 3 4 5 6 7 8 9 10 11 12 13 14
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div. table
Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 186
+1V1
2S4E E2
POL
2S4F B9
IS3B
2S4G B9
2S4K G10
5S04
RES
30R
2S10
100n
1u0
2S13 3S1B C2
2S37 3S1C C1
1u0 3S1D C2
9S24
RES
B 2S11 B 3S1E C1
100n IS20
3S1F C2
DS50 2S4G
3S1G D2
3
1 10p 3S1H D1
AC17
AA17
AF26
1S02
54M
7S00-9
PNX85500 2S4F 3S1J D2
VDDA_1V1_DCS
VDDA_ADC2V5
VDD_XTAL
AE17
3S1K D1
1
+3V3-STANDBY 2S4D XTAL_IN 10p +3V3-STANDBY
3S1B 1n0 AD19
RC RC 0
3S1C RES 10K
3S1D
TACHO TACHO AE19
1 XTAL_OUT
AF17 3S1L E2
10K CEC-HDMI CEC-HDMI AF19
2 P1
3S1E RES 27K BACKLIGHT-PWM-ANA-DISP BACKLIGHT-PWM-ANA-DISP AA20
3 RESET_IN
AA26 RESET-STBYn 3S1P D11
C +3V3-STANDBY
10K 3S1F
10K
SDM SDM AB20
7
STANDBY EA
AB24 EA EA
IS3F 3S44 C 3S2A D2
3S3L RES AC20
3S3M 10K
LCD-PWR-ONn
EJTAG-DETECTn
LCD-PWR-ONn
EJTAG-DETECTn AD20
0
AB23 ALE
ALE IS3E 10K 3S43 3S2F D7
3S3N RES 1 ALE
3S3P
10K
10K
LAMP-ON
STANDBY
LAMP-ON
STANDBY
AE20
AF20
2
AC26 PSEN PSEN
IS3D
10K 3S42
10K 3S2G D7
3 PSEN
RES 3S3S
10K 3S3Q RES FAN-CTRL1 FAN-CTRL1 AA21
4
P2
3S2F 100R RES 3S6V
3S2H D7
10K FAN-CTRL2 FAN-CTRL2 AB21 AC23 SDA-UP-MIPS SDA-UP-MIPS
10K 3S3R POWER-OK POWER-OK AC21
5
6
MC
SDA
SCL
AC24 3S2G 100R SCL-UP-MIPS SCL-UP-MIPS 4K7 3S6W 3S2K D7
3S3T 10K RES ENABLE-3V3n ENABLE-3V3n AD21
+3V3-STANDBY 10K
7
0
AD26 3S2H 100R LED1
LED1 RES 3S1P 4K7 RES
3S2L D10
3S1G 3S2K 100R
AE21 PWM AC25 LED2 10K 3S41
3S1H 10K
RXD-UP
TXD-UP
RXD-UP
TXD-UP AF21
0 1 LED2
3S2M E10
1 10K
10K
3S2A RES
DETECT2 AA22
2 SDO
AE23 PNX-SPI-SDO 3S2S E10
D 10K
DETECT2 AB22
AC22
3
4
P3
SPI
SDI
CLK
AF25
AF24
PNX-SPI-SDI
PNX-SPI-CLK
D 3S2V F11
AD22 AF23 PNX-SPI-CSBn
3S1K RES
5 CSB
3S3L C2
RESET-SYSTEMn RESET-SYSTEMn AD23 AB17 IS2V CTRL-DISP CTRL-DISP RES 3S2L
10K AV2-BLK AE26
0 0
AA18 IS2Z RESET-DVBS RESET-DVBS 10K RES 3S46 3S3M C1
1 1 RES 3S3Y
AE25 P5 AD18 10K
3S1J KEYBOARD
AV1-BLK
KEYBOARD AE24
2 2
AE18
RESET-USBn
RESET-ETHERNETn
RESET-USBn
RESET-ETHERNETn 10K RES 3S47 +3V3-STANDBY 3S3N C2
3 3
100K 2S4E LIGHT-SENSOR
AF22
P0
4
AF18
AA19
SEL-HDMI-ARC SEL-HDMI-ARC
10K
3S2S
RES
10K
3S2M
3S3P C1
AV1-STATUS 4 5 RESET-AVPIP RESET-AVPIP
VSS_XTAL
100n AV2-STATUS AE22
5
P6
6
AB19 RESET-AUDIO RESET-AUDIO 3S3W 10K RES 3S3Q C2
AC19 AUDIO-MUTE-UP AUDIO-MUTE-UP 4K7 3S49
7
3S3R D2
AD17
3S1L
SPI-PROG SPI-PROG 4K7
PNX-SPI-WPn
10K 3S3S D1
E E 3S3T D1
3S3W E9
3S3Y D9
3S41 D12
3S42 C11
3S43 C11
3S44 C11
F F 3S46 D10
+3V3-STANDBY +3V3-STANDBY 3S47 E10
3S49 E10
1 3S2V 2
3S6V C11
10K
3S6W D12
9S0E
FS0Z
7S20 RESET-STBYn
NCP303LSN28 5S04 B6
2
FS45
1 IS2U
INP
OUTP
1 7S00-9 B6
5
CD
NC GND
7S20 G10
G G 9S0D G9
3
9S0E G9
9S0D
2S4K
100n
RES
9S24 B6
DS50 B8
FS0Z G11
FS45 G9
IS20 B6
IS2U G10
H H IS2V D7
IS2Z D7
IS3B A6
IS3D C10
IS3E C10
IS3F C10
1 2 3 4 5 6 7 8 9 10 11 12 13
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Circuit Diagrams and PWB Layouts Q551.1E LA 10. EN 187
PNX Power
PNX Power
B02H B02H
1 2 3 4 5 6 7 8 9 10 11 12 13 14
IS3Q 5S80 2S21 F6
+1V1 2S23 B6
30R
RES 10u
2S26 A6
2S6A
2S5A
100n
2S27 B3
2S28 B3
1
2S29 C6
5S81
2S43 B2
A +2V5
A
2
30R 2S45 F11
RES 10u
2S46 F11
2S6B
2S5B
100n
2S4M B12
2S4N C11
1
+1V8
IS3S 5S82 2S4P C11
2S26
2S60
2S61
2S62
2S63
2S64
2S65
2S66
2S67
2S68
100n
100n
100n
100n
100n
100n
100n
100n
100n
47u
+3V3 2S4Q B3
30R 2S4R B4
RES 10u
2S5C
2S5D
100n
2S4S F5
2S4T H11
2S4U D11
SENSE+1V1 c001
5S93 2S4V D11
7S00-10
G6
G7
R6
R7
U7
C6
D6
A5
A6
B5
B6
E6
2S4W D11
F6
F7
L6
L7
+2V5
B PNX85500 30R
B
2S6E 2
220u 6.3V
VDD_1V8 2S4Y D11
2S4M
2S6D
100n
100n
+1V1 AF1 V20
2S4Z E11
7
AE2 HDMI_VDDA_1V1 V21
5
AD3 2S50 E11
1
2S5G-1
2S5G-2
2S5G-3
2S5G-4
2S5H-1
2S5H-2
2S5H-3
2S5H-4
2S4Q
2S4R
2S43
2S28
2S27
2S23
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
AC4 VDD U20
22u
22u
47u
2S51 E9
1
AB5 HDMI_VDDA_2V5 U21
H20 2S52 E9
4
F11 U22 +2V5-LVDS 2S53 H11
2
HDMI_VDDA_3V3_TERM
G11
F13 N6 2S55 G11
2S4N
2S4P
2S56 G11
100n
G13 VDD_2V5 N7
10u
F15
2S57 G11
2S5J-3 6
2S5J-1 8
8
5
G15 C7
2S5K-1
2S5K-2
2S5K-3
2S5K-4
2S5J-2
2S5J-4
2S58 H11
C C
100n
100n
100n
100n