DC-to-DC Power Converter by Rodney Yeu and Sudip Kundu ECE 345 Section H TA: Jon Wheeler 4/26/02 Project #34
DC-to-DC Power Converter by Rodney Yeu and Sudip Kundu ECE 345 Section H TA: Jon Wheeler 4/26/02 Project #34
DC-to-DC Power Converter by Rodney Yeu and Sudip Kundu ECE 345 Section H TA: Jon Wheeler 4/26/02 Project #34
Project #34
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ABSTRACT
The goal of our project was to efficiently build a DC-to-DC power converter. The input range of the DC source ranges from 13V to 21V and the output voltages are 4.5V, 5V, and 12V. The input voltage range was chosen to match the output voltage range of a solar panel. The output voltages were chosen because theses voltages are used in CD players, logic circuits, and portable devices. The converter would accept up to 75W input and output 25 W at each output. The output voltage ripple is 100mV peak-to-peak and the target efficiency is 80%. The project will consist of three buck converters, each having a feedback circuit and short circuit protection at the output.
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3. DESIGN DETAILS...8
3.1 3.2 3.3 3.4 3.5 3.6 Inductor Values....8 Inductor Design....9 Capacitor Values..9 PWM Implementation....10 Snubber Values..10 Protection Circuit Resistor Values.11
4. DESIGN VERIFICATIONS.13
4.1 4.2 4.3 Voltage and Current Ripple...13 Short Circuit Protection.14 Efficiency...14
1. INTRODUCTION
The objective of our project was to build a power converter that would take an input range of 13V to 21V DC and convert it into 4.5V, 5V, and 12V DC. To meet the target efficiency of 80%, a buck converter design was implemented. The input voltage ranges were chosen to match the output voltage range of a solar panel power supply. Since the input voltages were allowed to be in a range, a feedback circuit needed to be implemented so that the output voltages would be held constant. The feedback circuit also allowed for voltage regulation when different loads were connected to the output of the converter. To ensure smooth DC voltage at the output, the voltage ripple was constrained to 100mV peakto-peak, which was controlled by the capacitor. Also, the output current ripple was constrained to 250mA peak-to-peak, which was controlled by the inductor. Other than converting power, the power converter had to be protected from a short circuit at the output. The protection of the circuit was achieved by setting a level of current where the buck converter would shut down. A flow chart of the converter is shown in Figure 1.
Feed Back Protection Circuit
2 It can be seen from the flow chart that the buck converter has a feed back circuit that controls the duty cycle and thereby maintaining the output voltage. The protection circuit senses the high current and sends a signal to the feed back control to shut the buck converter down in the event of a shortcircuit.
(1)
V in
Output
Figure 2. Basic Buck Converter Design The schematics of the buck converters are shown in Figure 3, Figure 4, and Figure 5. These schematics show the buck converters with the more complex components like the protection circuit and the gate drive in blocks. The capacitor, resistor, and the diode around the MOSFET are the snubber circuit, which is discussed in Section 2.2.
Gate Drive C4
5nf R1 230 D4 D 1N 4001 1 L2 100uH Q3 V in M T P 2955 C2 D7 M B R 1045 22uF 4.5 V 2 Protection Ckt.
4
Gate Drive
C5
R2 230
D 11
5nf L1 100uH Q5
D 1N 4001 1
V in
M T P 2955
D 9 M B R 1045
C1 15uF
5 V
R3 1 .5 k
D 10
2nF
5 frequency. The PWM also has the feedback control to maintain the desired output voltage. Figure 6, Figure 7, and Figure 8 shows the schematic of the PWM for the 4.5V, 5V, and 12V output.
R 4 50k R 5 62k
Vout
Output of Comparator
R 10 150k C4 100p U 1 2 1 4 8 3 7 R 15 68k R 16 12k V FB C OMP R T /C T V RE F IS E N S E V CC U C 3843A OU T 6
Gate Drive
C 1
3 .2 k
R 1
10nF
R6 50k R7 50k
Vout
Output of Comparator
U 2 R 11 150k C5 100p 2 1 4 8 3 7 R 17 68k R 18 12k V FB COMP R T /C T VR E F
Gate Drive
OUT 6
C 2
3 .2 k
R 2
10nF
IS E N S E VC C U C 3843A
6
R 8 50k R 9 13k
Vout
0
U3 R 12 150k C6 100p 2 1 4 8 3 7 V FB COMP R T /C T V RE F IS E N S E V CC U C 3843A R 13 68k R 14 12k OUT 6
Output of Comparator
Gate Drive
C3
7 .5 k
R3
5nF
Figure 8. PWM Configuration for the 12 V Output Since a PMOS is being used, the voltage coming out of the PWM needs to be inverted so that the MOSFET will turn on instead of turning off. Figure 9 shows how the output of the PWM was inverted using a BJT. This inverter uses the saturation mode of the BJT to turn on the MOSFET and the cutoff mode to turn off the MOSFET.
Vin
R2 470 R1
Output of PWM
1k
Q1 2N 2222A
7 will increase causing the comparator to trigger and shut down the PWM, which then causes the whole circuit to shut down.
Vin
Inductor
R p lu s
R sense .0 6 o h m s
Vout
Cd
Rd
U 1 R3 2 3 8 5 + LM 311 4 1 6 7
PWM
Vref
R 1
R 4
R 2
For example, in the 4.5 V output case, it is important to look at the inductor voltage when the switch is off. The first calculation is the on time ratio with the equation Krein [1] D = VOUT/VIN. For the input voltage of 13 V to 21 V this on time ratio ranges from .214286 to .346154. Therefore, the off time ratio (1-D) ranges from .65385 to .78571. The next calculation is the full rated load current, which is equal to 25 W/4.5 V = 5.555A. It is also important to note that the frequency of the switching is 50 KHz and so the period is 20s. From here, the critical inductance equation yields 4.5 V = 2*5.555/(.78571*2*10^-5) = 6.3649 H. Since this critical inductance value will yield a current ripple of 2*5.555 A, an inductor value of 637H is chosen to give a ripple of .111A. The other inductor values are calculated similarly and the values of all the inductors are given in Table 1. These inductor values results in ripples around 100 mA to ensure that the maximum 250 mA ripple is obtained. Table 1. Inductance Values
Output Voltage [V] Inductance [H] 4.5 637 5 762 12 2469
(3)
(4)
IC dt < Vripple
(5)
Since the voltage ripple, which is in the shape of a triangle, is positive for half of the switching period, the integration turns out to be just the area of the triangle. For the 4.5 V output case, using the current ripple from the inductor value, the voltage ripple equation becomes 1/C*(.111/2)*.5*.5*(2*10^-5) < .100 Solving for the capacitor value gives C > 2.775 F. This capacitance and the other ones for the different output voltages are shown in Table 2. Table 2. Minimum Capacitor Values
Output Voltage [V] Capacitance [F] 4.5 2.775 5 2.5 12 1
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11 ) / (2Voff ) (6)
For the 4.5 V case, the Ion is equal to 5.56 A, the tfall is equal to 39 s, and Voff is equal to 21 V. The capacitor value needed for the snubber circuit in the 4.5 V buck converter is 5.2 nF. The capacitor values are calculated in a similar fashion for both the 5 V and 12 V buck converters. Their capacitor values are 4.6 nF and 2 nF respectively. The resistor value must be chosen so that the energy stored in the capacitor discharges within the on time of the MOSFET. This means the time constant 1/RC must be less than the on time of the switch. The resistor value can be calculated using the following equation from Krein [1] ) / 2* Csnubber Rsnubber < (DT (7)
For the 4.5 V case, D is equal to .2143, T is equal to 20 s, and C is equal to 5.2 nF. The resistor needed for the 4.5 V buck converter must be less that 412 , the value chosen was 230 . For the 5 V and 12 V case the resistor values are 230 and 1500 respectively.
12 difference had to be a function of the reference voltage and the voltage drop across the RSENSE. By using KVL and KCL the difference in the terminals turned out to be V+ - V- = VDROP - VREF *(R3)/{R1((R3+R4)/R1 + (R3+R4)/R2 +1)} (8)
By setting the current limit, one can set the trigger limit of the comparator. For example, in the 4.5V case, the rated current is 25 W/4.5 V = 5.555 A. So protecting the circuit from 6 A, the equation for the voltage drops turns out to be VDROP to 6A * .06 = .36 V The resistor values can now be solved by setting the difference equation to zero and substituting the 5V into VREF. So the equation is now 0 = .36 - 5*(R3)/{R1((R3+R4)/R1 + (R3+R4)/R2 +1)} To solve this equation, a guess needs to be made for one of the resistors so that the other resistor values can be calculated. Since low current is desired to go through these resistors to ensure minimal power dissipation, the resistor values were guessed in the range of tens of kilo ohms. The 4.5 V and 5 V output circuits are protected for 6.7 A, and the 12 V output circuit is protected from 4.2 A. The resistor values for the different output voltages are shown in Table 3. Table 3. Short Circuit Protection Resistor Values
Output Voltage [V] RSENSE [] Rplus [k] R1[k] R2[k] R3[k] R4[k] 4.5 0.06 10 75 75 10 15 5 0.06 10 75 75 10 15 12 0.06 10 75 75 5 7.5
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4. DESIGN VERIFICATIONS
After building the converters on the protoboard, the circuit was tested using heavy loads so that less current was drawn. This was to ensure the current would not reach close to the rated value of the protoboard, since it is only rated for 2 A on most of its busses. After testing the circuit on the protoboard, the circuit was soldered. The 5 V output and the 12 V output worked well, but the 4.5 V output did not function. Replacement parts for the MOSFET and PWM were needed to make the 4.5 V buck converter fully operational. Therefore, data for the efficiency of the 4.5 V converter could not be recorded.
14 calculated to give a current ripple of around 100 mA to ensure that the current ripple would be less than 250 mA. From the oscilloscope, the rough values of the current ripples were around 100 mA, for all currents measured.
4.3 Efficiency
To test the efficiency, different loads were placed at the output of the 12 V and the 5 V converters, which allowed the converters to work around rated conditions. As the loads decreased in value, the converter got closer to rated conditions because the converter had to output more current through the small resistor to achieve 12 V and 5 V output. The results are shown in Table 4 and Table 5. Table 4. Results of Tests on 12 V
12 V Output Vin Iin 13.35 13.35 13.35 13.35 13.35 13.35 13.35 21.5 21.5 21.5 21.5 21.5 21.5 Vout 0.39 0.51 0.6 0.51 0.7 0.93 1.16 0.09 0.312 0.4 0.45 0.6 0.78 12.4 12.33 12.03 12.08 11.98 11.92 11.9 12.3 12.3 12.2 12.2 12.26 12.23 Iout Eff RL 0.031 7.383079 500 0.1206 21.84032 100 0.2336 35.08375 50 0.475 84.27701 25 0.656 84.09716 16.667 0.883 84.77597 12.5 1.11 85.2964 5 0.048 0.254 0.498 0.678 0.912 1.146 30.51163 46.57424 70.64651 85.49457 86.67535 83.57531 500 50 25 16.667 12.5 5
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Figure 11 and Figure 12 show the efficiency versus the load. As seen from the figure, the efficiency increases as the load goes toward rated conditions. It is also clear from the figure that the target efficiency of 80% was achieved.
Figure 11. Efficiency vs. Resistance for 12 V output Efficiency vs. Resistance for 5 V
90 80 70 60 50 40 30 20 10 0 0 100 200 300 400 500 600 Resistance [ohms]
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5. COSTS
The cost of the project is shown in Table 5. Table 5. Costs of the Project
MTP2955 MOSFET MBR1045 Diode D1N4001 2N2222A BJT LM311 Comparator T200-26 Iron Cores 230 ohm Resistors 1.5 k Resistors 50 k Resistors 62 k Resistors 13 k Resistors 150 k Resistors 3.2 k Resistors 7.5 k Resistors 68 k Resistors 12 k Resistors 1 k Resistors 470 Resistors .06 Resistors 75 k Resistors 10 k Resistors 15 k Resistors 5 k Resistors 100 uF Capacitors 5 nF Capacitors 2 nF Capacitors 10 nF Capacitors 100 pF Capacitors 0.78 0.88 0.05 0.47 0.7 4.81 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 2.12 0.15 0.15 0.15 0.1 3 3 3 3 3 3 2 1 4 1 1 3 2 2 3 3 3 3 3 6 5 2 1 3 3 1 5 3 2.34 2.64 0.15 1.41 2.1 14.43 0.2 0.1 0.4 0.1 0.1 0.3 0.2 0.2 0.3 0.3 0.3 0.3 0.3 0.6 0.5 0.2 0.1 6.36 0.45 0.15 0.75 0.3
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Labor Rodney Yeu Labor Sudip Kundu Total Cost 35/hour 35/hour 100*2.5 100*2.5 8750 8750 17538.43
6. CONCLUSIONS
After testing the project, the DC-to-DC power converter worked as designed. The output was constantly held around the 4.5 V, 5 V, and 12 V when the input voltage ranges were changed from 13 V to 21 V. The efficiency of the converter was above 80% at rated conditions. Even though precise measurements were not obtained for the voltage or the current ripple, the inductance and capacitance were increased from the minimum required values to ensure that the ripple was below maximum voltage and current ripple. The soldered on 4.5 V converter was not able to function because of chip damage to the PWM and the MOSFET. However, this converter is very similar to the 5 V converter and should have no problems once the chips are replaced. Overall, the power converter functioned as designed and would efficiently convert the power from a solar power panel to 4.5 V, 5 V, and 12 V
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7. REFERENCES
Philip T. Krein, Elements of Power Electronics. New York: Oxford University Press, 1998, pp.126, 150-153, 499-503.