NJU7505A

BAND PASS FILTER FOR AUDIO SPECTRUM ANALYZER DISPLAY

GENERAL DESCRIPTION
The NJU7505A is a band pass filter for audio spectrum analyzer display. It consists of high and low band pass filters, CR oscillation circuit, control circuit and DC transfer circuit. Each band pass filter using the switched capacitor filter technology operates at the shared time by 5 bands which filter constant is switched by the internal clock. Therefore, the audio signal shared of 5 bands is output from a serial output terminal. The 10 bands version using the double by the cascade connection is prepared.

PACKAGE OUTLINE

NJU7505AD

NJU7505AM

FEATURES
BPF for the audio spectrum analyzer display of the 5 bands 10 bands extension is available by the cascade connection BPF using the switched capacitor filter technology CR oscillation circuit on chip (External clock input is available) Power-on initialization circuit on chip (External reset input is available) C-MOS Technology Package Outline DIP8, DMP8

PIN CONFIGURATION
OSC1 OSC2 RSTb/CLKO RD 1 2 3 4 5 6 7 8 VDD AIN AOUT VSS

BLOCK DIAGRAM
Audio Signal

RSTb/CLKO

RD

Control Signal Clock Signal

OSC1 OSC2

OSC
fOSC fOSC/16

Control Circuit
fOSC/4 iH iL RL RH H L

Power-on Initialize

BPF High Band

AIN

High Band Peak Detector Level Shifter & Output BUF

AOUT

Input BUF

LPF BPF Low Band Low Band Peak Detector

VDD
+

VDD AGND VSS

VSS

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NJU7505A
TERMINAL DESCRIPTION
NO. 1 2 3 4 5 6 7 8 SYMBOL OSC1 OSC2 RSTb/CLKO RD VSS AOUT AIN VDD FUNCTION External Resistor connecting terminal. External Resistor connecting terminal or External clock input terminal. Both as Reset input terminal and the clock of (2/3)*fOSC output terminal. Trigger signal for reading-out the AOUT of each band output terminal. GND 0V Peak voltage of each band output terminal. Audio signal input terminal. Positive power supply +5.0 V

PEAK FREQUENCY
The peak frequency in each band of NJU7505A are a suitable band interval which is the 5 bands at using the single and is the 10 bands at using the double by the cascade connection. Band f1a f1b f2a f2b f3a f3b f4a f4b f5a f5b Peak Frequency ( Hz ) Using the single Using the double 12k 12k 8k 3.5k 3.5k 2.3k 1k 1k 670 250 250 165 63 63 42*

Note 1) It may not be output along the expectation at the peak frequency of * marking, since the sampling time is not enough. Note 2) The bands of f1a, f2a, ... f5a correspond to the master side and the bands of f1b, f2b, ... f5b correspond to the slave side at the cascade connection of the double.

The example of using the single

OSC1 AOUT f1a~f5a fOSC

The example of using the double

OSC1 Master OSC2 RSTb/ CLKO 2/3 x fOSC AOUT OSC1 f1a~f5a Slave OSC2 AOUT f1b~f5b

NJU7505A
fOSC OSC2

NJU7505A

NJU7505A

VSS

VSS

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NJU7505A NJU3555
FUNCTIONAL DESCRIPTION

Interface to external controller The example of the interface between the NJU7505A and the external controller is shown below;

(1) Example of the interface to the external controller ( Using the single ) After the RSTb signal from the external controller is input and then the internal circuit is initialized, each band data is output as shown below timing chart; Since the RD signal is output before each band is switched, the external controller is to count the number of the RD signal and is to recognize the status of the band and is to read the output data from the AOUT terminal through the external A/D converter. The output type of the external controller connected to the RSTb/CLKO terminal as the RSTb input should be the N-channel and open-drain type or the diode should be connected between the RSTb/CLKO terminal and the output terminal of the external controller, so that the voltage of the RSTb/CLKO terminal is not gotten over the VSS level.
AIN OSC1

NJU7505A

A/D
Converter

AOUT RSTb/ CLKO

OSC2 RD

fOSC

VSS

CON

3 x 2 / fosc AOUT RD RSTb f1 f1 f2 f2 f3 f3 f5 f5 f1 f1 f2 f2 f4 f4 f3 f3 f1 f1 f1 f2 f2 f3

14

248 / fOSC

Since the RD signal is output before 248/fOSC of each band switched, the output data should be read out within the limited time as shown right;

AOUT RD Available Period of Read-out 8 / fOSC

If the RSTb signal which pulse width is more than 4/fOSC is input, the internal circuit is initialized and the data of f1 band is output from the AOUT terminal after 52/fOSC of the rise edge of the RSTb signal.

AOUT 4 / fOSC[MIN] RSTb

fn 52 / fOSC

f1

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NJU7505A
(2) Example of the interface to the external controller (Using the double) The 10 bands application is available using the cascade connection of the double NJU7505A as shown blow. After the RSTb signals from the external controller are input to each of the master and the slave of the NJU7505A and then each internal circuit is initialized, each band data is output as shown below timing chart; Since the RD signals are output from the master and the slave before each band is switched, the external controller is to count the number of the RD signals and is to recognize the status of the band and is to read the output data from each AOUT terminals through the external A/D converter. The master clock for the slave is provided with the output signal from the RSTb/CLKO terminal of the master. The master clock for the slave is stopped when the RSTb signal is input from the external controller to the master, so that the RSTb/CLKO terminal of the master is used both as the RSTb input of the master and the master clock for the slave. The output type of the external controller connected to each RSTb/CLKO terminal as the RSTb input should be the N-channel and open-drain type or the diode's should be connected between each RSTb/CLKO terminal and the output terminals of the external controller, so that the voltage of each RSTb/CLKO terminal is not gotten over the VSS level.
AIN OSC2 AIN OSC1

NJU7505A
Slave

NJU7505A
AOUT Master OSC2 RD VSS

A/D
Converter

AOUT RSTb/ CLKO RD

RSTb/ CLKO

CON
Master AOUT RD RSTb Slave AOUT RD RSTb 248 / fOSC (248 / fOSC x 3/2) f1 f1 f2 f2 3 x 2 / fosc x 3/2 f3 f3 f5 f5 f1 f1 f2 f2 f4 f4 f3 f3 f1 f1 f2
14

3 x 2 / fosc f1 f1 f2 f2 f3 f3 f5 f5 f1 f1 f2 f2 f4 f4 f3 f3 f1 f1 f2 f2 f3 f3 f1 f1 f2

14

Since each RD signal of the master and the slave is output before 248/fOSC (248/fOSC*3/2) of each band switched, the output data should be read out within the limited time as shown right; * The "( )" is corresponded to the slave. If the RSTb signal which pulse width is more than 4/fOSC is input to the master, the internal circuit is initialized and the data of f1 band is output from the AOUT terminal of the master after 52/fOSC of the rise edge of the RSTb signal. The RSTb signal for the slave should be set to "L" level while the RSTb signal for the master is "L" level and should keep "L" level more than 6/fOSC. So the slave operates as same as the master after 78/fOSC of the rise edge of the RSTb signal for the slave.

AOUT RD Available Period of Read-out 8 / fOSC (8 / fOSC x 3/2)

AOUT 4 / fOSC[MIN] RSTb RSTb

fn 52 / fOSC

f1

AOUT

6 / fOSC [MIN] fn'

78 / fOSC f1

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NJU7505A NJU3555
ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply Voltage Input Voltage Output Voltage Power Dissipation Operating Temperature Storage Temperature SYMBOL VDD VIN VIO VOUT PD Topr Tstg RATINGS -0.3 to +7 -0.3 to VDD+0.3 -0.3 to 0 -0.3 to VDD+0.3 500(DIP), 300(DMP) -30 to 85 -55 to 125 UNIT V V V mW C C (Ta=25C) NOTE 7 5, 8

Note 3) If the IC are used on condition above the absolute maximum ratings, the IC may be destroyed. Using the IC within electric characteristic conditions will cause malfunction and poor reliability. Note 4) All voltage values are specified as VSS = 0V. Note 5) When the voltage of the RSTb/CLKO terminal is gotten over the VSS level, the diode should be connected between the RSTb/CLKO terminal and the external. Note 6) Decoupling capacitor should be connected between the VDD terminal and the VSS due to the stabilization of the operation. Note 7) Applied to the AIN or the OSC2 terminals. Note 8) Applied to the RSTb/CLKO terminal.

DC CHARACTERISTICS
PARAMETER Operating Voltage Operating Current Input Leak Current 1 Input Leak Current 2 External Clock Input Voltage Output Voltage 1 Output Voltage 2 Output Offset Voltage BPF Output Voltage SYMBOL VDD IDD IIL1 IIH1 IIL2 VILC VIHC VOL1 VOH1 VOL2 VOH2 VOS VOUT CONDITITONS VDD Terminal AIN Terminal RSTb/CLKO Terminal OSC2 Terminal IOL1=100A IOH1=-100A RSTb/CLKO IOL1=100A Terminal IOH1=-5A AOUT Terminal AIN:OPEN AOUT Terminal Sine Wave Input fIN=f1 to f5 VIN=200mVp RD Terminal VIL1=0V VIH1=5V VIH2=0V MIN 4.5 -0.1 0.033 -0.2 0 3.5 0 4.5 0 4.25 3.5 TYP 5.0 6.0 -0.05 0.05 -0.1 4.5 26.0 (VDD=5V, VSS= 0V, Ta=25C) MAX UNIT NOTE 6.0 V 12.0 mA -0.033 mA 0.1 -0.05 mA 1.5 V 5.0 0.5 V 5.0 0.5 V 4.75 300 mV dB 9,10,11 V 9,10

Note 9) This specification is tested on condition of fCLK=400kHz (The external clock is input to the OSC2 terminal through the capacitor for AC coupling. Note 10) Each input frequency of f1 to f5 is referred to the table of the " PEAK FREQUENCY ". Note 11) This specification is calculated from " VOUT / VIN ".

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NJU7505A
AC CHARACTERISTICS
PARAMETER Oscillation Clock Freq External Clock Frequency SYMBOL fOSC fCLK CONDITIONS RSTb/CLKO Terminal VDD=5V RSTb/CLKO Terminal VILC=0V VIHC=VDD Master RD Pulse Width tPWRD RD Terminal Slave RSTb/CLKO Terminal Master Slave 4/fOSC 4/fCLK 6/fOSC 6/fCLK 100 MIN 360 ( VDD=4.5 ~ 6.0V, VSS=0V, Ta=25C) TYP MAX UNIT NOTE 400 400 8/fOSC 8/fCLK 12/fOSC 12/fCLK 440 800 kHz kHz 12 13

14

RSTb Pulse Width RSTb Rise/Fall Time

tPWRS tr, tf

s s

15 15

RSTb/CLKO Terminal

Note 12) The example for the CR Oscillation

OSC1 RT OSC2 CT

RT: 13k(2%) CT: 220pF(5%)

*The oscillation clock frequency is calculated from the output frequency of the RSTb/CLKO terminal by 3/2.
VSS

Note 13) The example for the external clock input

Open OSC1

The input signal for the OSC2 terminal should be the condition of the pulse of DUTY50%10%. * The oscillation clock frequency is calculated from the output frequency of the RSTb/CLKO terminal by 3/2.

Oscillator

OSC2

Note 14) The output wave form of the RD terminal.

0.8VDD 0.8VDD

tPWRD

Note 15) The input wave form of the RSTb terminal.

tf 0.8VDD 0.2VDD tPWRS tr 0.8VDD 0.2VDD

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NJU7505A NJU3555
APPLICATION CIRCUIT (1)
AUDIO IN Lch AUDIO IN Rch

AUDIO OUT

AUDIO OUT

RESONANCE CIRCUIT

NJU7305 or NJU7306

RESONANCE CIRCUIT

*1 *2 ATT AIN OSC1 13k OSC1 220pF RSTb/ CLKO AOUT *3 RD

NJU7505A

A/D

CON

DISPLAY DRIVER

DISPLAY

*1 ) The capacitor for AC coupling connected to the AIN terminal should be needed. *2 ) Connecting the attenuator, the dynamic range of the display can be changed. *3 ) When the voltage of the output terminal of the CON gets over the VSS level, the diode should be connected between the RSTb/CLKO terminal and the output of the CON.

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NJU7505A
APPLICATION CIRCUIT (2)
AUDIO IN Lch AUDIO IN Rch

AUDIO OUT

AUDIO OUT

RESONANCE CIRCUIT

NJU7305 or NJU7306

RESONANCE CIRCUIT

*1 ATT *2 AIN ATT *2 AIN OSC1 13k OSC2 OSC2 220pF RD RSTb/ CLKO AOUT RSTb/ CLKO AOUT *3 *3 RD

NJU7505A

NJU7505A

A/D

A/D

CON

DISPLAY DRIVER

DISPLAY

*1 ) The capacitor for AC coupling connected to the AIN terminal should be needed. *2 ) Connecting the attenuator, the dynamic range of the display can be changed. *3 ) When the voltage of the output terminal of the CON gets over the VSS level, the diode should be connected between the RSTb/CLKO terminal and the output of the CON.

[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.

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