FPGA Based+Implementation+of+an+AdaptiveCanceller+for+5060 Hz+Interference

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IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 56, NO.

6, DECEMBER 2007

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FPGA-Based Implementation of an Adaptive Canceller for 50/60-Hz Interference in Electrocardiography


Rafael Ramos, Member, IEEE, Antoni Mnuel-Lzaro, Joaqun Del Ro, and Gerard Olivar, Member, IEEE
AbstractThe implementation of an adaptive canceller of interference using a eld-programmable gate array (Xilinx) programmable logic device/mechanism is shown in this paper. The adaptive canceller automatically adjusts its parameters to eliminate noise. This ability allows the canceller to adapt to changes in the characteristics of the signal. The use of this adaptive canceller to lter the interference noise that is caused by the power line is shown. Index TermsAdaptive signal processing, electrocardiogram (ECG) interference, electrocardiography, eld-programmable gate array (FPGA), noise canceling.

I. I NTRODUCTION MAJOR problem in recording electrocardiograms (ECGs) is the appearance of unwanted 50/60-Hz powerline interference in the signal measurement because of magnetic induction, displacement currents in leads or in a patients body, and equipment interconnections and imperfections [1], [2]. There are diverse techniques for minimizing the appearance of unwanted interference, such as proper grounding and the use of twisted pairs [3]; signal averaging, which enhances signals with random noise [4]; impedance balancing analysis [5]; the use of a line interference subtraction lter to reduce the level of line interference [6]; segmentation ECG signal method [7]; interference rejection of preamplied electrodes by automated gain adaptation [8]; the multiscale cross correlation between a template beat and each detected beat [9]; and ECG noise ltering using wavelets [10]. These methods do not assure optimum performance, although they reduce the interference in almost every case [1], [2]. Another well-known method for canceling the 50/60-Hz interference is using a notch 50/60-Hz lter. This solution is, however, not robust under frequency variations of the interfering signal, which unavoidably happens in low-quality main environment [11], [12]. Another method that is potentially capable of reducing the 50/60-Hz ECG interference is an adaptive noise-canceling scheme [13][15]. This system is based on an adaptive lter that has the capability of automatically adjusting its parameters

Fig. 1. Adaptive noise canceller general diagram.

to obtain the best performance under a variable interference [16], [17]. Fig. 1 shows the general block diagram of an adaptive noise canceller [13]. The signal s plus an uncorrelated noise n0 form the primary input to the canceller. The reference input is the noise n1 , which is assumed to be uncorrelated with the signal but correlated in some unknown way with the noise n0 [18]. The noise n1 is processed by an adaptive lter that automatically adjusts its own impulse response through a minimization algorithm such as the least mean square (LMS) algorithm that responds to an error-dependent signal. The output y that is produced by the lter is a close replica of n0 . This output is subtracted from the primary input s + n0 to produce the system output s + n0 y . The objective is to adjust, as much as possible, the canceller output s + n0 y to the signal s [19]. This goal is accomplished by feeding the system output back to the adaptive lter and adjusting the lter through an adaptive algorithm to minimize the total system output power [20]. Assume that s, n0 , n1 , and y are statistically stationary and have zero mean. Assume that s is uncorrelated with n0 , and n1 is correlated with n0 . The output is = s + n0 y. (1)

Manuscript received December 29, 2005; revised March 30, 2007. This work was supported by the Spanish Science and Culture Ministry under Grant CTM2004-04510-C03-00 and Grant CTM2005-02034/MAR. The authors are with the Universitat Politcnica de Catalunya, 08800 Vilanova i la Geltr, Spain (e-mail: [email protected]; [email protected]; [email protected]; [email protected]). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TIM.2007.904472

Squaring (1), taking mean values, and realizing that s is uncorrelated with n0 and y yield E [2 ] = E [s2 ] + E (n0 y )2 . (2)

When the lter is adjusted so that E 2 is minimized, E [(n0 y )2 ] is, therefore, also minimized. The lter output y is then a

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IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 56, NO. 6, DECEMBER 2007

best least-square estimate of the primary noise n0 . The smallest possible output power is Emin [2 ] = E [s2 ]. (3)

Therefore, y = n0 , and = s. In this case, minimizing the output power causes the output signal to be perfectly free of noise. On the other hand, when the reference input is completely uncorrelated with the primary input, the lter will turn itself off and will not increase the output noise. In this case, the output power will be E [2 ] = E (s + n0 )2 + E (y )2 . (4)

To implement the adaptive canceller, different solutions are available. For example, one can use general-purpose microcontrollers or digital signal processors [21], [22]. These solutions are not optimum since they have low processing speed and sequential execution due to the fact that adaptive cancellers are implemented with a software program. The high cost in the development tools also has to be taken into account [23]. Another solution is the implementation of the adaptive controller with eld-programmable gate array (FPGA) programmable logic devices. This solution has several advantages: FPGAs are low-cost devices, and the development system works on personal computers where high processing speed is reached due to the optimized specic design. The use of FPGAs offers the parallel ECG signal processing advantage without losing processing speed, while adding control and management features in monitoring the ECG process. The microcontrollers architecture works in sequential mode instead of parallel mode, and therefore, the speed is lower. In this paper, we present the adaptive canceller implementation with FPGA. We have designed specic hardware blocks, which perform all the diverse functions represented in Fig. 1. In this way, we get better performance in terms of processing speed than the ones with general-purpose microprocessors or digital signal processors. To characterize the behavior of the designed adaptive lter, it will be applied to electrocardiogram signals, given that it will be very easy to generate electrocardiogram signals using the function generator HP 33120A; such signals will be contaminated with a different frequency interference. We will compare the results when using an adaptive lter with those obtained when an analog notch lter is used. II. A DAPTIVE C ANCELLER The adaptive canceller, which was presented before, can be used as a notch lter to cancel the interference that is caused by the power line in electrocardiograms. The advantages of this notch lter are that it offers an easy bandwidth control, is an innite null, and has the capability to adapt to frequency and phase variations of the interference signal [24], [25]. Fig. 2 shows the application of the adaptive noise canceller for electrocardiography [24]. This scheme is provided with two adaptive coefcientsw1 and w2 . The signal that is generated by the patients electrical heart activity is supplied to the primary input, whereas the reference

Fig. 2.

Fifty-hertz adaptive canceller diagram.

Fig. 3.

Prototype picture of the adaptive canceller.

input is supplied by the power line, which is conveniently attenuated [26], i.e., C cos(2fred t + ). (5)

Both inputs are sampled with frequency fm . From the reference input, two samples x1k and x2k are obtained and delayed 90 , as follows: x1k = C cos(kwred + ) x2k = C sin(kwred + ) (6)

where wred = 2fred Tm , with Tm = 1/fm , and fred = 50/60 Hz. The algorithm LMS recomputes the coefcients with the aim of minimizing the output signal power k . The value of the coefcients at instant k + 1 will be w1,k+1 = w1k + 2k x1k w2,k+1 = w2k + 2k x2k (7)

where is the learning constant. The optimum value of has been determined by Matlab-Simulink simulated results of adaptive canceller model in relationship with the settling time and the lter attenuation at the interference frequency. The transfer function of the noise canceller can be obtained by

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Fig. 4.

FPGA-based adaptive canceller diagram.

analyzing the signal propagation from the primary input to the output [19], i.e., H (z ) = z 2 2z cos(wred ) + 1 . z 2 2(1 C 2 )z cos(wred ) + 1 2C 2 (8)

The bandwidth of the notch lter is BW = 2C 2 rad with Q being the quality factor, i.e., Q= wred . 2C 2 (10) (9)

III. A DAPTIVE C ANCELLER I MPLEMENTATION In Fig. 3,a picture of the built adaptive canceller prototype is shown. The acquisition system is identical for the two signals of the canceller, and it is composed of an antialiasing lter of second order with 200-Hz frequency and a MAX151 10-bit A/D converter that samples the signal at 1000 Hz. Xilinx FPGA

collects the samples and conveniently performs the adaptive canceling operations. The FPGA provides the output of the canceller with 12-bit resolution. This output value is converted to an analog signal using the DAC AD7545 from Analog Devices. Other auxiliary blocks in this application are the 10-kHz clock circuit, which provides the clock signal to the FPGA, and the 32-kB erasable programmable read-only memory, which keeps the FPGA conguration. Fig. 4 shows the block diagram of the adaptive canceller that is implemented with the FPGA. Four main blocks can be distinguisheda memory block, an arithmetic circuit, an LMS algorithm block, and a sequential control. The memory block allows the samples of the reference input to be kept and implements the delay of 90 . This block occupies 5 10 bits RAM. In the rst position, the present value (value at instant k ) of the reference input is kept. In position 5, the value of the sample x1,k4 is stored. Taking into account that the sampling frequency is 1000 Hz and the frequency of the interference signal is 50 Hz, this difference in ve memory positions is equivalent to a 90 delay, and thus, x1,k4 = x2k . The LMS algorithm block (see Fig. 4) includes all the necessary

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Fig. 5. Interference signal, n1 (Ch1, 5 V/div); noise-free ECG signal, ECG (Ch2, 2 V/div); noisy ECG signal, ECG+no (Ch3, 2 V/div); and the output adaptive canceller, (Ch4, 2 V/div) for an interfering signal of 50 Hz.

Fig. 6. Primary input and output canceller spectra for an interfering signal of 50 Hz.

elements to compute the values of coefcients w1 and w2 according to (7). Among all the elements of this block, one should mention a two-position RAM that stores coefcients w1 and w2 with a 15-bit resolution, a 7 7 multiplier, which performs the product of coefcients and samples, and a 15-bit adder, which performs wik + 2k xik to obtain the present value for the coefcient wik+1 . The so-called block of arithmetic circuits includes a 10-bit multiplier in the twos complement representation (see Fig. 4). Its function is to multiply the samples x1k and x2k by the coefcients w1 and w2 , respectively. A 20-bit accumulator adds the results of the products, and the output of the adaptive lter yk is obtained. A 12-bit subtractor performs the difference of the primary input and the adaptive lter output, obtaining the value of the following system output k : k = d k y k . (11)

The sequential control block generates the 11 control signals, which negotiate the function of the different blocks of the adaptive canceller and the A/D and D/A converters. An FPGA of family XC4000E by Xilinx has been used to implement the adaptive control, namely, the model XC4010E1-PC84. This device includes 10 000 logic gates and 800 ipops, which are distributed in 400 congurable logic blocks (CLBs), and has 61 input/output blocks (IOBs). In our design, we used 226 CLBs (56%), 36 IOBs (59%), and 72 ipops (9%). IV. E XPERIMENTAL R ESULTS We have carried out laboratory experiments to test the performance of the adaptive canceller by using an experimental prototype, which has been used to eliminate the 50/60-Hz interference in an ECG signal that is generated by the HP 33120A function generator. Fig. 5 shows the input and output signals of the adaptive canceller for an interference signal of 50 Hz. In channel 1 (5 V/div), we observe the 50-Hz interference; in channel 2 (2 V/div), we see the ECG free of noise;

Fig. 7. Frequency response of the adaptive canceller with an interfering signal of 50 Hz.

in channel 3 (2 V/div), we observe the primary input that is composed of the ECG and the 50-Hz noise; channel 4 (2 V/div) corresponds to the output of the adaptive canceller where the canceller has eliminated the interference signal in the ECG. Fig. 6 shows the primary input spectrum and the output of the adaptive canceller for an interfering signal of 50 Hz. It can be observed that the canceller does not change the frequency components of the ECG signal (from 0 to 30 Hz). However, the lter presents an attenuation of the interfering signal of 27.87 dB. The frequency response of the adaptive canceller that is measured for an input reference interfering signal of 50 Hz is completely at, except at interference frequencies. Fig. 7 shows the measured frequency response of the adaptive canceller for an interference input signal of 50 Hz. The response is completely at, except at interference frequencies. To check the dynamic features of the adaptive canceller, an interfering signal with an amplitude jump has been applied.

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TABLE I ERROR AND ATTENUATION OF THE INTERFERING NOISE PERFORMED BY THE A DAPTIVE F ILTER U SING D ATA S AMPLES F ROM TDS 784D OSCILLOSCOPE PROCESSING BY MATLAB

Fig. 8. Adaptive cancellers response to a jump in the interfering signal amplitude from 1.5 to 2.5 V and at 50 Hz.

Fig. 10. Analog notch lter circuit.

Fig. 9. Measurement of the settling time of the adaptive canceller for a 50-Hz interfering signal.

Fig. 8 shows the output of the lter that is measured when the interfering signal jumps from 1.5 to 2.5 V and its frequency is 50 Hz. To measure the settling time of the adaptive canceller, an interfering signal of 1.5-V amplitude and 50-Hz frequency has been applied to the primary input. The settling time of the output is 1.4 s for an interfering signal of 50 Hz (Fig. 9). A quantitative measurement of performance of this adaptive canceller is obtained using l1 , l2 , and l norms, which are dened as follows for a signal e(k ) [27]: e
1

Fig. 11. Input and output notch lter spectra for an interfering signal of 50 Hz.

1 n

|e(k )|
k=1

(12)

e e

1 n
k

|e(k )|2
k=1

(13) (14)

= max |e(k )|

where e(k ) is the error signal between the original ECG and the ltered ECG. The results are given as a percentage gure

100 e i / ECG i for i = 1, 2, and . Table I shows the results obtained from the measurements using different interfering signal frequencies, together with the attenuation in decibels, which are introduced by the adaptive canceller at these frequencies. To prove the quality of the adaptive canceller, we have compared its features with an analog notch lter. Fig. 10 shows the electric schematic of the fourth-order notch lter, which is normally used in the main noise cancellation. The following components have been used in the tests that are adjusted to remove the 50-Hz interference: R1 = R2 = 120 k, R3 = R5 = R7 = R4 = R6 = 15 k, and C = 220 nF. Fig. 11 presents the input and output spectrum of the notch lter. In Table II, the measurements of the parameters l1 ,

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TABLE II ERRORS AND ATTENUATION OF THE INTERFERING NOISE WHEN THE NOTCH FILTER IS ADJUSTED TO 50 Hz

Fig. 13. Fifty-hertz interfering signal (Ch1, 2 V/div) and output notch lter response (Ch2, 1 V/div) to an amplitude jump of the interfering signal from 1.5 to 2.5 V when it is adjusted to 50 Hz.

Fig. 12. Frequency response of the notch adjusted to eliminate interfering signals of 50 Hz.

l2 , and l have been provided together with the attenuation of the notch lter at different frequencies of the interfering signal and when the lter is adjusted to eliminate the 50-Hz interference. Fig. 12 shows the amplitude frequency response of the notch lter that is adjusted to eliminate the 50-Hz interference. To check the dynamic features of the notch lter, an interfering signal with an amplitude step has been applied. Fig. 13 shows the output of the notch lter adjusted to the interfering signal frequency when the amplitude of this signal steps from 1.5 to 2.5 V and its frequency is 50 Hz. To measure the settling time of the notch lter, an interfering signal of 1.5-V amplitude and 50-Hz frequency has been applied to the primary input. The settling time of the notch lter is 0.2 s (Fig. 14). The features that the adaptive canceller presents, in both noise attenuation and error, are better than those by the notch lter. The results obtained in the frequency response and also error show much less distortion of the ECG signals than the results using the notch lter in a wide range of interfering signal frequencies. Another advantage of the adaptive canceller over the notch lter is that it maintains its features, even if the interfering signal has frequency drifts. This is due to the adaptive cancellers capability of adapting the attenuated frequency to the noise characteristics. This allows us to use the adaptive canceller

Fig. 14. Measurements of the settling time of the notch lter when it is adjusted to eliminate 50-Hz interfering signals.

to eliminate the 50/60-Hz noise signals without changing its design. On the contrary, the notch lter has to be tuned to the interfering signal where it maintains its capacity of eliminating the interference, provided that there is n0 frequency drifts or new values. Tuning the lter to 50 or 60 Hz requires a change in the circuit component values. V. D ISCUSSION OF R ESULTS We have presented the adaptive canceller for a 50-Hz interference for electrocardiography by means of FPGA programmable logic devices. The adaptive canceller exhibits better performance than traditional solutions since it is robust to changes in the interfering signal. The use of exactly the same circuit to remove the 50/60-Hz interference is advantageous. In the experimental results, the robustness of the adaptive canceller lters has been tested, facing drifts of 3 Hz (Table I),

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as well as its correct operation with 50/60-Hz line frequency without modifying circuit components. Three experiments have been carried out in the laboratory to ascertain the frequency drift, which implies three different environments where the designed lter could be appliedtwo autonomous systems [an oceanographic vessel (2665.6 Tm and 5000 kW) [28] and a system based on a 12-V dc accumulator with a dc/ac 220-V 50-Hz converter] and different design laboratories. Line frequency measurements are carried out, and a worst-case drift of 0.2 Hz during one-day testing was found, taking measurements every 2 s, although in transitories of line autonomous systems, a drift of 1 Hz is found. Although one of the main features of the adaptive lter is the possibility of canceling interference signal drifts, the fact that the line frequency measurement is quite stable does not represent a problem for this design, which not only satises all working environment specications entirely but also has better performance than a conventional analog notch lter. The adaptive lter is also much more versatile and robust, as shown in [13] and [24]. Without a doubt, the most important result is the behavior of the adaptive lter when the interference frequency increases from 50 to 60 Hz (Europe and USA line frequencies). Using FPGAs to design adaptive cancellers has several advantages. 1) There are advantages, which have been discussed above, that are associated with digital lters compared to analog lters. 2) FPGAs allow the design time to be decreased and the canceller to be set. 3) The cost of the FPGA is low and allows the addition of more processing of the desired signal. 4) The design can be easily modied. 5) The adaptive cancellers frequency response in the interest band is atter than the analog notch lter. 6) The width of the attenuated band of the adaptive canceller is much smaller than that of the analog notch lter. 7) With specically oriented architecture, a faster processing speed can be obtained, and thus, it can process signals with a broad bandwidth. 8) Concurrent programming algorithms allow parallel signal processing using only one FPGA with several input ECG signals without a loss of speed in the process. The adaptive canceller has been tested with signals that simulate the ECG of a patient and the power-line interference. The results show the correct operation of the adaptive canceller in this kind of applications. R EFERENCES
[1] J. C. Huhta and J. G. Webster, 60-Hz interference in electrocardiography, IEEE Trans. Biomed. Eng., vol. BME-20, no. 2, pp. 91101, Mar. 1973. [2] P. S. Hamilton, M. G. Curley, R. M. Aimi, and C. Sae-Hau, Comparison of methods for adaptive removal of motion artifact, in Proc. Comput. Cardiol., 2000, pp. 383386. [3] Adli and Y. Yamamoto, Impedance balancing analysis for power-line interference elimination in ECG signal, in Proc. IEEE Instrum. Meas. Technol. Conf., May 1998, pp. 235238.

[4] Y. Z. Ider, M. C. Saki, and H. Alper Guer, Removal of power line interference in signal-averaged electrocardiography systems, IEEE Trans. Biomed. Eng., vol. 42, no. 7, pp. 731735, Jul. 1995. [5] Adli, Y. Yamamoto, and T. Nakamura, Elimination of power line interference in ECG signal using inverse loop, in Proc. Int. Conf. IEEE Eng. Med. Biol. Soc., 1998, vol. 6, pp. 33133314. [6] Y. Z. Ider and M. C. Saki, Line interference subtraction lter for signal averaged electrocardiography, in Proc. Comput. Cardiol., 1993, pp. 799802. [7] K. N. Kadhim, S. M. R. Taha, and W. A. Mahmoud, A new method for ltering and segmentation of the ECG signal, in Proc. IEEE Eng. Med. Biol. Soc. Int. Conf., 1988, pp. 154155. [8] T. Degen and H. Jackel, Enhancing interference rejection of preamplied electrodes by automated gain adaption, IEEE Trans. Biomed. Eng., vol. 51, no. 11, pp. 20312039, Nov. 2004. [9] E. Laciar, R. Jan, and D. H. Brooks, Improved alignment method for noisy high-resolution ECG and Holter records using multiscale crosscorrelation, IEEE Trans. Biomed. Eng., vol. 50, no. 3, pp. 344353, Mar. 2003. [10] P. M. Agante and J. P. Marques, ECG noise ltering using wavelets with soft-thresholding methods, in Proc. Comput. Cardiol., 1990, pp. 535538. [11] S. C. Dutta Roy, S. B. Jain, and B. Kumar, Design of digital FIR notch lters, Proc. Inst. Electr. Eng.Vis. Image Signal Process, vol. 141, no. 5, pp. 334338, Oct. 1994. [12] S.-C. Pei and C.-C. Tseng, Elimination of AC interference in electrocardiogram using IIR notch lter with transient suppression, IEEE Trans. Biomed. Eng., vol. 42, no. 11, pp. 11281132, Nov. 1995. [13] J.-D. Wang and H. J. Trussell, Adaptive harmonic noise cancellation with an application to distribution power line communications, IEEE Trans. Commun., vol. 36, no. 7, pp. 875884, Jul. 1988. [14] S. M. M. Martens, M. Mischi, S. G. Oei, and J. W. M. Bergmans, An improved adaptive power line interference canceller for electrocardiography, IEEE Trans. Biomed. Eng., vol. 53, no. 11, pp. 22202231, Nov. 2006. [15] A. K. Ziarani and A. Konrad, A nonlinear adaptive method of elimination of power line interference in ECG signals, IEEE Trans. Biomed. Eng., vol. 49, no. 6, pp. 540547, Jun. 2002. [16] S.-C. Pei and C.-C. Tseng, Adaptive IIR notch lter based on least mean p-power error criterion, IEEE Trans. Circuits Syst. II , vol. 40, no. 8, pp. 525529, Aug. 1993. [17] P. S. Hamilton, 60 Hz ltering for ECG signals: To adapt or not to adapt? in Proc. Conf. IEEE Eng. Med. Biol. Soc., 1993, pp. 779780 [18] R. Jan, P. Laguna, P. Caminal, and H. Rix, Adaptive ltering of high-resolution ECG signals, in Proc. Comput. Cardiol., 1990, pp. 347350. [19] T. Adli, Y. Yamamoto, T. Nakamura, and K. Kitaoka, Automatic interference controller device for eliminating the power-line interference in biopotential signals, in Proc. IEEE Instrum. Meas. Technol. Conf., May 2000, pp. 13581362. [20] N. V. Thakor and Y.-S. Zhu, Applications of adaptive ltering to ECG analysis: Noise cancellation and arrhythmia detection, IEEE Trans. Biomed. Eng., vol. 38, no. 8, pp. 785794, Aug. 1991. [21] H. Koymen, Y. Z. Ider, F. Kuukdeveci, F. Tuzun, and I. Yaylali, A novel quadrature interference technique in ECG noise reduction, in Proc. Comput. Cardiol., 1990, pp. 409412. [22] M. B. Yeary and N. C. Griswald, Adaptive IIR lter design for single sensor applications, IEEE Trans. Instrum. Meas., vol. 51, no. 2, pp. 259267, Apr. 2002. [23] T. Raita-aho, T. Saramaki, and O. Vainio, A digital lter chip for ECG signal processing, IEEE Trans. Instrum. Meas., vol. 43, no. 4, pp. 644649, Aug. 1994. [24] B. Widrow and S. D. Stearns, Adaptive Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1985. [25] J. R. Glover, Adaptive noise cancelling applied to sinusoidal interferences, IEEE Trans. Acoust., Speech Signal Process., vol. ASSP-25, no. 6, pp. 484491, Dec. 1977. [26] P. S. Halmiton, A comparison of adaptive and nonadaptive lters for reduction of power line interference in the ECG, IEEE Trans. Biomed. Eng., vol. 43, no. 1, pp. 105109, Jan. 1996. [27] L. G. Herrera-Benzed, J. Garcia, and B. G. Denys, Real-time digital lters for ECG signals: Evaluation and new designs, in Proc. Comput. Cardiol., 1991, pp. 133136. [28] A. Mnuel, G. Olivar, E. Trullols, and M. Moreno, Measuring electrical network parameters in the oceanographic vessel HESPERIDES, in Proc. OCEANS MTS/IEEE, Providence, RI, 2000, vol. 2, pp. 11491152.

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Rafael Ramos (S97M06) was born in Barcelona, Spain, in 1967. He received the B.S., M.S., and Ph.D. degrees in telecommunications engineering from the Universitat Politcnica de Catalunya, Barcelona, in 1990, 1996, and 2006, respectively. Since 1990, he has been an Assistant Professor with the Departamento de Ingeniera Electrnica, Universidad Politcnica de Catalua, where he teaches courses on microcontrollers. His research elds are related to nonlinear controllers, sliding mode control, power electronics, adaptive signal processing, and digital implementation of signal processing systems and nonlinear control systems.

Antoni Mnuel-Lzaro was born in Barcelona, Spain, in 1954. He received the B.S. and Ph.D. degrees in telecommunications engineering from the Technical University of Catalonia, Barcelona, in 1980 and 1996, respectively. Since 1988, he has been an Associate Professor with the Department of Electronic Engineering, Technical University of Catalonia. He was the Director of the research group Remote acquisition systems and data processing (SARTI) of the Technical University of Catalonia, which is composed of nine researchers, within the Technological Innovation Centre network of the Catalonia government (March 2001). He is also the Coordinator of the Tecnoterra-associated unit of the Scientic Research Council through the Jaume Almera Earth Sciences Institute and Marine Science Institute. His current research interests are in applications of automatic measurement systems based on the concept of virtual instrumentation and oceanic environment. He is the author and coauthor of several papers in international journals, six books on instrumentation, and numerous communications in international congresses and is the holder of two patents, all in the area of electronic instrumentation and power electronics. He is currently involved in more than ten projects with industry and seven funded public research projects. Dr. Mnuel-Lzaro is a member of the IEEE Oceanic Engineering Society, the IEEE Signal Processing Society, the IEEE Instrumentation and Measurement Society, the IEEE Education Society, the IEEE Power Electronics Society, the IEEE Computer Society, and the IEEE Communications Society.

Joaqun Del Ro was born in Catalonia, Spain, in 1976. He received the B.S. degree in telecommunications engineering and the M.S. degree in electronics engineering from the Technical University of Catalonia, Barcelona, Spain, in 1999 and 2002, respectively. He is currently working toward the Ph.D. degree in Technical University of Catalonia, Barcelona, Spain, with a thesis on the execution of signal processing algorithms on programmable hardware for smart sensor design. Since 2001, he has been an Assistant Professor with the Electronic Engineering Department, Technical University of Catalonia. He is a member of the research group Remote acquisition systems and data processing (SARTI). He is currently collaborating with the Bioacoustics Applications Laboratory on the acquisition of auditory evoked potentials in cetaceans. He is involved in projects with industry and funded public research projects and is a National Instruments Certied Instructor for teaching ofcial LabVIEW courses. His last publication is the book LabVIEW 7.1. Programacin Grca para el Control de Instrumentacin (March 2005, Thomson Paraninfo).

Gerard Olivar (M98) was born in Tarragona, Spain, on October 22, 1963. He received the degree in mathematics from the Universitat de Barcelona, Barcelona, Spain, in 1987 and the Ph.D. degree in mathematics from the Universitat Politecnica de Catalunya (UPC), Barcelona, in 1997. From 1987 to 1990, he was with the Department of Applied Mathematics and Telematics, UPC. From 1990 to 1995, he was a member of the permanent teaching staff with UPC. Since 1995, he has been with the Differential Geometry, Dynamical Systems, and Applications Group, UPC. His current research interests are the applications of nonlinear dynamics to electronics engineering in the oceanic environment. He is the author or a coauthor of several papers in international journals and numerous communications in international congresses in the area of applied nonlinear mathematics and electronics engineering. Dr. Olivar is a member of the IEEE Circuits and Systems Society.

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