H-Bridge Buck-Boost Converters

Don Tuite Larry Bradley and Sameer Dash

Intersil
VI CIn a. Buck VI CIn b. Boost V d + CIn S1 L VL + COut VO + Load VL L S1 COut + + Vd VO = VI + VL Vd + VO Load S1 Vd + L COut + VO Load

Analog/Power Editor

hen they meet their design goals, switched-mode power supplies (SMPSs) provide a constant regulated output regardless of variations in input voltage or load current demands. Compared to regulation schemes based on dissipating energy in a resistor (e.g., the classic Zener diode regulator or variants on the venerable LM317), they offer potentially higher efficiency across a wide input range. Switching regulators employ a digital controller and one or more semiconductor switching devices to chop an unregulated dc voltage into strings of pulses with controlled duty cycles. The pulses are then applied to various arrangements of inductors and capacitors to obtain a constant regulated output voltage (or current). There are two common topologies for changing a source voltage to that required by a load: step-down (buck regulation) and voltage step-up (boost regulation). The need for a third option arises when the source voltage ranges above and below the voltage required by the load. The most common example of that kind of application is a mobile device powered by a lithium-ion (Li-ion) battery. Li-ion batteries have a long discharge time, if they are properly sized for the application. But as shallow as their discharge curve is, it still ranges from greater than 4 V to less than 3 V. With a typical operating voltage of 3.3 V for the ICs in the mobile device, the battery can spend a considerable portion of its discharge cycle very close to the voltage required for the system bus. At the same time, the load represented by the mobile device might be changing rapidly from low demand (e.g., sleep mode) to high demand (e.g., playing a streaming movie). Such a situation requires a buck-boost switching regulator. However, the design of a buck-boost proves challenging when the circuit must regulate input voltages that are very close to the specified output voltage. Treating the switching controller as a black box (represented here by ideal switches), all three topologies appear simple and bear a considerable resemblance to each other (Fig. 1). Buck, boost, and buck-boost dc-dc converters share a number of common elements, such as a magnetic device (transformer or inductor), at least one switch (usually a MOSFET), and a rectifying (usually a diode or MOSFET) and an output capacitor.

VI

c. Buck-boost (inverting) + VI CIn d. Cuk + VL VI CIn e. SEPIC L1 S1 + Cc + VL + Vd L2 COut + VO Load VL L1 S1 + Cc + Vd VL + L2 COut VO +

Load

VI CIn f. H-bridge

S1 S2

L S3

S4 COut

+ VO

Load

The Buck Converter

The buck converter makes a good starting point because it is the simplest to explain (Fig. 1a). It provides a way to step down a
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1. Building on the basic buck and boost topologies (a and b), there are several ways to create a buck-boost converter (i.e., one that can handle 1209_Basics_F1 inputs both greater than and less than its target output voltage). All of them involve tradeoffs, however. Sponsored by Intersil

dc voltage based on the ratio of the on-time to cycle-time (the duty cycle D) of a switch that opens and closes at a controlled rate. It uses pulse-width modulation (PWM) to control the step-down ratio between the input voltage (VI) and the output voltage (VO). Reduced to the simplest elements, the buck converter consists of a voltage source, a load, an inductor, a capacitor, a high-side switchgenerally a power MOSFET, but an insulated gate bipolar transistor (IGBT) or a bipolar junction transistor (BJT) also can be usedand a low-side switch. The low-side switch can be just a diode, as shown. But for greater efficiency, it can be replaced by another MOSFET that closes when the high-side switch opens and opens when the high-side switch closes. The relationship between input voltage and output voltage can be reduced for simplicity to: VO = VI/(1 + (2LIO)/(D2VIT)) where VO is output voltage, VI is input voltage, L is the inductor value, D is the duty cycle, IO is the output current, and T is the period of one cycle or 1/FSW (switching frequency).

hundred milliamps. The flyback requires a costly coupled inductor usually specifically wound for the application (Fig. 1e). Additionally, the flyback is inherently noisy. The SEPIC circuit is similar to the Cuk, but with L2 and the diode swapped, resulting in a non-inverting output (Fig. 1f). Though the efficiency of the SEPIC converter has improved over the years with the development of monolithic capacitors, it still suffers lower efficiency do to the losses in CC and L2. Slightly better efficiency may be witnessed if the L1 and L2 are wound on the same core. Because of the cost, solution size, and poor efficiency, the SEPIC never really gained acceptance in handheld devices. The H-bridge buck-boost converter is simply a buck and boost sharing one inductor (Fig. 1f). The diode for the buck section has been replaced with a synchronous FET, S2, for improved efficiency. Likewise, S4 has replaced the diode in the boost section. Given that the FETs can be integrated for mobile applications as well as for many industrial applications, the solution can be quite small and simple to design with, requiring just two external capacitors, CIn and COut, and the inductor.

The Boost Converter

In the ideal boost converter, when the low-side switch is closed (on), current through the inductor increases and energy is stored in the inductor (Fig. 1b). When the low-side switch is open, current continues through the inductor, through the flyback diode (or highside switch in a synchronous implementation), then to the capacitor and the load. In continuous mode, L di/dt determines the voltage. The expression for the output voltage is VO= VI/(1 D). The closer the duty cycle is to unity, the higher the output voltage. In discontinuous mode, where the inductor current falls to zero during part of each commutation period: VO = VI + (VI2D2T)/(2LIO) where T is again the length of one commutation cycle.

H-Bridge Advantages And Challenges

The obvious benefit of the H-bridge buck-boost is the simplicity for the system designer. But additionally, the H-bridge offers high efficiency, ample load current capability, and good line transient response. It also demands little quiescent current. And, a simple buck or boost would use off-the-shelf capacitors and inductors. Probably the greatest challenge in designing a buck-boost is in meeting stringent transient requirements in todays microprocessorbased equipment. This is especially difficult when VI approaches the desired output voltage. The H-bridge has to decide whether to operate in buck, boost, or buck-boost mode. The transition point between these operating modes and the speed at which the device can transition can be critical to maintaining a regulated output voltage.

H-Bridge Design Considerations

R  ipple: As the voltages for loads such as microprocessors and memory drop along with increasingly sensitive analog and RF circuits, the need for lowered ripple voltage on the output is becoming an absolute. Input voltage transients: An autonomous buck-boost is expected to ride through any input voltage changes. In some cases, these changes can be quite rapid as in hot-swapping or emergency backup applications. The capability of the buck-boost to ride through these abrupt changes is often the most critical performance requirement. L  oad transients: In boost operation, S1 is on 100% of the time and S2 remains off. So, the device reacts just as a simple boost converter would during an increase in load. The difference between a simple boost and buck-boost comes into play when the source has a high output impedance and suddenly the load drops considerably. This may result in VI rising close to or even above the desired output voltage. So not only does the device need to respond to a change in load, possibly transitioning into pulse-frequency modulation (PFM) mode, it may also need to rapidly change to buck-boost or even buck operation. For buck operation, S4 is on 100% of the time and S3 remains off. And similar to the boost operation above, if the load suddenly
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Buck-Boost-Inverting
A buck-boost circuit can be as simple as the buck or boost circuits requiring just a switch, diode, inductor, output capacitor, and modulator or considerably more complex depending on the requirements. The inverting buck-boost is the simplest of the circuits, providing an output whose polarity is opposite of the inputs (Fig. 1c). When S1 is closed, energy is stored in the inductor. When S1 is opened as it is in the figure, the voltage across the inductor reverses and current flows from the inductor to the output cap and load and then back to the inductor via the diode. With the use of a second inductor, the Cuk converter reduces the high ripple current that is seen on the input capacitor (Fig. 1d).

Buck-Boost-Noninverting
There are a number of solutions for non-inverting buck-boost regulations, such as the charge pump, flyback, and single-ended primary inductor coupled (SEPIC). However, all of them have their limitations. In todays integrated world, while the charge pump provides a simple, low-cost solution, it is generally limited to a couple
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increases during buck operation from a high impedance source, the device may need to quickly begin operating as a buck-boost or in boost mode to hold up the output. Adding to the complexity, the device may simultaneously be transitioning into PWM operation from PFM. The response time, the max voltage delta, and the recovery time during this transition are all parameters system designers need to be concerned about. The VIn transition also poses additional challenges to the control circuit. With four switches operating in alternating pairs, it is important to understand the impact of dead-time between switches. In the buck mode, when S2 is initially on, it conducts the inductor current while S1 is off. This is followed by S2 turning off, and S1 remains off for a few nanoseconds. This time between S2 turning off and S1 turning on is the dead time, and it is required as a safety measure to avoid shoot-through between VIn and ground through a low impedance path. During this time, the inductor current cannot instantly change to zero. Hence, the S2 body diode will conduct. In the next part of the switching cycle, S1 turns on and starts conducting the inductor current. The S2 body diode undergoes reverse recovery while S2 remains off. A similar event happens in the boost mode, involving S3 and S4. This process can have a significant impact on the transient response of the converter, particularly when the part is switching back and forth between buck and boost modes and also possibly undergoing a load transient event. Combining buck and boost operation, for stiff sources, the load transient response will depend for the most part on the control loop and switching frequency. For sources with high output impedance, where the input voltage can vary in and out of the buck-boost range of operation, the transient behavior can be quite severe. Care needs to be taken, then, when selecting a buck-boost converter to ensure it meets the performance needs of the circuit.

applications. Converters that provide a sync pin can also be used in applications where precise frequency control is necessary to prevent the generation of beat frequencies and other electromagnetic interference (EMI) that might disrupt sensitive circuits. Buck-boost converters that offer a frequency window that the device can be synchronized to without requiring any external compensation, then, add considerable value to the solution.

Transition Points For Buck-Boost Operation

The voltage window width and the methodology of buck-boost operation can have a significant impact on battery run time. For instance, if the desired output is 3.3 V, operating from a Li-ion or polymer battery and the window of buck-boost operation is 10% of VO, the device will be in buck-boost operation for nearly 50% of the batterys discharge cycle. Thus, the efficiency of buck-boost mode operation is critical in these cases. There are three methods of implementing buck-boost operation: P  ass through: Both high-side FETs (100% duty cycle) and lowside FETs are off (0% duty cycle). This theoretically can provide the highest efficiency, since there are no switching losses in driving the gates and no channel transitions losses. However, output regulation can be quite poor. Q  uadrature: The input high-side (S1) switch and output low-side (S3) switch are first turned on, creating an increasing field across the inductor. Then both switches are turned off and the input low-side (S2) and output high-side (S4) switch are turned on to transfer the inductors energy to the output cap and load. The advantage of this approach is good line transient response. Theoretically, though, it has the poorest efficiency since all four switches are being controlled each cycle. B  ang-bang: The bang-bang methodology runs in boost and then in buck operation, keeping the output between an upper and lower limit (Fig. 2). The voltage deviations are far smaller than (generally less than 0.5% of VO) the voltage regulation tolerance, ensuring such deviations will not impact the operation of the load.

Performance Tradeoffs
Many buck-boosts either provide a way of setting the FSW with an external component or in providing an input to sync to an external clock. This often requires external compensation to work with the selected FSW. Also, even some fixed-frequency converters require an external compensation network. Often, these components are unique to the system, increasing the bill of materials (BOM) size. In the cases where the FSW is set by an external component, due to the variability of both the converters own circuitry and that of the external component, the converter may be limited to simple

Balanced Performance
There are many applications for buck-boost converters in todays mobile devices. Some require a device that can run from two alkaline or nickel-metal-hydride (NiMH) cells. Other applications require a device that can range down to low voltages during standby conditions. However, the device needs to be simple to design in and take little space. And for mobile devices, where battery runtime is critical, they have to be efficient. The capability to ride through line and load transients on the part of the buck-boost may be the difference between a successful and unsuccessful product development. As examples of the H-bridge architecuture intended for batterypowered mobile devices, Intersils ISL9110 and ISL9112 represent the state of the art in H-bridges. The ISL9112 also features an I2C interface that allows programmability of the output voltage on the fly and also controls the rate of change of the output voltage transition. The low losses in their physical structure provide high efficiency, and a high switching frequency provides excellent transient response and a flexible sync range that doesnt require external compensation. They accept a wide range of voltages and provide voltages down to 1 V.
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Upper limit VO setting

Lower limit

2. There are various ways of synchronizing the two extra MOSFET switches in H-bridge buck-boost converters, including the passthrough, quadrature, and bang-bang approaches. The first two can be understood by inspecting the topology of the converter. This diagram 1209_Basics_F2 of VO helps explain why the bang-bang approach can achieve better efficiency than quadrature and better regulation than pass-through. A Supplement to Electronic Design