Page 1 of 4

Document No. 70-0358-03 www.psemi.com 2011 Peregrine Semiconductor Corp. All rights reserved.
Visit dtc.psemi.com for full version of datasheet
Product Brief
Figure 1. Functional Block Diagram
PE64904
Features
UltraCMOS Digitally Tunable
Capacitor (DTC)
100-3000 MHz
3-wire (SPI compatible) Serial Interface
with built-in bias voltage generation and
ESD protection
DuNE-enhanced UltraCMOS
TM
device
5-bit 32-state Digitally Tunable Capacitor
Series configuration C = 0.60 - 4.60 pF
(7.7:1 tuning ratio) in discrete 129 fF steps
Shunt configuration C = 1.14 - 5.10 pF
(4.6:1 tuning ratio) in discrete 129 fF steps
High RF Power Handling (up to 38 dBm,
30 Vpk RF) and High Linearity
Wide power supply range (2.3 to 3.6V)
and low current consumption
(typ. 140 A at 2.6V)
Excellent 1.5kV HBM ESD tolerance
on all pins
2 x 2 x 0.45 mm QFN package
Applications include:
Tunable Filters Networks
Tunable Antennas
RFID
Tunable Matching Networks
Phase Shifters
Wireless Communications
Figure 2. Package Type
10L 2 x 2 x 0.45 mm QFN package
The PE64904 is a DuNE-enhanced Digitally Tunable
Capacitor (DTC) based on Peregrines UltraCMOS
technology. DTC products provide a monolithically
integrated impedance tuning solution for demanding RF
applications.

The PE64904 offers high RF power handling and
ruggedness, while meeting challenging harmonic and
linearity requirements.

This highly versatile product can be used in series or shunt
configurations to support a wide variety of tuning circuit
topologies.

The device is controlled through the widely supported
3-wire (SPI compatible) interface. All decoding and biasing
is integrated on-chip and no external bypassing or filtering
components are required.

Peregrines DuNE technology enables excellent linearity
and exceptional harmonic performance. DuNE devices
deliver performance superior to GaAs devices with the
economy and integration of conventional CMOS.
For full datasheet, please visit dtc.psemi.com.

Product Description
71-0066-01
Product Brief
PE64904
Page 2 of 4
2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0358-03 UltraCMOS RFIC Solutions
Visit dtc.psemi.com for full version of datasheet
Table 1. Electrical Specifications @ 25 C, V
DD
= 2.6V
Parameter Configuration Condition Min Typ Max Unit
Operating Frequency Range Both 100 3000 MHz
Minimum Capacitance
Series
Shunt
State = 00000, 100 MHz (RF+ to RF-)
State = 00000, 100 MHz (RF+ to Grounded RF-)
0.49
0.99
0.60
1.10
0.71
1.21
pF
Maximum Capacitance
Series
Shunt
State = 11111, 100 MHz (RF+ to RF-)
State = 11111, 100 MHz (RF+ to Grounded RF-)
4.09
4.59
4.60
5.10
5.11
5.61
pF
Parasitic Capacitance Series All States, 100 MHz (RF+ to GND, RF- to GND) 0.5 pF
Tuning Ratio
Series
Shunt
100 MHz
100 MHz

7.7:1
4.6:1

Step Size Both 5 bits (32 states), constant step size (100 MHz) 0.129 pF
Equivalent Series Resistance Series
State = 00000
State = 11111

1.40
1.33

Quality Factor (C
min
)

Shunt 1GHz 35
Quality Factor (C
max
)

Shunt 1GHz 25
Harmonics (2fo)
Series
100 MHz - 3 GHz -36 dBm
Harmonics (3fo) 100 MHz - 3 GHz -36 dBm
Pin # Pin Name Description
1 RF- Negative RF Port
1

2 RF- Negative RF Port
1

3 DGND Ground
4 V
DD
Power supply pin
5 SCL Serial interface Clock input
6 SEN Serial Interface Latch Enable Input
7 SDA Serial interface Data input
8 RF+ Positive RF Port
1

9 RF+ Positive RF Port
1

10 GND RF Ground
Table 3. Operating Ranges
Parameter Min Typ Max Units
V
DD
Supply Voltage 2.3 2.6 3.6 V
I
DD
Power Supply Current
(V
DD
= 2.75V)
140 A
V
IH
Control Voltage High 1.2 1.8 3.6 V
V
IL
Control Voltage Low 0 0 0.57 V
Peak Operating RF Voltage @100 MHz
1

RF+ to RF-
RF+ and/or RF- to Ground


30
30

Vpk
Vpk
T
OP
Operating Temperature Range -40 +85 C
T
ST
Storage Temperature Range -65 +150 C
Figure 3. Pin Configuration (Top View)
Table 2. Pin Descriptions
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted
to the limits in the Operating Ranges table.
Operation between operating range maximum and
absolute maximum for extended periods may reduce
reliability.
Table 4. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
V
DD
Power supply voltage -0.3 4.0 V
V
I
Voltage on any DC input -0.3 4.0 V
V
ESD

ESD Voltage (HBM, MIL_STD
883 Method 3015.7)
1500 V
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE64904 in the 10-lead 2 x 2 x 0.45 mm QFN
package is MSL1.
Note: 1. De-rated over frequency
Note: 1. Pins 1-2 and 8-9 must be tied together on PCB for optimal performance
Product Brief
PE64904
Page 3 of 4
Document No. 70-0358-03 www.psemi.com 2011 Peregrine Semiconductor Corp. All rights reserved.
Visit dtc.psemi.com for full version of datasheet
Figure 5. Marking Specifications



PPZZ
YWW
Marking Spec
Symbol
Package
Marking
Definition
PP CG Part number marking for PE64904
ZZ 00-99 Last two digits of lot code
Y 0-9
Last digit of year, starting from 2009
(0 for 2010, 1 for 2011, etc)
WW 01-53 Work week

Figure 4. Package Drawing
10L 2 x 2 x 0.45 mm
Product Brief
PE64904
Page 4 of 4
2011 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0358-03 UltraCMOS RFIC Solutions
Visit dtc.psemi.com for full version of datasheet
Figure 6. Tape and Reel Specifications
10L 2 x 2 x 0.45 mm
Tape Feed Direction
Device Orientation in Tape
Top of
Device
Pin 1
Table 5. Ordering Information
Order Code Package Description Shipping Method
PE64904MLBA-Z 10-lead QFN 2 x 2 x 0.45 mm Package Part in Tape and Reel 3000 units/T&R
EK64904-12 Evaluation Kit Evaluation Kit 1 Set/Box
Advance Information: The product is in a formative or design stage. The datasheet contains
design target specifications for product development. Specifications and features may change
in any manner without notice. Preliminary Specification: The datasheet contains preliminary
data. Additional data may be added at a later date. Peregrine reserves the right to change
specifications at any time without notice in order to supply the best possible product. Product
Specification: The datasheet contains final data. In the event Peregrine decides to change the
specifications, Peregrine will notify customers of the intended changes by issuing a CNF
(Customer Notification Form).
The information in this datasheet is believed to be reliable. However, Peregrine assumes no
liability for the use of this information. Use shall be entirely at the users own risk.
No patent rights or licenses to any circuits described in this datasheet are implied or granted to any
third party.
Peregrines products are not designed or intended for use in devices or systems intended for surgical
implant, or in other applications intended to support or sustain life, or in any application in which the
failure of the Peregrine product could create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including consequential or incidental damages, arising out
of the use of its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP, MultiSwitch
and DuNE are trademarks of Peregrine Semiconductor Corp. All other trademarks mentioned herein
are the property of their respective companies.
Sales Contact and Information
For sales and contact information please visit www.psemi.com.