RTU3B-3

A 6th Order 1.6 to 3.2GHz Tunable Low-Pass Linear Phase

gm-C Filter for Fiber Optic Adaptive EDC Receivers

Dalius Baranauskas1, Denis Zelenin1, Matthias Bussmann2, Salam Elahmadi2,

Jomo Edwards2, Chris Gill2, Kelvin Tran2, Lloyd Linder2, Harry Tan2
1
Pacific Microchip Corp., Los Angeles, California 90045, USA
2
Menara Networks, Irvine, California 92612, USA

Abstract — A 6th order low-pass 1.6 to 3.2GHz gm-C II. ARCHITECTURE

filter for fiber optic adaptive EDC receivers cascades three
Bi-Quads permitting reduction of group delay variation The proposed 6th order CTF cascades three
down to 10ps. Cut-off frequency is tuned by switching biquads (Fig. 2). Biquads are implemented as fully
CMOS varactors polarity. THD is below -40dB at 0.9Vpp-diff differential circuits in order to increase PSRR/CMRR. The
output. CTF is implemented in a 0.18μm SiGe process, it low pass frequency response with the linear phase is
occupies 0.17mm2 and consumes 0.3W from 3.3V supply.
achieved by setting gm of OTA1 equal to gm of OTA3 and
Index Terms — Continuous time filters, Tunable filters, 3.1 times larger than gm of OTA2. OTA3 response is
High-speed integrated circuits, Optical fiber dispersion equivalent to resistance equal to 1/gm. Despite the
possibility of power saving, the replacement of OTA3 by a
I. INTRODUCTION resistor would lead to the increase in CTF parameter
variation over process corners.
A Continuous Time Filter (CTF) is a critical block in
many wire-line, wireless and recently fiber optic systems
[1-3]. An analog implementation of Electrical Dispersion
Compensation (EDC) in Adaptive Fiber Optic receivers
requires a low pass 4-6 order 1.8 to 2.5GHz bandwidth
range CTF featuring linear phase (Fig. 1).

Fig. 2. Block diagram of 6th Order CTF consisting of 3

biquads and the implementation of a differential biquad.
Fig. 1. Block diagram of an analog EDC.

Higher order GHz range filters are currently When the cut-off frequency is approached, group delay
limited to LC based implementation [4, 5]. gm-C, also of a single biquad rolls-off steeper compared to the S21.
known as OTA-C - is one of the most popular active filter Cascading of three biquads reduces the CTF’s cut-off
techniques offering the tuning ability and occupying small frequency 3 times; however, it significantly improves
on-chip area. However, this technique is normally used in the group delay variation approaching CTF’s cut-off
the MHz range [6, 7]. We are presenting a small form frequency. 3.2GHz CTF cut-off frequency requires the
factor, the gm-C based CTF with tunable from 1.6 to biquad’s cut-off frequency to be at about 5.5GHz. Inter-
3.2GHz cut-off frequency, a linear phase response and a stage voltage-to-current (V2I) converters have set their gm
wide dynamic range. same as gm of OTA2 in order for the biquad to have 0dB

978-1-4244-3376-6/978-1-4244-3378-0/09/$25.00 © 2009 IEEE 495 2009 IEEE Radio Frequency Integrated Circuits Symposium
DC gain. This ensures the biquads are operating at the group delay. There are several methods that require
same signal level to enable simpler cascading. C1 resistors for the purpose of increasing the dynamic range
connection node is loaded by one OTA input while C2 is of a diff-pair. It leads, however, to gm varying over
loaded by three OTA inputs causing the capacitance ratio process corners resulting from resistance variation. A
(ideally 1:1) variation over process corners and cross connected rationed as 1:5 diff-pair in our application
temperature. Offset circuits (implemented as emitter is found to produce the best linearity (Fig. 3).
followers) provide higher voltage for OTA transistor Both C and gm are applied in the CTF for the tuning of
collectors and help isolating OTA’s parasitic loading. cut-off frequency ωc=gm/C. A 3 bit plus “sign” binary
Residual loading mismatch is compensated by a circuit coded DAC is programming gm (Fig. 4). The current for
represented by Qc. OTA bias currents IBIAS1 and IBIAS2 are OTAs is derived as 5·(VPTAT/REXT)−2·(VPTAT/RINT), where
generated by a circuit that sets the average output voltage REXT and RINT are respectively external and internal
at VBIAS. CTF buffers are designed in such a way as to resistors. PTAT reference compensates temperature
have their cut-off frequencies exceeding those of biquads dependency at the same time REXT makes gm insensitive to
in order to minimize the impact on the CTF’s on-chip resistance. The remaining secondary effect of on-
performance. The CTF input V2I converter is based on the chip resistance on the cut-off frequency is compensated by
Cherry-Hooper amplifier (Fig. 3) featuring linearity as subtracting the part of the current set by RINT. The
well as high speed. resulting current in OTAs is slightly increasing when the
internal resistance increases. We limit the current variation
by the DAC to a relatively small +/-25% range since gm
tuning also results in the change of linearity, biasing
points and dynamics of OTAs. For this reason,
capacitance programming is the preferred method for the
tuning of the cut-off frequency. MIM or CMOS capacitors
connected in series with CMOS switches is a commonly
used method. The combination of the capacitance with the
resistance of the switch in ON and OFF states deteriorates
a capacitor’s Q and produces unwanted time constants.
We are proposing to use CMOS varactors instead of
switched capacitors. The back side of the varactor is
switched between 1.25V and -1.25V bias with respect to
the gate. It changes the capacitance by about 3 times
according to Fig. 4 (based on actual data provided by the
vendor for +/- 3σ process corners). Most importantly, the
back side connection point of the varactors is a virtual
ground in a differential circuit. The parasitics introduced
Fig. 3. CTF input and output buffers, a linearized gm cell and
the comparison of gm linearization methods.
to this point by the switches have negligible effect on the
CTF’s performance. The biasing points are set on the flat
portions of C(V) diagram in order to minimize the
Output current is delivered by the diff-pair (Q7, Q8), capacitance modulation by the signal. Varactor backside
which replicates Q3, Q4 as well as V2I converters used can be switched between VCC and 2·VBIAS while the gate
between biquads. The CTF output I2V buffer is based on remains at VBIAS (Fig. 4). Varactors are scaled as 1:2:4:8
the same Cherry-Hooper configuration. Load resistor RL is and are combined into a 4 bit DAC (Fig. 4). The
split to pull up the amplifier input bias voltage in order for implementation of the dual cut-off frequency control
the last V2I buffer collector’s voltage to be the same as the allows the use of gm tuning (considering its impact on
collector voltage of the other V2I buffers. other CTF parameters) for fine adjustment only.
The requirement of high frequency at reasonable power
limits OTA’s architecture to the simplest diff-pair and
III. IMPLEMENTATION
rules out the possibility of the application of CMOS
transistors. The increase of SNR requires the CTF’s ability A 0.18µm SiGe process is used for the CTF
to work with as large signals as possible. The increase of implementation. The die size is 3.2 x 3.7mm2 (Fig. 5) with
signal levels causes gm degradation resulting in the CTF occupying only 0.17mm2. The test chip is wire-
compression as well as changing of CTF bandwidth and bonded in a custom solder bumped package. Before being

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Fig. 4. Schematic of the gm tuning DAC, varactor capacitance dependence on bias and swing, the biasing circuit and the varactor
tuning DAC.

delivered to the CTF, the signal on the test chip is distance to a 50Ohm terminated linear output buffer
normalized and has its offset corrected by a VGA. The driving output pads through 50Ohm coplanar transmission
CTF output signal is buffered and delivered over 1mm lines. SPI is used for the test chip configuration and tuning
of CTF bandwidth. The rest of the chip area is used for
other functions (beyond the scope of the current
presentation) as well as for biasing blocks and power-
supply bypassing capacitors.

IV. CONCLUSION
CTF bandwidth programming range using varactor
DAC shows the possibility of covering 1.6 to 3.2GHz
range (Fig. 6). The feasibility of covering the frequency
range from 1.8GHz to 2.5GHz without using gm tuning is
also shown. The group delay change is less than 10ps in
the frequency range from 0.3GHz up-to cut-off frequency
point. The remaining group delay variation with frequency
is small enough not to cause any significant visual
distortion when comparing ideal, simulated and measured
eyes at the CTF output (applied 10Gb/s NRZ data to the
Fig. 5. CTF test chip photo showing the main blocks and CTF
output response for 10Gb/s NRZ input data: simulated ideal input) (Fig. 5). Measured THD at 900mVpp-diff output
filter (top), simulated schematics (middle), measured (bottom). (250mVpp-diff input) voltage is below -40dB. Power

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Fig. 6. Measured bandwidth over varactor DAC code, normalized transfer characteristics for 3 values of varactor DAC code and the
group delay.

dissipation is 300mW (the output buffer is not included). ACKNOWLEDGEMENT

The CTF transfer characteristics simulated for different Authors would like to thank everyone at Menara
process corners (used +/- 3σ process corner combinations) Networks for help and support during the CTF testing.
are shown in Fig. 7. Measured data points are overlapped
on critical areas of the graph. They closely match the
simulations (multiple devices were measured to obtain the REFERENCES
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