04 Nonideal Transformer PDF
04 Nonideal Transformer PDF
04 Nonideal Transformer PDF
(1) r
N i Ni
R core N p i p N s i s p p s s
R core
d d N p i p Nsis
vp N p Np
dt dt R core
N 2p d N s
i p is
R core dt N p
Non-Ideal Transformer (2)
N 2p d N
vp ip s
is
R core dt N p
N p2
Define: L M Magnetizing inductance, very large
R core
Ns
iM ip is Magnetizing current
Np
di M
v p LM
dt
Non-Ideal Transformer (3)
d p
Primary: vp N p
dt
p M lp
N i Ni N 2p
M p p s s Llp
R core R lp
Non-Ideal Transformer (4)
d M d lp
vP N p Np
dt dt
d N pip Nsis d Npip
Np N p
dt Rcore dt Rlp N p2
Llp
N 2p d N sis N p di p
2 Rlp
i p
Rcore dt N p Rlp dt
diM dip di p
LM Llp v ' p Llp
dt dt dt
Secondary:
s M ls
Nsis
d s d M d ls di ls
vs N s Ns Ns v 's L ls s R ls
dt dt dt dt N s2
Lls
Rls
Non-Ideal Transformer (5)
Ns di
di p is Lls
ip Llp Np is
dt s
Llp LM Ldt
ls
v' p Np
vp v' s
iM Ns vs
dis Ns
vs v's Lls iM i p is
dt Np
Non-Ideal Transformer (6)
Hysteresis loss :
(No consideration on leakage,
eddy current loss and copper loss)
1 T T
Physterisis
T 0
v p (t)i p (t)dt 0 v s (t)i s (t)dt
1 T d(t)
is (t)dt
T d(t)
Np i p (t)dt N s
T 0 dt 0 dt
1 T d 1
(N p ip N s is ) dt (Rcore )d
T 0 dt T
1 area of the
(HlC )d (BAc ) ( AC lC ) HdB hysterisis loop
T
f
volume of the core
N
X M LM , X p Llp , X s Lls , n p
Ns
Rigorous Equivalent Circuit Model (2)
Primary side model:
Most Popular
Approximate Equivalent Circuit Model (2)
Or:
Transformer Efficiency
Pout 100%
Pin
Pin Pout Ploss
Ploss PCopper PCore PCopper PEddy PHysterisis
Pout Vs I s cosload Re(VsI*s)
P V I cos Re(V I* )
in p p p p p
Open Circuit and
Short Circuit Tests
Open Circuit Test (1)
Open
VOC I OC POC
VSC ISC PSC
PSC V S C I S C cos SC
PSC
SC cos 1
lagging (inductive)
VSCISC
V
Z SC SC exp( j SC ) Req jX eq
I SC
Req real(Z S C ), X eq imag(Z S C )
Example 2 (1)
The open circuit test and short circuit test of a 20 kVA, 8000/240 V, 60 Hz
transformer were performed on the primary side (measurement on primary side) .
The test date are give below:
Procedure is in trans2.m.