Te000 Ab GTP 010 - R1 CHG A PDF
Te000 Ab GTP 010 - R1 CHG A PDF
Te000 Ab GTP 010 - R1 CHG A PDF
March 1991
Foreword
The reliability achieved by military electronic systems and equipments is highly dependent on
proper selection and application of the electrical and electronics parts used therein. Chapter I of
this document provides requirements for three basic elements of a parts reliability program
consisting of: (1) parts derating, (2) part quality, and (3) design for long life. Chapter II contains
derating curves and part selection and application information on the ten most commonly used
electrical and electronic parts. Appendices provide information on electrical subjects of interest
relating to parts application and reliability.
Rapid advances in technology of electronic part and device engineering may cause some of the
information contained herein to become outdated. This is especially true of the information
contained in sections 100 through 1000 of this document where new military specifications or
revisions of those existing are constantly being generated for new parts and new part types. In
view of the above, contract and military specifications and standards with their latest applicable
revisions should be consulted for selections and applications of parts on a specific contract. In
addition, this document will be updated annually in order to reflect the latest available
information.
Commanding Officer
Naval Publications and Forms Center
5801 Tabor Avenue
Philadelphia, PA 19120-5099
and
Commanding Officer
Naval Weapons Station, Seal Beach
Naval Warfare Assessment Center
Code 383
Corona, CA 91720-5000
Listing of Subjects
Chapter I: Requirements
Application
Parts Selection
Derating
Design for long life
Resistors
Capacitors
Discrete semiconductors
Microcircuits
Connectors
Relays
Crystals
Switches
Filters
Magnetic devices
Many equipment item failures are precipitated by stress. When applied stress exceeds the
inherent strength of the part, either a serious parametric degradation or a failure will occur. To
assure reliability, equipment must be designed to endure stress over time without failure.
Parameters which stress a design must be identified and controlled. Parts and materials must be
selected which can withstand these stresses. Derating is the selection and application of parts
and materials so that applied stress is less than rated for a specific application. The derating
criteria in this manual have been developed to provide designers the greatest flexibility possible
in applying parts and materials compatible with the need for readiness.
Next Section
Previous Section
Some crystal units, especially tight tolerance units, are found to be susceptible to electrostatic
discharge (ESD) in the static voltage range of 4,000 to 15,000 volts. Surface acoustic wave
(SAW) devices are susceptable to ESD damage, induced by static voltages less than 1,000 volts.
ESD damage often results in operational degradation rather than catastrophic failure. These units
shall be handled according to the requirements of MIL-STD-1686 and DOD-HDBK-263.
The specified maximum and minimum parameters of the crystal units are limiting factors beyond
which the reliability of the crystal unit will be impaired. The designer shall assure that the
crystal unit will be operated under conditions that are within the limits specified for the particular
unit type required. The principal derating parameter in most applications is Drive Voltage;
derate to 50% rated value, or absolute value indicated.
Next Section
Previous Section
100 Resistors
Standard resistors are specified in MIL-STD-199. MIL-STD-199 is the key overall standard for
resistor selection; although this standard addresses only selected standard resistors, it should be
used to the greatest extent possible. It presents detailed data for use in the design of military
equipment. Data is presented on terminology, resistor selection, environmental effects on
characteristics and life, applications, application data, failure rates, and aging.
Resistors are functionally classified as fixed and variable (adjustable). Resistor construction is of
three general types: composition, film, or wirewound. They basically consist of a resistive
element mounted on a base or substrate, an environmental protective coating, and external
electrical leads. Composition resistors are made from a mixture of resistive material and a
binder, and are molded into a predetermined shape with a specific resistance value. Film
resistors are made from a thin resistive film deposited inside or outside an insulating cylinder or
filament on which a screw-thread pattern (sometimes called spiral-cut or helix-cut) is scribed to
create a thin narrow strip or track of resistive material between the ends of the ceramic or glass
substrate. A wirewound resistor is made from resistive wire, wound on an insulative body.
These three basic types differ in inherent reliability, size, cost, resistance range, power rating,
and general characteristics. No one type has all the best characteristics. Many factors must be
considered when choosing among them.
The most important resistor parameters are ohmic value, power handling capacity and tolerance.
The power handling capacity normally determines the physical size of the resistor. For example,
if an application requires more than one watt, a two watt power wirewound resistor will be the
likely choice. If the tolerance needed is + 2 percent or tighter, the resistor should inevitably be a
precision wirewound or film resistor. However, resistor selection depends on specific
application and derating program requirements. Some examples:
a. In the design of audio signal voltage amplifiers, circuit operational noise is a significant
design parameter; an optimal choice for low-noise resistive circuit elements would be
metal film resistors. However, cost considerations may place constraints on the
component selection process, mandating use of carbon composition resistors as the circuit
element choice.
The selection of resistor type can be seen as a function of the particular application, cost
considerations, program requirements, etc. The purpose of this section is to provide
guidelines in choosing the right type for the overall application.
Some of the principal applications for different types of resistors are given in Table 100.1
Some of the typical performance characteristics of different types of resistors can be found in
Table 100.2.
Commercial grade, military grade, and military Established Reliability (ER) grade resistors
are physically and functionally identical with the exception of failure rate levels. These
failure rate levels can vary by orders of magnitude. Whenever possible, an ER resistor,
failure rate level of R or higher reliability, should be used. Figure 100.1 is a comparison of
the predicted part operating failure rates for established reliability resistors. The part
operating failure rates shown are derived from the part operating failure rate models in
MIL-HDBK-217D. The part operating failure rates are representative of a given military
environmental condition and are not necessarily in the same proportion for other
environments or operating conditions.
Resistor mounting plays a critical role in resistor reliability. The mounting determines how
thermal stress, shock, and vibration are transmitted from the environment to the resistor.
Mounting guidelines are presented below.
a. Large resistors should be provided with an adequate means for mounting other than the
leads. In the presence of vibration or shock, lead failure can occur, and the larger the mass
supported by the leads, the more likely leads will fatigue. Even when vibration or shock is
not a serious problem, ease of assembly and replaceability considerations suggest that large
components be individually mounted. Resistors should be mounted such that the body of
the resistor is restrained from movement relative to the mounting base. Bolt-down
provisions, plastic ties, metal or plastic clips, or adhesives may be used to secure resistors
to the mount base. Also, the heat transfer qualities of the resistor can be enhanced or
diminished dependent on clamping heat conduction properties.
b. Maintain lead lengths to a minimum. Leads transfer heat to Printed Circuit Boards (PCB)
or other mounting provisions, which act as a heat sink.
c. Where temperature variations are present, leads should be offset bent slightly to allow for
thermal contraction and expansion (thermal stress relief).
d. Close tolerance and low-value resistors require special precautions (i.e., short leads and
good soldering techniques). The resistance of the leads and the wiring, and a poor solder
joint can cause slight (yet significant) changes to the resistance.
e. Special precautions should be taken when resistors are mounted in rows or banks. They
should be spaced so no resistor in the row or bank exceeds its maximum permissible
hot-spot temperature. Heat dissipation of nearby resistors and restricted ventilation must
be taken into account. An appropriate combination of resistor spacing and resistor power
rating should be used.
Fixed, wire- wound, MIL-R-26 Use where large power dissipation isrequired
power type and where AC performance is relatively
unimportant (i.e., when used as voltage
divider, bleeder resistors in DC power
supplies, or series dropping). They are
generally satisfactory for use at frequencies
up to 20 kHz even though the AC
characteristics are not controlled. Neither
the wattage rating nor the rated continuous
working voltage may be exceeded
Fixed, wire- wound, MIL-R-18546 Use where power tolerance and relatively
power type, large power dissipation is required for a
given unit size and where AC performance is
non-critical (i.e., voltage divider, bleeder
resistors in DC power supplies, or series
dropping circuits).
Fixed, Established
Reliability
Fixed, wire- wound, MIL-R-39005 Use in circuits requiring higher stability than
accurate provided by composition or film resistors,
and where AC frequency performance is not
critical. Operation is satisfactory from DC to
50 kHz.
Fixed, wire- wound, MIL-R-39007 Use where power tolerance and relatively
power larger power dissipation is required for a
given type unit size than is provided by
MIL-R-26 resistors, and where AC
performance is noncritical (i.e., voltage
divider, bleeder resistors in DC power
supplies, or series-dropping circuits).
Fixed, wire- wound, MIL-R-39009 Use where power tolerance and relatively
power type, chassis large power dissipation is required for a
mounted given unit size and where AC performance
in noncritical (i.e., voltage divider, bleeder
resistors in DC power supplies, or
series-dropping circuits).
Fixed, film, chip MIL-R-55342 Use these chip resistors in thin or thick film
hybrid circuitry where micro circuitry is
indicated.
Variable
Variable Established
Reliability
Special
Resistance Range 2.7 ohm 10 ohm 10 ohm to3 0.1 ohm to150 0.1 ohm to273
to100 to25 M-ohm k-ohm k-ohm
M-ohm M-ohm
1. Temporary resistance change from nominal value at 25C when resistor is brought to
105C.
*Establishment of Ratios:
f. For resistors mounted in series, consider the heat being conducted through the leads to the
next resistor.
g. Large power resistors should be mounted to the metal chassis for heat dissipation.
h. Do not mount resistors with power dissipation 1 Watt directly on terminal or printed
wiring boards without use of heat sinks. A resistor that dissipates over one watt can
damage a terminal board. A damaged board will have a lower insulation resistance.
i. For the most efficient operation and even heat distribution, power resistors should be
mounted in a horizontal position.
k. Select mounting materials that will not damage, and design mounts that will withstand
strain due to thermal expansion and contraction.
m. Assembly techniques can affect resistor reliability. Resistors should never be overheated
by excessive soldering-iron heat, and the resistor leads should not be abraded by assembly
tools. Normal soldering practice should include heat sinking so that the resistor will not be
physically damaged or its resistance value changed by the soldering operation.
Inadequate heat dissipation is the predominant cause of failure for any resistor type. Figure
100.2 portrays heat dissipation from fixed resistors in free air. The lowest possible resistor
surface temperature should be maintained using radiation, conduction, and convection as much
as possible. Under normal atmospheric conditions (25C, 30 in. Hg), resistors up to 2 watts
dissipate heat in the following proportions: 10 percent radiation, 40 percent convection, and 50
percent conduction through leads. Resistors with substantially larger wattage ratings, by virtue
of increased surface area, dissipate heat in proportions of: 50 percent radiation, 25 percent
convection and 25 percent conduction through leads.
Figure 100.2 -- Heat Dissipation of Resistors Under Room Conditions
Thermal dissipation considerations for the three methods of heat transfer are:
a. Radiation considerations:
(1) Maximize spacing between resistors that generate large amounts of heat. This will
reduce cross-radiation heating effects.
(2) Place resistors so that any adjacent large metallic areas can absorb significant
amounts of radiated heat.
(3) Use vented or similar types of body clamps on larger size resistors.
b. Conduction considerations:
(2) Terminate resistor leads at tiepoints and leave in mass to act as heat sinks.
(3) Mount large size resistors with body clamps to large metallic masses (such as the
chassis).
c. Convection considerations:
(1) Reduce resistance to air flow by maximizing spacing between resistors that generate
large amounts of heat.
(2) Orient resistors properly and provide baffles where needed for exposure to air flow.
Power dissipation per unit of resistor area is specified in MIL-STD-199. The surface
temperature rise of specific resistor types can usually be obtained from vendor resistor
specifications.
For physical form and preferred resistance values of each resistor style, see MIL-STD-199 or the
appropriate resistor detailed military specification.
The use of variable resistors is not preferred for high reliability applications. These resistors are
not hermetically sealed. Therefore, their performance can degrade due to the ingestion of
soldering flux, cleaning solvents, and conformal coatings during production. Variable resistors
also contain moving parts that wear with use. The reliability of variable resistors is lower than
fixed resistors. In the event that variable resistors must be used, the following precautions
should be followed:
a. Enclosed units should be used to keep out as much dust and dirt as possible and to protect
the mechanism from mechanical damage. Also lubrication oil can cause dust or wear
particles to concentrate within the unit.
b. Provide some method of preventing undesired movement of the wiper arm during vibration
and shock. For resistors not in continuous use, the short locked shaft with a slotted end is
preferred. For continuous use, the high torque shaft is preferred. If it is absolutely
necessary to have a long shaft, a coupled extension is preferred to one long integral shaft.
Regardless of the type of shaft, oversize control knobs which permit high rotational torque
will generally result in damage to the integral stop. Use the smallest size knob to reduce
applied torque.
c. When a variable linear resistor is being used as a voltage divider, the output voltage
through the wiper will not vary linearly if current is being drawn through it. This
characteristic is called loading error. To reduce the loading error, the load resistance
should be at least 10 to 100 times greater than the end-to-end potentiometer resistance.
d. Both the load current as well as the bleeder current will be flowing through a part of the
resistor. It is useful to remember that both will contribute to the heating effect.
Composition resistors are small, inexpensive, and have good reliability when properly used.
Their liabilities are: poor resistance stability, high noise characteristics, and appreciable voltage
and temperature coefficients. They do, however, have good high-frequency characteristics
although this characteristic is not controlled by specification. Other application considerations
include:
(1) Surface moisture can result in leakage paths which will lower resistance, or
(2) absorption of moisture into the element may increase resistance as well as to allow
the transport of ions and/or chemicals which may degrade reliability. These
phenomena are more noticeable in higher resistance ranges. Resistance values can
change by up to 15 percent if the resistor is exposed to humid atmosphere or
operated at low power levels. Resistance may also change during shelf storage,
shipping, or if the equipment is not operated for long periods of time.
d. Avoid using these resistors in low power level high resistance (1 M-ohm or more) circuits.
Thermal agitation (Johnson noise) and resistance fluctuations (carbon noise), present only
during current flow, are characteristic of this type of resistor. The expected noise level is
about 3 to 10 mV/V. A film or wirewound resistor will usually provide lower noise levels.
e. When used in high frequency circuits (1 MHz and above), the effective resistance will
decrease as a result of dielectric losses and shunt capacitance (both end-to-end and
distributed capacitance to mounting surface). High frequency characteristics are not
controlled by specification and hence are subject to change without notice.
f. Care should be taken in soldering resistors. Several properties may be seriously affected
by excess heat. The length of lead left between the resistor body and the soldered point
should not be less than 1/4 inch. Heat-dissipating clamps should be used, if necessary,
when soldering resistors in close quarters. In general, if it is necessary to unsolder a
resistor, discard the old resistor and use a new one.
g. Fixed composition resistors exhibit little change in effective DC resistance up to 100 kHz.
Resistance values above .3 megohms start to decrease in resistance at approximately 100
kHz. Above a frequency of 1 MHz, all resistance values exhibit decreased resistance.
However, the resistor operates as a pure resistance free from a reactive component into the
MHz region.
h. Nominal minimum resistance tolerances available for fixed composition resistors are + 5
percent. Combined effects of climate and operation on unsealed types can raise this
tolerance to + 15 percent. These effects include aging, pressure, temperature, humidity,
and voltage gradient.
i. Composition elements of variable resistors can wear away after extended use, leaving
particles of the element to permeate the mechanism. This can result in warmer operation
and high resistance shorts within the variable resistor.
j. These variable resistors should not be used at potentials to ground or case greater than 500
volts peak, unless supplementary insulation is provided.
a. Film-type resistors have the best high-frequency performance of all resistor types. The
effective DC resistance for most resistance values remains fairly constant up to 100 MHz
and decreases at higher frequencies. In general, the higher the resistance value the greater
the effect of frequency.
b. Some lower power, tighter tolerance film resistors are quite susceptible to electrostatic
damage (see MIL-STD-1686 and DOD-HDBK-263).
c. Film resistors are recommended where high stability and close tolerance resistance is
required. Their resistance value can be accurately maintained over a broad range of
temperatures and for long periods of time. Regardless of the purchase tolerance
(nominally + 1 percent or less), the design should be able to tolerate a + 2 percent shift in
resistance to assure long life reliability in military applications.
d. Operation at radio frequencies above 100 MHz can produce inductive effects on spiral-cut
types; skin inductive effects, however, are negligible.
e. The resistance-temperature characteristic of film resistors is fairly low (+ 500 PPM/C and
+ 200 PPM/C) for thick film (RLR), and very low ( 25 PPM/C) for metal film types
(RNR). Metal film resistors can experience temporary or permanent changes in resistance
when operating in the presence of extreme temperatures.
f. Film resistors are capable of tight tolerance and high stability. Minimum resistance
tolerance available is 0.1 percent.
g. Exposure to moisture can seriously affect this type of resistor if not protected by molded or
ceramic casing or internal deposition of the resistance element.
h. Carbon-film resistance elements are susceptible to physical damage, hermetic seals are
preferred for film-type resistors.
I. The noise level of variable film resistors is quite low compared to variable composition
resistors.
j. The resistance values of variable film resistors are sensitive to shock, acceleration, and
high frequency vibration force. They may vary up to 6 percent. The design should be able
to tolerate a variation in resistance at the contact arm when the shaft is unlocked.
Wirewound resistors are not recommended for use above 50 kHz. Wirewound resistors
usually exhibit an increase in resistance with high frequencies because of skin effect.
b. Applied voltages in excess of the resistor maximum voltage rating can cause insulation
breakdown in the thin coating of insulation between the windings.
c. The use of tapped resistors should be avoided. Tap insertions weakens the resistor
mechanically and lowers the effective power ratings.
d. Moisture may degrade the coating or potting compounds used in these resistors.
e. Wirewound resistors using a plastic or ceramic bobbin are sensitive to mechanical damage
from vibration, shock, and pressure.
f. Due to their size and weight, the bodies of these resistors should be constrained from
movement in high frequency vibration and shock environments.
g. Wirewound power resistors have high stability, a medium temperature coefficient, high
reliability, a negligible voltage coefficient, poor high-frequency characteristics, negligible
noise, and are capable of dissipating considerable heat.
h. Wirewound, accurate resistors are physically large compared to composition types of the
same power rating. They usually exhibit very high stability, negligible voltage coefficient,
and high-frequency characteristics probably good to 50 kHz maximum. Operation above
50 kHz may produce inductive effects and intra-winding capacitive effects.
i. Wirewound resistors are used where high cost and size are not major design constraints
and where the operating environment can be controlled.
j. Wirewound power variable resistors are generally not available with low tolerances. This
is because most wirewound resistor applications do not require accurate resistance.
k. Fixed, wirewound, accurate resistors are physically the largest of all types for a given
resistance and power rating, since they are very conservatively rated.
l. The variable wirewound resistor produces more noise than any other variable resistor.
This is due to the stepping of the contact from wire to wire.
m. Variable wirewound resistors have the lowest temperature coefficient and the most stable
characteristics of any potentiometer.
For high reliability, resistors shall be derated according to the derating requirements specified
herein. The resistor operating temperature range shall be compatible with the equipment
operating temperature. Hermetically sealed resistors should be used in environments where high
relative humidity may be encountered, since exposure to humidity can have two effects on
resistance values. For wirewound and composition high value resistors, surface moisture can
result in lowering resistance, or absorption into the resistive element can increase resistance.
In AC applications the rms (root-mean-square) values of voltage or current are used to determine
the effective power to be used in reliability and derating calculations.
P (Applied)
S =
P (Rated)
100.4 Rating Under Pulsed Conditions and Intermittent Loads.
In those instances in which the resistor is used in circuits where power is drawn intermittently or
in pulses, the actual power dissipated with safety during the pulse can sometimes exceed the
steady state power rating of the resistor.
Resistor heating is determined by the duty factor and the peak power dissipated. The thermal
time constant (the time required for a 63.2 percent delta between initial and final body
temperature) of the resistor must be determined, and pulse power limited to that value which will
not result in a temperature rise greater than allowed by the steady state derating criteria defined
herein. For repetitive pulses, the average power must not exceed the derated limits defined
herein. For short and nonrepetitive pulses, the temperature rises must be calculated.
a. The voltage applied during the pulse must not exceed 70 percent of the dielectric
breakdown voltage rating of the resistor, after derating for the maximum altitude specified
for the equipment operation.
b. The circuit design must preclude a failure that would permit continuous application of
excessive power to the resistor.
c. Components with welded connections can withstand much higher peak currents than those
with pressure connections. Accordingly, peak power applied to film resistors must not
exceed four times the derated value permitted for steady state operation. Carbon
composition resistors, because of the permissible variation in resistor value, can
accommodate greater peak power dissipations than the more stable resistors. Therefore,
peak power dissipation in carbon composition resistors must be limited to a maximum of
30 times the derated value allowed for steady state operation.
101.1.1.1Substitution
Use MIL-R-39007 style RWR resistors instead of MIL-R-26 style RW when feasible.
101.1.1.2Operating Temperature
The maximum operating temperature should be limited to 200C. Above 200C, the resistor is
subject to outgassing of the volatile materials used in the fabrication process.
101.1.2Derating Requirements
a. Steady-state conditions -- Under steady-state power conditions, derate according to the
maximum allowable derating curve for power as shown in Figure 100.3.
b. Pulse condition -- This resistor is not suitable for pulsed circuits (voltage or current pulse
amplifiers, or pulse wave shaping circuitry).
Note: In pulse network applications, use Average Power = (Peak Pulse Power) (Pulse
Repetition Frequency) (Pulse Width) and derate accordingly.
Figure 100.3 -- Derating Requirements for Styles RW29, 31, 33, 35, 37, 38, 47, 56 And RWR78,
80, 81, 82, 84, 89
101.2.1.1 Substitution
Use MIL-R-39009 style RER resistors instead of MIL-R-18546 style RE when feasible.
b. Pulse conditions -- When using this resistor in pulsed circuit applications, the following
two conditions shall be met:
(1) Average power should be less than or equal to the maximum allowable derated
power as shown in Figure 100.4.
(2) Peak voltage should not exceed 70 percent of the dielectric breakdown voltage or the
maximum short-time overload voltage, whichever is less as specified by the
appropriate resistor military specification (MIL-R-18546).
Figure 100.4 -- Derating Requirements for Styles RE77, 80 and RER40, 45, 50, 55, 60, 65, 70,
75
For a resistance greater than 1,000 ohms, values can change with the applied voltage, as follows:
RCR050.05 percent/volt
The voltage coefficient for resistors rated below 1,000 ohms is not controlled by specification.
These resistors should not be used in circuits which are sensitive to this parameter.
b. Pulse conditions -- When using these resistors in pulse circuit applications, the following
conditions shall be met:
(1) The average power shall be less than or equal to the maximum allowable derating
curve for power as shown in Figure 100.5.
Figure 100.5 -- Derating Requirements for Styles RCR05, 07, 20, 32, 42
Note: In pulse network applications, use Average Power = (Peak Pulse Power) (Pulse
Repetition Frequency) (Pulse Width) and derate accordingly.
(2) The peak voltage shall not exceed 70 percent of the dielectric breakdown voltage or
the maximum short-time overload voltage, whichever is less, as specified by the
appropriate resistor military specification (MILR--39008).
When used in high frequency circuits (400 MHz and above), the effective resistance will
decrease as a result of shunt capacitance (both end-to-end and distributed capacitance to
mounting surface). High frequency characteristics of metal film resistors are not controlled by
specification and are subject to change without notice.
102.2.1.2 Noise
a. Steady-state conditions -- When using these resistors under steady-state power conditions,
derate according to the maximum allowable derating curve for power as shown in Figure
100.6.
b. Pulse conditions -- When using these resistors in pulse circuit applications, the following
conditions shall be met:
(1) The average power shall be less than or equal to the maximum allowable derating
curve for power as shown in Figure 100.6.
(2) The peak voltage shall not exceed 70 percent of the dielectric breakdown voltage or
the maximum short-time overload voltage, whichever is less as specified by the
appropriate resistor military specification (MIL-R-55182).
Note: In pulse network applications, use Average Power = (Peak Pulse Power) (Pulse
Repetition Frequency) (Pulse Width) and derate accordingly.
Figure 100.6 -- Derating Requirements for Styles RNR50, 55, 60, 65, 70, 75 and RNC90
These resistors are intended for use where extremely close tolerances (+ 1 percent to + 0.01
percent), long life, and high temperature stability is required.
b. Pulse conditions -- When using these resistors in pulse circuit applications, the following
conditions shall be met:
(1) The average power shall be less than or equal to the maximum allowable derating
curve for power as shown in Figure 100.7.
(2) The peak voltage shall not exceed 70 percent of the dielectric breakdown voltage or
the maximum short-time overload voltage, whichever is less as specified by the
appropriate resistor military specification (MIL-R-39005).
Note: In pulse network applications, use Average Power = (Peak Pulse Power) (Pulse
Repetition Frequency) (Pulse Width) and derate accordingly.
Figure 100.7 -- Derating Requirements for Styles RBR52, 53, 54, 55, 56, 57, 71, 75
These resistors are recommended for use where greater power handling capacity is required. The
RWR resistors are available in very close tolerance (to + 0.1 percent) and have tightly controlled
temperature coefficients (+ 20 PPM/C). Regardless of purchase tolerance, the design should
tolerate a + 1 percent shift in resistance value to assure long life reliability in military
applications.
b. Pulse conditions -- When using these resistors in pulse circuit applications, the following
conditions shall be met:
(1) The average power shall be less than or equal to the maximum allowable derating
curve for power as shown in Figure 100.3.
(2) The peak voltage shall not exceed 70 percent of the dielectric breakdown voltage or
the maximum short-time overload voltage, whichever is less as specified by the
appropriate resistor military specification (MIL-R-39007).
These resistors are recommended for use where very close tolerances are not required, or where
composition type resistors do not provide the needed accuracy or stability. Regardless of the
purchase tolerance (i.e., + 1 percent or + 2 percent), the design should tolerate an additional
+ 5 percent shift in resistance value to assure long life reliability in military applications.
These resistors perform well in high frequency applications (up to about 100 MHz). The
resistance versus frequency characteristics are as shown in Figure 100.8.
102.5.1.3 Noise
b. Pulse conditions -- When using these resistors in pulse circuit applications, the following
conditions shall be met:
(1) The average power shall be less than or equal to the maximum allowable derating
curve for power as shown in Figure 100.9.
(2) The peak voltage shall not exceed 70 percent of the dielectric breakdown voltage or
the maximum short-time overload voltage, whichever is less as specified by the
appropriate resistor military specification (MIL-R-39017).
Note: In pulse network applications, use Average Power = (Peak Pulse Power) (Pulse
Repetition Frequency) (Pulse Width) and derate accordingly.
Figure 100.9 -- Derating Requirements for Styles RLR05, 07, 20, 32
Only one tolerance range (+ 1 percent) is available. The temperature stability is very good (+ 30
ppm/C). The design should tolerate a + 1.5 percent shift in resistance value to assure long life
reliability in military applications.
b. Pulse conditions -- When using these resistors in pulse circuit applications, the following
conditions shall be met:
(1) The average power shall be less than or equal to the maximum allowable derating
curve for power as shown in Figure 100.4.
(2) The peak voltage shall not exceed 70 percent of the dielectric breakdown voltage or
the maximum short-time overload voltage, whichever is less as specified by the
appropriate resistor military specification (MIL-R-39009).
102.6.3 Quality Level
102.7 MIL--R--55342, Resistors, Fixed, Film, Chip, Established Reliability (Style RM)
102.7.1.1 Use
These chip resistors are intended to be used in thin or thick film hybrid circuitry where micro
circuitry is indicated.
102.7.1.2 Mounting
These resistors may be mounted individually on a substrate, usually 95 percent alumina, and
connected to conductor areas by means of solder pre-forms, conductive cement, or wire bonding.
They can also be directly connected to other components on the same substrate by means of wire
bonding, using the substrate as a base or carrier for the resistor.
Stacking of resistors should be avoided, since experience has shown that failure can occur due to
electrolytic action in the bonding adhesive. In the event that packaging considerations do
include stacking, compensation for lower heat dissipation capabilities is required by properly
derating the wattage rating. Stacking of resistors requires procuring activity approval.
Most types of film devices are found to be susceptible to electrostatic discharge (ESD) damage.
b. Pulse conditions -- When using these resistors in pulse circuit applications, the following
conditions shall be met:
(1) The average power shall be less than or equal to the maximum allowable derated
power as shown in Figure 100.10.
(2) The peak voltage shall not exceed 70 percent of the dielectric breakdown voltage or
the maximum short-time overload voltage, whichever is less as specified by the
appropriate resistor military specification (MIL-R-55342).
N Standard
L Locking
S Shaft and Panel Sealing (Standard)
T Shaft and Panel Sealing (Locking)
An average resistance change (R) of 20 percent per year under normal storage conditions is
estimated.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
Caution For styles rv reduce the max allowable derating curve if the entire element is
not used.
Note: For potentiometer applications, it is necessary to consider both load and bleeder
current in determining resistor power dissipation.
The wattage ratings of these resistors are based on operation at 40C, mounted on a 16 gauge
steel plate, 4 inches square. This mounting technique should be taken into consideration when
the wattage is applied during specific applications. For other types of mountings, the ratings
must be properly modified. The wattage rating is applicable when the entire resistance element
is operational in the circuit. When only a portion is engaged, the wattage is derated
proportionately.
103.2.1.2 Linear and Nonlinear Tapers
As shown in Figure 100.12, Taper A is a linear resistance taper, which is one having a constant
change of resistance with angular rotation, while Taper C is a nonlinear resistance taper, which
has a variation in the change of resistance with angular rotation.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
Caution: For styles RA reduce the max allowable derating curve if the entire element is
not used.
Note: For potentiometer applications, it is necessary to consider both load and bleeder
current in determining resistor power dissipation.
Figure 100.13 -- Derating Requirements for Styles RA20, 30
103.3 MIL--R--22, Resistors, Variable, Wirewound (Power Type), (Style RP) (Unenclosed)
The wattage ratings of these resistors are based on operation at 25C, mounted on a 12 inch
square steel panel, .063 inch thick (4 inch square x 0.050 inch for RP05 and RP06). This
mounting technique should be taken into consideration when wattage is dissipated during
specific applications. For other types of mountings, the ratings should be properly modified.
These resistors should not be used at potentials above ground greater than 500 volts (250 volts
for RP05 and RP06) unless supplementary insulation is used.
Care should be taken in specifying the electrical off position when resistors are required to turn
off DC circuits having potentials in excess of 40 volts.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
Caution: for styles rp reduce thenote: operation of these resistors max allowable derating
at ambient temperatures greater curve if the entire than 125C can damage
metal elementis not used. plating, shaft lubrication, insulation, etc., Of resistors.
Note: Operation of these resistors at ambient temperatures greater than 125C can
damage metal plating, shaft lubrication, insulation, etc., of resistors.
Note: For potentiometer applications, it is necessary to consider both load and bleeder
current in determining resistor power dissipation.
Figure 100.14 -- Derating Requirements for Styles RP05, 06, 10, 15, 20, 25, 30
The wattage rating of these resistors is based on operations at 85C, mounted on a 4 inch square,
0.25 inch thick alloy aluminum panel. This mounting technique should be taken into
consideration when wattage is dissipated during specific applications. When other types of
mountings are employed, the wattage ratings should be properly modified.
103.4.1.2 Bushings
N .Standard
L .Locking
S .Shaft and Panel Sealing (Standard)
T .Shaft and Panel Sealing (Locking)
It is recommended that S bushings be used due to longer rotational life.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
Caution: For styles rtr and rjr reduce the max allowable derating curve if the entire
element is not used. See 104.1.1.1 and 104.2.1.4.
Figure 100.15 -- Derating Requirements for Styles RT, RJ, RTR, RJR
The wattage rating of these resistors is based on operation at 85C, mounted on a 4 inch square,
0.050 inch thick, steel panel. This mounting technique should be taken into consideration when
wattage is dissipated during specific applications. When using other types of mountings, the
power rating must be properly modified.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
Caution: For style RK reduce the max allowable derating curve if the entire element is
not used.
103.6.1.1 Substitution
Use of MIL-R-39015 style RTR resistors vice MIL-R-27208 style RT, is preferred.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
103.7.1.1 Substitution
Use of MIL-R-39035 style RJR resistors vice MIL-R-22097 style RJ, is preferred.
These resistors are suitable for rheostat or potentiometer applications, where high precision is not
required. They are capable of withstanding acceleration, shock, high frequency vibration, and
125C operating temperature at rated load. They are most useful in circuitry where high
resistance values and lower power dissipation are encountered in volume control, bias, tone
voltage, and pulse-width circuit applications.
The wattage ratings of these resistors are based on operation at 125C mounted on a 16-gage
steel plate, 4 inch square. This mounting technique should be taken into consideration when
wattage is dissipated during specific applications. When using other types of mountings, the
power ratings should be properly modified.
As shown in Figure 100.17, Taper A is a linear resistance taper, which is one having a constant
change of resistance with angular rotation, while Taper C is a nonlinear resistance taper.
b. Pulse circuit application -- This resistor is suitable for pulse circuits in which applied
voltage is limited to values that will not cause the derated power dissipation to be
exceeded.
Caution: For style RV reduce the max allowable derating curve if the entire element is
not used.
Note: For potentiometer applications, it is necessary to consider both load and bleeder
current in determining resistor power dissipation.
103.9.1.1 Output
The output of these resistors (in terms of percent of applied voltage) is linear with respect to the
angular position of the operating shaft.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
Caution: For style RQ reduce the max allowable derating curve if the entire element is
not used.
Figure 100.19 -- Derating Requirements for Styles RQ100, 110, 150, 160, 200, 210, 300 and
RQ090
The wattage ratings of these resistors are based on operation at 85C when mounted on a 1/16
inch thick, glass base, epoxy laminate. Therefore, the heat sink effect as provided by steel test
plates in other specifications is not present. The wattage rating is applicable when the entire
resistance element is imbedded and operational in the circuit. When only a portion is engaged,
the wattage is reduced directly in the same proportion as the resistance.
104.1.1.2 Mounting
Resistors with terminal Type L should not be mounted by their flexible wire leads. Mounting
hardware should be used. Printed-circuit types are frequently terminal mounted, although
brackets may be necessary for high-shock and vibration environments.
Special care should be taken when using these resistors in highly humid conditions, to avoid
turn-to-turn shorts. It is advisable to avoid the use of these resistors in high humidity
environments.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
104.2.1.1 Tolerance
These resistors have a resistance tolerance of + 10 percent. Regardless of the purchase tolerance,
the design should be such as to tolerate a + 10 percent shift in resistance value to assure long life
reliability in military applications.
104.2.1.2 Resolution
104.2.1.3 Noise
The noise level is not controlled by the resistor specification but it is normally found to be
relatively low.
The wattage ratings of these resistors are based on operation at 85C when mounted on a 1/16
inch thick, glass base, epoxy laminate. Therefore, the heat sink effect as provided by steel test
plates in other specifications is not present. The wattage rating is applicable when the entire
resistance element is imbedded and operational in the circuit. When only a portion is engaged,
the wattage is reduced directly in the same proportion as the resistance.
Where voltages higher than 250 volts rms are present between the resistor circuit and grounded
surface on which the resistor is mounted, secondary insulation should be provided between the
resistor and the mounting or between the mounting and ground.
Resistors with terminal Type L should not be mounted by their flexible wire leads. Mounting
hardware should be used. Printed-circuit types are frequently terminal mounted, although
brackets may be necessary for high-shock and vibration environments.
104.2.1.7 Variation
Contact resistance variation normally will not exceed 3 percent or 20 ohms for characteristic C,
and 3 percent or 3 ohms for characteristics F and H, whichever is greater.
b. Pulse circuit application -- This resistor is not suitable for pulse circuits.
The RZ style resistors are in a resistor network configuration having a film resistance element
and in a DIP or flat pack configuration. These resistors are stable with respect to time,
temperature and humidity and are capable of full load operation at an ambient temperature up to
70C after which they are derated to zero power at 125C.
105.1.1.1 Use
These resistors are designed for use in critical circuitry where stability, long life, reliable
operation and accuracy are of prime importance. They are particularly desirable for use where
miniaturization is important. They are also useful where a number of resistors of the same
resistance values are required in the circuit.
When used in high frequency circuits (200 MHz and above), the effective resistance will be
reduced as a result of shunt capacitance between resistance elements and connecting circuitry.
The high frequency characteristics of these networks are not controlled by specification.
105.1.1.3 Noise
Noise output is not controlled by specification, but is typically very low for these resistors.
Operation of these resistor networks under variable ambient conditions could cause permanent or
temporary changes in resistance sufficient to exceed their initial tolerances. In particular,
operation at extremely high or low ambient temperatures cause significant temporary changes in
resistance. Care should be taken to assure that the circuit design will tolerate these changes.
105.1.1.5 Mounting
Under severe shock or vibration conditions (or a combination of both), the resistor network
should be restrained from movement relative to the mounting base. If clamps are used, certain
electrical characteristics can be altered. Heat dissipating qualities will be enhanced or degraded
depending on whether clamping material is a good or poor conductor of heat. This phenomenon
should be given due consideration.
Most film resistors are found to be susceptible to electrostatic discharge (ESD) induced damage.
Handling, transporting, and production procedures should take precautions to avoid ESD
problems.
b. Pulse circuit application -- When using these resistors under pulse conditions, the
following conditions shall be met:
(1) The average power shall be less than or equal to the maximum allowable derating
curve for power as shown in Figure 100.10.
(2) The peak voltage shall not exceed 70 percent of the dielectric breakdown voltage or
the maximum short-time overload voltage, whichever is less as specified by the
appropriate resistor military specification (MIL-R-83401).
106 Thermistors
A thermistor is an intentionally thermally sensitive element whose primary function is to alter its
electrical resistance in response to changes in body temperature. MIL-T-23648 is the key overall
specification for thermistor selection. Supplement 1B to this specification provides detail
specifications for various configurations.
Actual thermistor resistance is a function of its absolute temperature. The relationship between
thermistor resistance and its temperature is often expressed as:
R(T) - [1 -- 1]
= []
R(T0) [TT0]
where: R(T) = Thermistor resistance at some temperature T(K)
R(T0) = Thermistor resistance at an initial measurement temperature T (K)
= Thermistor material constant
The dissipation constant, usually expressed in mW/C represents the amount of power required
to induce a temperature rise of 1C.
The time constant is usually expressed in seconds and is defined as the time required for a
thermistor to change 63.2 percent of the total difference between initial and final body
temperature when subject to a step function change in temperature under zero-power conditions.
Thermistors are mixtures of metal oxides which are fused at high temperature to a sintered
ceramic-like semiconductor material. Major classifications are in terms of negative or positive
temperature coefficients of resistance. These large temperature coefficients are responsible for
the resistance ratio characteristics (defined as measured values at 25C versus 125C (i.e., 0.5,
19.8, 29.4). Negative temperature coefficient thermistors display large decreases of resistance as
a function of increasing temperature and are usually available in resistance values from 1to 1M.
Positive temperature coefficient units can display very large increases in resistance over
temperature ranges from below 0C to 200C. Below the Curie temperature (i.e.) that
temperature which separates magnetic and paramagnetic properties, the thermistor temperature
coefficient is slightly negative. Various packaging schemes are available and include chips,
epoxy dipped, molded, T0-5 can, and glass encapsulation.
Most thermistors are available in either disc, bead or rod construction. Discs are constructed by
high pressure forming of oxide-binder mixtures into flat or disc shapes. These are electrically
characterized by low resistance values, short time-constants (resistance variance induced by
self-heating effects), and high power dissipation. The bead forms are constructed by viscous
droplet ellipsoids onto wire leads, then subject to high temperature sintering. These are often
glass coated or mounted in bulbs. Because of low thermal mass, they are characterized by short
time-constants. The rod forms are often useful as temperature probes and are constructed by die
extrusions into relatively long cylinders. They are characterized by high resistance, longer
time-constants, with relatively moderate power dissipation.
Some examples:
d. Other applications include time-delay networks for relays and in-rush current protection,
voltage regulation, communication circuit volume limiters and wave shaping circuits in
signal transmission networks.
106.2.1 Reliability
In those applications in which negative temperature coefficient thermistors are used, care must
be taken to avoid the occurrence of thermal runaway. This occurs during certain applications in
which the self-heating effect due to current flow causes a drop in thermistor resistance, resulting
in still more current-induced self-heating, and the process continues until the device burns out.
To prevent such occurrences, the specified maximum operating temperature of the device must
not be exceeded. Although thermal runaway may not occur in the event the maximum operating
temperature is exceeded, a permanent resistance change can occur. Use of current limiting
resistors can help to prevent thermal runaway. Effects of mechanical stress due to vibration,
shock, or acceleration are minimized by proper mounting or encapsulation.
106.2.2 Derating
106.2.2.1 The derating stress parameters are rated power and ambient temperature.
Next Section
Previous Section
Standard capacitors are specified in MIL-STD-198. This standard presents detailed data for use
in the design of military equipment and should be used to the greatest extent possible for
capacitor selection. Data is presented on terminology, capacitor selection, environmental effects
on characteristics and life, applications, application data, failure rates and aging curves. The
following information has been excerpted from MIL-STD-198.
Capacitors can be broadly categorized into the following types according to the dielectric
material used:
a. Ceramic dielectric
b. Glass dielectric
c. Aluminum dielectric
f. Mica dielectric
In electrolytic capacitors, the dielectric is an almost negligible part of the volume of the
capacitor. In other capacitors, such as mica, plastic, ceramic, and glass dielectrics, the dielectric
comprises nearly the entire volume of the capacitor element. Theoretically, then, for all
capacitors except electrolytic, where almost the entire volume of the unit is an active dielectric,
the volume is directly proportional to CV2 where C is the capacitance and V is the maximum
voltage rating). The proportionality constant depends on the dielectric constant of the material,
its dielectric strength, and the life expected of the capacitors. For the electrolytic types, the
volume has been found empirically to vary more nearly with CV than CV2.
Since the catastrophic failure of capacitors is usually caused by dielectric failure, voltage ratings
of non-electrolytic capacitors are based on a given life expectancy at a maximum ambient
temperature and voltage stress. Dielectric failure is typically a chemical effect, and for
well-sealed units, where atmospheric contamination of the dielectric does not contribute, is a
function of time, temperature, and voltage. The time-temperature relationship affects the
chemical activity or rate of degradation; that is degradation proceeds at a doubled rate for each
10C rise in temperature (e.g., a capacitor operating at 100C will have half the life of a similar
one operating at 90C). Extensive studies have been made of certain organic dielectrics where it
has been found that the deterioration is proportional to V5 (fifth power of the voltage). For
example, a capacitor operating at 20 Volts will last 32 times as long as a similar one operating at
40 Volts. The 10C rule is applicable only over a temperature range where no significant
changes of state occur to affect the dielectric. That is, no freezing, melting, boiling, condensing,
loss or gain of water, crystallization or other change in stable crystal structure. The V5 rule is
also subject to modification by consideration that the dielectric may puncture suddenly if some
particular voltage stress is exceeded, and that there are other electric fields (notably around the
edges of the dielectric extending beyond the conducting plates) where breakdown can occur
without failure of the principal dielectric.
200.2.4 Reliability
Figure 200.1 presents a sample comparison of predicted part operating failure rates for
Established Reliability (ER) capacitors. The part operating failure rates shown are developed
from the part operating failure rate models from MIL-HDBK-217. The part operating failure
rates are representative of a given military environmental condition and stress level and are not
necessarily in the same proportion for other environments or operating conditions. More
complete, extensive, and exact data are provided by MIL-HDBK-217.
All capacitors have some operating frequency limitations due to the nature of the dielectric and
other construction features. Figure 200.2 shows the operating frequency ranges for common
types of capacitors. The frequency range for electrolytics is not readily described in this manner,
because the effective capacitance of these type parts involves a complex relationship of voltage
rating, case size, nominal capacitance value, and operating frequency. Capacitor operation with
alternating currents and under pulse or energy storage conditions involves consideration of a
number of factors in addition to the voltage rating. The major factor in selecting capacitors for
alternating current operation and energy storage and pulse applications is heat dissipation. Heat
is generated as a result of the Equivalent Series Resistance (ESR) and dielectric losses, and, to a
lesser extent, by losses in the attachment of the lead wires to the capacitor elements.
Capacitors for these applications must have the construction, the case size, and the losses,
particularly the ESR, carefully controlled by specification or by special screening to assure
reliable performance in the operating circuit.
Caution: These values are given for illustrating purposes only and should not be
considered absolute. The exact failure rate depends on the maximum
temperature rating and capacitance value.
Figure 200.1 -- Representative Part Operating Failure Rates for Some Established Reliability
Capacitors Establishment of Part Operating Failure Rates:
Capacitance
Temperature
Humidity
Barometric pressure
Applied voltage
Alternating/ripple current
Frequency
Dissipation factor
Equivalent series resistance
Reverse voltage levels
General information and derating requirements for capacitors are provided herein.
These capacitors are primarily used for compensation of reactive changes caused by temperature
variations in other circuit parts and in precision type circuits where their characteristics are
suitable. Ceramic capacitors are substantially smaller than paper or mica units of the same
capacitance and voltage rating. They have tighter capacitance tolerances than mica or paper
capacitors and their lead construction is highly suitable for printed-circuit use.
These units can be used to compensate frequency drift in radio frequency (RF), oscillator, and
intermediate frequency (IF) circuits caused by temperature variations. In IF stages where the
frequency variation is uniform, satisfactory operation can be obtained by designing the
temperature- compensating capacitor into the oscillator circuit. RF circuit reactive changes
caused by temperature variations cannot be compensated for in the oscillator circuit; in these
cases where most critical tuning accuracy is required, it is necessary that compensating
capacitors be inserted directly into each circuit.
In RF circuits tuned by a variable capacitor, a shunt compensating capacitor of low value and
high compensating characteristics can be used. In slug-tuned circuits, the total capacitance
required can be provided by using a compensating capacitor having the desired temperature
coefficient. In oscillator circuits, more linear tuning can be obtained by selecting capacitors with
the proper temperature coefficients in both the series and the shunt capacitances of the tank
circuit.
Vibration
Current
Life
Stability
Retrace
Size
Volume
Mounting method
Cost
The high insulation resistance of these capacitors is well suited to coupling applications between
plate and grid circuits of electron tubes. Extremely low leakage and small physical size make
them suitable for transistor circuit design. They are also used in filter and by-pass circuits.
These capacitors have the largest capacitance to size ratios of all high resistance dielectric
capacitors.
Capacitance changes with variation in voltage, frequency, age and temperature should be
determined from the detailed specifications.
201.1.7 AC Operation
When AC operation is required, the peak ac voltage plus any DC bias shall not exceed the
derated values established by the derating requirements.
201.1.8 Mounting
These capacitors are used to compensate circuit performance for temperature variations.
Therefore, they should be mounted in close proximity to the part (or parts) they are intended to
compensate, and isolated from parts that dissipate local heat. Otherwise thermal gradients will
defeat the designed-in compensation capability.
Since the ceramic dielectric used is frequency sensitive, both capacitance and capacitance change
with temperature will be different at different measuring frequencies. For extremely accurate
compensation, the compensation characteristics should be measured at the proposed operating
frequency.
Due to the low capacitive reactance, at high frequencies and with high capacitances, the
continuous duty current will usually be reached at a voltage below the maximum rated voltage.
Similarly, due to the high capacitive reactance at low frequencies and with low capacitances, the
maximum voltage will often be reached before the rated current. Necessary care should be taken
to ensure that neither current nor voltage exceed the derated value established by the derating
requirements specified for each capacitor type.
These capacitors come in tolerances of +0.1 pf, + .25 pf, + .5 pf, +1 percent, +2 percent, +5
percent, and +10 percent. However, regardless of the purchase tolerance, the design should
tolerate a +1 percent absolute change in capacitance value to assure long life reliability in
military applications. The temperature characteristics, however, are expected to remain virtually
unchanged throughout the life of the capacitor.
Where the capacitor body will normally contact parts with a potential difference of more than
750 volts, supplementary insulation shall be used.
These capacitors exhibit zero and negative temperature coefficients which can be used for
temperature compensation.
These capacitors are suitable for operating frequencies ranging from 1 kHz to 300 MHz.
201.2.2 Derating Requirements for Styles CCR05, 06, 07, 08, 75, 76, 77, 78
The voltage shall be derated according to the derating curve shown in Figure 200.3. The ambient
temperature shall be limited to the derated maximum value as shown in Figure 200.3.
Figure 200.3 -- Derating Requirements for Styles CCR05, 06, 07, 08, 75, 76, 77, 78
These capacitors are primarily designed for use where a small physical size with comparatively
large electrical capacitance and high insulation resistance are required. Because of the
cumulative effects of temperature, applied voltage, and aging, these capacitors are recommended
for use only where broad variations in capacitance value can be tolerated. The dielectric constant
usually decreases with increases in age, frequency, and temperature.
Ceramic dielectric materials are nonhygroscopic, effectively impermeable, and have practically
no moisture absorption even after considerable exposure to humid conditions. Thus, these units
are intended to operate, through their full temperature range, at relative humidities up to
95 percent.
201.3.1.2 Soldering
Care should be used in soldering the leads. Excessive heat may damage the encapsulation and
weaken the electrode to terminal lead contact. sudden changes in temperature, such as those
experienced in soldering, can crack the encapsulation or the ceramic dielectric. Leads should not
be bent close to the case nor should any strain be imposed on the capacitor body to avoid
fracturing the encapsulation or ceramic dielectric.
These capacitors are available with initial tolerances of +10 percent or +20 percent. However,
regardless of the purchase tolerance, the design should tolerate a +20 percent change in
capacitance value to assure long life reliability in military applications.
These capacitors are suitable for use as by-pass, filter, and non-critical coupling elements in high
frequency circuits, with the typical operating frequency ranging from 1 kHz to 300 MHz.
201.3.2 Derating Requirements for Styles CKR05, 06, 11, 12, 14, 15
The voltage shall be derated according to the derating curve shown in Figure 200.4. The ambient
temperature shall be limited to the derated maximum value as shown in Figure 200.4. These
derating requirements only apply to those capacitors having a rated temperature range of -55C
to +125C.
120 150
70 85
Figure 200.4 -- Derating Requirements for Styles CKR05, 06, 11, 12, 14, and 15
These capacitors are small-sized trimmer capacitors. They can be used for fine tuning, trimming,
and coupling in such circuits as intermediate frequency, radio frequency, oscillator, phase shifter,
and discriminator stages.
Changes in nominal capacitance from the values measured at +25C may vary from -4.5 percent
to +14 percent at -55C or -10 percent to +2 percent at +85C when measurements are made: (1)
after the capacitors have reached thermal stability; (2) at a frequency range of 0.1 to 0.2 MHz
and with the capacitor adjusted to 80 to 90 percent of maximum capacity.
These capacitors may be mounted close to a metal panel with little increase in capacitance. To
avoid cracking or chipping of the ceramic mounting base, a resilient mounting (or mounting
surface spacer) should be used.
201.4.1.4 Stability
Even though these capacitors are relatively stable against shock and vibration, air trimmers, due
to their low mass, should be used where a higher order of stability is required.
These capacitors should not be designed into circuits as temperature compensating units since
the temperature sensitivity is non-linear over the capacitance range and varies greatly between
units.
The voltage shall be derated according to the derating curve shown in Figure 200.5. The ambient
temperature shall be limited to the derated maximum value as shown in Figure 200.5.
Figure 200.5 -- Derating Requirements for Styles CV11, 21, 31, and CG60
202 Capacitors, Gas or Vacuum Dielectric
202.1.1.1Voltage Rating
The voltage rating is the 60 Hz test voltage, at maximum capacity. This is the absolute
maximum voltage the unit can withstand before breakdown occurs. The breakdown voltage is
greater at capacities less than maximum, becoming as much as 300 percent greater at minimum
capacity for lower voltage units. The breakdown voltage at radio frequencies is the same as for
low frequencies up to about 2.5 MHz, and becomes about 10 percent lower at 30 MHz. The
continuous duty operating voltage is lower for higher frequencies. The continuous RF rating of a
vacuum capacitor is arbitrarily defined as that voltage and current that will raise the temperature
to a steady 85C without cooling apparatus. This rating can be increased by additional cooling
such as blowers, heat sinks, or water cooling.
When using large conductors for better heat dissipation, care should be taken to avoid excessive
mechanical loading by these conductors.
The voltage shall be derated according to the derating curve shown in Figure 200.5. The ambient
temperature shall be limited to the derated maximum value as shown in Figure 200.5.
203.1 MIL-C-14409, Capacitors, Variable (Piston Type, Tubular Trimmer), (Style PC)
These capacitors are small-sized, sealed, tubular trimmer, variable capacitors designed for fine
tuning adjustments. They are normally used for trimming and coupling in such circuits as
intermediate frequency, radio frequency, oscillator, phase shifter, and discriminator stages.
203.1.1.1 Stability
Because of their low mass, these capacitors are relatively stable against shock and vibration.
The capacitance change is linear with respect to rotation within +10 percent. Backlash is
virtually non-existent except on Styles PC39 and PC43 which can have a backlash of 2 percent.
203.1.1.3 Torque
For styles PC25 and PC26 capacitors, the driving torque is between 0.5 and 6.0 ounce-inches
throughout the temperature range (-55C to +125C); and 1 to 10 ounce-inches at all other
temperatures within the operating temperature range.
203.1.1.4 AC Operation
When AC operation is required, the peak ac voltage plus any DC bias should not exceed the
value established by the derating requirements.
203.1.2 Derating Requirements for Styles PC25, 26, 39, 43, 48, 52
The voltage shall be derated according to the derating curve shown in Figure 200.6. The ambient
temperature shall be limited to the derated maximum value as shown in Figure 200.6.
Figure 200.6 -- Derating Requirements for Styles PC25, 26, 38, 39, 40, 42, 43, 48, and 52
The voltage shall be derated according to the derating curve shown in Figure 200.6. The ambient
temperature shall be limited to the derated maximum value as shown in Figure 200.6.
203.1.4 Construction
Styles PC25 and PC26 capacitors are constructed with a series of concentric circular metal bands
forming plates which interleave. The capacitance is varied by adjustment of the relative depth of
engagement of the metal bands. All other style capacitors are constructed of glass or quartz
dielectric cylinders and metal tuning pistons. A portion of the cylinder is plated with metal to
form the stator. The metal piston, controlled by a tuning screw, acts as the rotor. Overlap of the
stator and rotor determines the capacitance. The self-contained piston within the dielectric
cylinder functions as a low inductance coaxial assembly.
These capacitors are intended for use where high insulation resistance, low dielectric absorption
and fixed temperature coefficients are important circuit parameters. They are particularly useful
in high frequency applications. They are capable of withstanding environmental conditions of
shock, vibration, acceleration, extreme moisture, vacuum, extended life of 30,000 hours or
greater, and high operating temperature experienced in missile borne and space electronic
equipment.
These capacitors come with tolerances of +0.25 pf, +1 percent, +2 percent, and +5 percent.
However, regardless of purchase tolerance, the design should be able to tolerate a +1 percent
change in capacitance value to assure long life reliability in military applications.
These capacitors perform very well at high frequencies up to 500 MHz with a typical operating
frequency of 100 kHz to 1 GHz.
These capacitors are available with three temperature coefficients. For the axial lead capacitors,
the temperature coefficient is 140 + 25 PPM/C (for style CYR41). For the axial-radial lead
capacitors, the temperature coefficient is 105 + 25 PPM/C. The capacitance drift is +0.1 percent
or 0.1 pf, whichever is greater, for all capacitors.
203.2.1.4 AC Operation
When AC operation is required, the peak ac voltage plus any DC bias should not exceed the
value established by the derating requirements.
203.2.1.5 Shock
Although these capacitors are resistant to high acceleration loads during acceleration, they are
susceptible to damage from mild mechanical shocks. Necessary care should be taken in such
applications.
203.2.1.6 Quality Factor "Q"
These capacitors exhibit a much higher Q factor over a wider capacitance range than mica
dielectric capacitors where Q is the ratio of reactance to effective resistance.
203.2.2 Derating Requirements for Styles CYR10, 13, 15, 17, 20, 22, 30, 32, 41, 51, 52, 53
The voltage shall be derated according to the derating curve shown in Figure 200.7. The ambient
temperature shall be limited to the derated maximum value as shown in Figure 200.7.
Figure 200.7 -- Derating Requirements for Styles CYR10, 13, 15, 17, 20, 22, 30, 32, 41, 51, 52,
53
Electrolytic capacitors are smallest in size and cost for a specific capacitance and voltage rating.
Although these capacitors are available with high capacitance values, the initial tolerances are
large. These capacitors cannot be used where close tolerances are required. Most applications
may require surge or ripple current protection to avoid exceeding recommended limits.
Most tantalums particularly those which are either tantalum cased or tantalum lined to prevent
silver migration, such as the CLR75, CLR79, and CLR81, have excellent shelf life
characteristics. Shelf life of aluminum, however, is limited because the film dissolves in the
electrolyte. Tantalum style CLR65 capacitors shall not be used without the approval of the
procurement agency.
204.2.2 Case
The largest possible case size should be used for a given capacitor voltage rating as this provides
thicker oxide dielectric, lower equivalent series resistance, lower dissipation factor, better heat
dissipation, and greater capacitance stability. Only hermetically sealed units shall be used since
the penetration of moisture could affect the electrolyte.
204.2.3 Use
Many electrolytic capacitor styles are not hermetically sealed; such capacitors are not suitable for
application in low pressure high altitude environments without suitable atmospheric protection.
Many of these capacitors are polarized and should not be subjected to reverse bias voltages
beyond the limits specified in the derating section.
Generally, the filtering capability of these capacitors is limited to frequencies below 10 KHz.
Above 10 KHz, the effective capacitance rapidly decreases until the capacitor becomes purely
resistive.
When electrolytic capacitors are operated in parallel, the ripple or surge currents will not divide
evenly due to the difference in internal impedances.
Most solid tantalum capacitors should have a series impedance of at least 3 ohms/volt (limit
charge and discharge currents to 333 mA). This will allow the capacitor to self-heal in the event
of momentary dielectric breakdown.
The ripple current in capacitors should be limited to values which do not bring the temperature
above the derated rating. When capacitors are used in banks it is cautioned that the capacitor
with the lowest equivalent series resistance will carry the largest ripple current. For foil and
solid electrolytic capacitors, the allowable ripple current should be derated to 80 percent of the
manufacturers maximum ripple current rating. Figure 200.8 provides derating requirements for
style CSR tantalum capacitor ripple current.
Figure 200.8 -- Ripple Current Derating for Style CSR Tantalum Capacitors
a. For highest reliability, polarized capacitors shall be protected or applied so that voltage
reversal never exceeds 2 percent of the maximum voltage rating. The combined ac and DC
voltages shall be analyzed to insure that the worst case conditions do not cause voltage
reversals beyond the specified value.
b. The applied voltage and operating temperature shall be limited to the derated values as
specified by Table I-II and the appropriate derating section of this document.
Aluminum electrolytic capacitors are intended for use in filter, coupling and bypassing
applications where large capacitance values are required in small cases, and where high
capacitance tolerances can be tolerated.
Aluminum electrolytic capacitors have in the past experienced deterioration of the oxide film
when operated at less than rated voltage for prolonged periods of time. The oxide film deformed
to a lower voltage and the capacitor would be destroyed upon application of full rated voltage.
This phenomena would also occur if the capacitors were stored for a long period of time,
particularly at high temperature. If the capacitors have been in storage for longer than 5 years it
is recommended that the capacitors be checked for leakage prior to being used in the circuitry.
Because of their passive electrolyte being solid and dry, these capacitors have a lower
capacitance-temperature characteristic than any of the other electrolytic capacitors.
These capacitors exhibit the characteristic of dielectric absorption whereby a voltage across them
will reappear after they have been discharged. This should be considered in their use in RC
timing circuits, triggering systems and phase-shift networks.
These capacitors shall never be exposed to DC or peak ac voltages greater than 2 percent of their
maximum rated DC voltage in the reverse of the normal polarization.
204.3.1.4 Mounting
Supplementary mounting means should be used where the application of these capacitors
involves vibration frequencies above 55 Hz.
The voltage shall be derated according to the derating curve shown in Figure 200.9. The ambient
temperature shall be limited to the derated maximum values as shown in Figure 200.9. For
polarized capacitors, the peak reverse voltage shall not exceed 2 percent of the maximum rated
DC voltage.
Figure 200.9 -- Derating Requirements for Styles CSR13, 21, 91 and CLR25, 27, 35, 37, 75, 79,
81
These capacitors are recommended for use where high capacitance is required in a small volume,
at medium to high voltages. The non-solid (wet) electrolyte capacitors fall into three broad
categories, which vary substantially in pertinent characteristics.
These capacitors are characterized by their high voltage ratings (up to 450 volts). They are
comparatively larger than the sintered slug or etched foil styles for a given capacitance value and
have only moderate purchase tolerances (+20 percent).
These styles utilize tantalum cases. These styles of capacitors do not require the silver plating
that is required for all other wet tantalum electrolytics because the tantalum case is impervious to
attack by H2S04. Other units use steel cases, which must be protected from the sulfuric acid
electrolyte. See paragraph 204.4.1.10 for selection preferences.
As described above, these capacitors come with various tolerances from -15 percent to +75
percent. However, regardless of the purchase tolerance, the design should be able to tolerate an
additional 10 percent reduction in capacitance as compared to the initial value, to compensate for
the cumulative effects of temperature and aging over the life of these capacitors.
204.4.1.5 Polarization
CLR style capacitors are polarized except for styles CLR27 and CLR37. Non-polarized styles
are primarily suitable for ac applications or where DC voltage reversals can occur. Examples of
these uses are in:
Whenever these capacitors are connected in series for higher voltage operation, a resistor shall be
in parallel across each unit. Unless a shunt resistor is used, the DC rated voltage can easily be
exceeded on a capacitor in the series network depending upon the capacitance, the average DC
leakage and the capacitor construction.
When these capacitors are operated in parallel, care should be taken to assure that the sum of the
peak voltage ripple and the applied DC voltage does not exceed the DC rated voltage. The
connecting leads of the parallel network should be large enough to carry the combined currents
without reducing the effective capacitance resulting from series lead resistance.
a. They represent the ultimate in the capability of the manufacturing process, and are thus
less predictable, and inherently less reliable.
b. They are typically much more expensive than the lower capacitance values in the same
voltage rating and case sizes.
c. In the manufacture process, the forming voltage will generally be lower (as a ratio of the
rated operating voltage) than for lower capacitance values, providing a lesser margin of
safety.
d. They will typically exhibit a greater decrease of capacitance at low temperature, and thus
provide only an illusion of higher capacitance in the actual operating environment.
Only hermetically sealed capacitors shall be used. The use of the liquid or gelled electrolyte
absolutely precludes the use of non-hermetic types. The non-hermetic types have been proven
unreliable because the electrolyte can escape, either in a liquid or gaseous form, reducing the
capacitance and causing catastrophic failure under extended exposure to military service
environments.
The order of preference for the selection of the types described above is as follows:
Wet slug tantalum capacitance cannot be used on Naval Air Systems Command Programs
without approval of the procuring agency. Wet slug capacitors other than MIL-C-39006/22
(CLR79) and MIL-C-39006/25 (CLR81) shall not be used on other programs without approval
of the procuring agency.
204.4.2 Derating Requirements for Styles CLR25, 27, 35, 37, 75, 79, 81
The voltage shall be derated according to the derating curve shown in Figure 200.8. The ambient
temperature shall be limited to the derated maximum values as shown in Figure 200.9. For
polarized capacitors, the peak reverse voltage shall not exceed 2 percent of the maximum rated
voltage.
204.4.3 Quality Level
These capacitors are generally used for filtering low frequency, pulsulating, DC signal
components in B power supplies up to 400 Vdc. These capacitors are used at such points as
plate and screen connections to B+, and cathode bypass capacitors in self-biasing circuits. These
capacitors are designed for applications where variations in capacitance are relatively important.
These capacitors are not recommended for Navy application and require procuring activity
approval prior to use.
These capacitors are recommended for use over the frequency range 60 to 10,000 Hz.
204.5.1.2 Polarization
Styles (CUR13, 17, 19, 71 and 91) are polarized. In applications where reversal of polarity
occurs, only style CU15 shall be used. The polarized capacitors (CUR13, 17, 19, 71 and 91)
shall be used only in DC circuits with polarity properly observed. Style CUR13 and CUR17
have a 3-volt reverse voltage limitation for units rated at 10 volts or greater. Styles CUR19, 71,
and 91 have reverse voltage limitations of 1.5 volts. If ac components are present, the sum of the
peak ac voltage plus the applied DC voltage shall not exceed the derated value. The proper
polarity shall be maintained even on negative peaks, to avoid overheating and damage.
204.5.1.3 Seal
Even though these capacitors have vents designed to open at dangerous pressures, explosions can
occur because of gas pressure build-up or a spark ignition of free oxygen and hydrogen liberated
at the electrode. Provisions should be made to protect surrounding parts.
These capacitors should not be subjected to low barometric pressures and low temperatures.
Therefore they shall not be used for airborne applications without prior approval by the
procuring activity.
The surge voltage is the maximum voltage to which the capacitor may be subjected. This
includes transients and peak ripple at the highest line voltage. For maximum reliability and long
life, the DC working voltage should not be more than 60 percent of the full voltage rating so that
surges can be kept within the full-rated working voltage. Surge-voltage application should not
occur more than 30 seconds every 10 minutes.
Recommended solvents include those free of halogen or halogen groups, such as toluene,
methanol, methylcellusolve, alkinox and water, and naphtha. Chlorinated or fluorinated
hydrocarbon solvents shall not be used for cleaning these capacitors.
The voltage shall be derated according to the derating curve shown in Figure 200.10. The
ambient temperature shall be limited to the derated maximum values as shown in Figure 200.10.
For the polarized capacitors, the peak reverse voltage shall not exceed 2 percent of the maximum
rated DC voltage.
Figure 200.10 -- Derating Requirements for Style CUR13, 71, and CU15
The voltage shall be derated according to the derating curve shown in Figure 200.11. The
ambient temperature shall be limited to the derated maximum values as shown in Figure 200.11.
For the polarized capacitors, the peak reverse voltage shall not exceed 2 percent of the maximum
rated DC voltage.
Figure 200.11 -- Derating Requirements for Styles CUR17, 19, 91
The voltage shall be derated according to the derating curve shown in Figure 200.10. The
ambient temperature shall be limited to the derated maximum values as shown in Figure 200.10.
For polarized capacitors, the peak reverse voltage shall not exceed 2 percent of the maximum
rated DC voltage.
205.1.1 Construction
Both glass and mica capacitors have high capacitance per unit, volume or mass with the glass
usually having a much higher capacitance to its volume/mass ratio than the mica. Bodies of
these capacitors are often made of dielectric material and are capable of resisting moisture to a
large degree. These capacitors are very brittle due to their construction and materials used and
may be damaged by high shock or vibration.
205.1.2 Operating Frequency
205.1.3 AC Operation
When AC operation is required, the peak AC voltage plus any DC bias shall not exceed the
values established by the derating requirements. Where transients are encountered, the effects of
these transients should also be taken into consideration when selecting capacitors.
These capacitors are designed for use in circuits requiring precise high frequency filtering,
bypassing, and coupling. They are used where close impedance limits are essential with respect
to temperature, frequency, and aging -- such as in tuned circuits which control frequency,
reactance, or phase. These capacitors are also useful as padders in tuned circuits, as secondary
capacitance standards, and as fixed-tuning capacitors at high frequencies. They can also be
employed in delay lines and stable low-power networks.
Due to the inherent characteristics of the dielectric (i.e., high insulation resistance and high
breakdown voltage, low power factor, low inductance, and low dielectric absorption), these
capacitors, have good stability and high reliability. They are available in small sizes.
These capacitors come with tolerances of +0.5 pf, +1 percent, +2 percent and +5 percent.
However, regardless of the purchase tolerance, the design should tolerate a +0.5 percent change
in capacitance value to assure long life reliability in military applications.
These capacitors perform very well at frequencies up to 500 MHz with a typical operating
frequency range of 10 kHz to 500 MHz.
These capacitors have very high insulation resistance and low dissipation factors.
Figure 200.12 -- Derating Requirements for Styles CMR03, 04, 05, 06, 07, 08 with a Rated
Temperature to 125C
205.2.3 Construction
These capacitors are fixed terminal capacitors employing the use of tin-lead foil.
The voltage shall be derated according to the derating curve shown in Figure 200.12. The
ambient temperature shall be limited to the derated maximum value as shown in Figure 200.12.
These derating requirements only apply to those capacitors having a rated temperature range of
-55C to +150C.
These capacitors can be used in applications that require high and stable dielectric resistance at
high temperatures and good capacitance stability over a wide temperature range. This permits
use in a wide range of applications ranging from computers to guided missiles. The relatively
high dielectric strength of some of the plastic capacitors can lead to attractive small physical
dimensions. These capacitors are of a small relative size for equivalent CV rating except for
MIL-C-19978 polystyrene types which are medium to large size. Metallized paper capacitors
have low dielectric resistance and are prone to dielectric breakdown. Plastic dielectric capacitors
have superior moisture characteristics in that they are non-absorbent.
206.2.1 Seal
All units shall be hermetically sealed. Small amounts of moisture can increase the rate of
chemical reactions within the capacitor materials.
206.2.2 Mounting
Capacitors with lengths of 1.375 or widths of 0.672 inches or greater should not be supported by
their leads. These capacitors should be provided with a supplementary means for mounting, such
as tangential brackets. To keep the inductance to a minimum, the capacitors should be installed
close to the source so that the lead length is as short as possible. The output lead should be kept
away from the input lead. In severe cases the input lead should be shielded. Good bonding is
extremely important in the installation of capacitors.
206.2.3 AC Operation
When AC operation is required, care should be taken to ensure that: (a) the sum of the DC
voltage and the peak ac voltage does not exceed the value established by the derating
requirements; and (b) the ac voltage does not exceed 2O percent of the value established by the
derating requirements or the value calculated from the following equation, whichever is smaller:
Figure 206:2.3
Where:
For metallized paper and plastic capacitors with conducting plates having thicknesses in the
micrometer or submicrometer range, a puncture of the thin dielectric due to voltage stress can in
turn cause a relatively harmless vaporization of a small area of the plates. The clearing of such
faults is due to high peak currents at fault sites when metal vaporization around the pin holes
corrects the shorts. These events normally occur with voltage spikes and result in small
reductions in capacitor values. These phenomena are not considered failures of the capacitor
until enough of them occur to cause the capacitor value to be outside the specified tolerance.
These capacitors are not suitable for use in low voltage, high impedance circuits, since
insufficient energy is available to burn such faults away.
206.3.1.1 Use
These capacitors are designed for use in circuit applications requiring high insulation resistance,
low dielectric absorption, or low loss factor over wide temperature ranges, and where the ac
component of the impressed voltage is small with respect to the DC voltage rating. These
capacitors are broadly categorized into three characteristic groups as follows:
206.3.1.2 AC Operation
Whenever ac operation is required, care should be taken to ensure that: (a) the sum of the DC
voltage and the peak ac voltage does not exceed the value established by the derating
requirements; or (b) the peak ac voltage does not exceed 20 percent of the DC voltage
established by the derating requirements at 60 Hz, 15 percent at 120 Hz; or 1 percent at 10,000
Hz. Where heavy transient or pulse currents are encountered, the requirements of MIL-C-19978
are not sufficient to guarantee satisfactory performance. This should be considered in the
selection of a capacitor.
The DC voltage that can be applied to metal-cased tubular capacitors at different altitudes can be
obtained from Figure 200.13. The DC voltage shall not exceed the specified derating levels.
Figure 200.13-- DC Voltage at Different Altitudes for Metal Case Tubular Capacitors
The voltage shall be derated according to the derating curve shown in Figure 200.14. The
ambient temperature shall be limited to the derated maximum value as shown in Figure 200.14.
The voltage shall be derated according to the derating curve shown in Figure 200.14. The
ambient temperature shall be limited to the derated maximum value as shown in Figure 200.14.
206.4 MIL-C-39022, Capacitors, Fixed, Metallized, Paper Plastic Film or Plastic Film...
These capacitors are primarily intended for use in power supply filter circuits, bypass
applications, and other applications where: (a) the ac component of voltage is small with respect
to the DC voltage rating, and (b) where occasional periods of low insulation and momentary
breakdowns can be tolerated. These capacitors are available in a wide range of capacitance
values and voltage ranges and offer low dielectric absorption.
These capacitors come in tolerances of +5. percent add +10 percent. However, regardless of the
purchase tolerance, the design should be able to tolerate a +2 percent change in capacitance value
to assure long life reliability in military applications.
The capacitors with Mylar or polycarbonate dielectric offer very low (on the order of +1
percent) capacitance change with temperature over the operating temperature range.
206.4.2 Derating Requirements for Styles CHR09, and 49
The voltage shall be derated according to the derating curve shown in Figure 200.15. The
ambient temperature shall be limited to the derated maximum value as shown in Figure 200.15.
207.1 MIL-C-83421 Capacitors, Fixed, Supermetallized, Plastic Film Dielectric, (DC, AC,
or DC and AC), Hermetically Sealed in Metal Cases, Established Reliability, (Style CRH)
207.1.1.1 Use
Capacitors covered by this specification are primarily intended for use in circuit applications
which require non-polar behavior, relatively high insulation resistance, low dielectric absorption,
low capacitance change with temperature, and low capacitance drift over the temperature range.
Styles covered by this specification are rated for continuous operation under ac sinusoidal
conditions in addition to continuous operation under DC conditions. These capacitors can
exhibit periods of low insulation resistance and should only be used in circuits that can tolerate
occasional momentary breakdowns. They should not be used in high impedance, low voltage
applications.
DC ratings vary from 30 Vdc to 400 Vdc over the temperature range of -55C to +100C.
AC ratings vary from 22 Vrms to 240 Vrms at 400 Hz over the temperature range of -55C to
+100C. Operation at frequencies above 40 kHz is permissible provided the derated rms voltage
limit at 400 Hz is not exceeded. AC and DC voltage ratings are decreased to 67 percent of the
25C rating at 125C.
The sum of the combined DC and ac peak voltage should not exceed the value established by the
derating requirements.
The voltage shall be derated according to the derating curve shown in Figure 200.14. The
ambient temperature shall be limited to the derated maximum value shown in Figure 200.14.
208.1.1.1 Use
These capacitors are intended for use in thin or thick film hybrid circuits.
These capacitors are available with capacitance tolerances of +5%, +10% and +20%.
208.1.1.3 AC Operation
In AC operation, the sum of the AC and any DC bias should not exceed the value established by
the derating requirements.
The voltage shall be derated according to the derating curve shown in Figure 200.16. The
ambient temperature shall be limited to the derated maximum value shown in Figure 200.16.
208.2.1.1 Use
These capacitors are primarily intended for use in thick and thin film hybrid circuits for filtering,
bypassing, coupling, and other applications where the AC component is small compared to the
DC rated voltage. These capacitors should be used only where moisture protection is provided.
The surge voltage should not exceed 130% of the value established by the derating requirements.
208.2.1.3 AC Operation
In AC operation, the sum of the AC peak plus any DC voltage should not exceed the value
established by the derating requirements.
208.2.1.4 Mounting
These capacitors are designed for mounting by reflow solder or conductive epoxy in circuit
substrates. The use of a heat column or controlled hot plate is recommended for reflow
procedures. Caution must be exercised to limit temperature to 300 C maximum during reflow
or premature degradation of the solid electrolyte will occur. Conductive epoxies and solder paste
creams are very useful in production situations because they can be accurately and rapidly
screened on to the pads using masks. Also, they have a pre-cure tackiness permitting chip
placement before the epoxy is cured. Conductive epoxies have the advantage of low temperature
curing, however the cold temperature cure characteristics of physical strength and conductivity
may not be as good as some soft solders. To prevent thermal shock, the substrate with the chip
capacitors in place should be heated slowly to the reflow temperature.
208.2.2 Derating Requirements for Styles CWR02, 03, 04, 05, 06, 07, 08
The voltage shall be derated according to the derating curve shown in Figure 200.17. The
ambient temperature shall be limited to the derated maximum value shown in Figure 200.17.
Figure 200.17 -- Derating Requirements for Styles CWR02, 03, 04, 05, 06, 07, 08
Next Section
Previous Section
Standard semiconductor devices are those listed in MIL-STD-701. These devices are a subset of
those meeting the general requirements of MIL-S-19500 and the detailed requirements of
MIL-S-19500 detail specifications.
Semiconductor devices may exhibit change in parameter values over their life within specified
limits. Therefore, for long life reliability the design should be able to tolerate a shift in the
parameters as shown in Table 300.1:
Gain:
300.1.2 Sealing
Only hermetically sealed devices shall be used. No plastic (organic or polymeric) encapsulated
or sealed devices shall be used without the approval of the procuring activity.
All semiconductor devices are susceptible to electrostatic discharge (ESD) damage. Appropriate
procedures compatible with DOD-STD-1686 and DOD-HDBK-263 shall be used when handling
these parts, and selection of devices should include an analysis of the input protection circuitry.
The failure rate of semiconductor devices increases dramatically as the junction temperature
increases. To calculate the junction temperature the following equation is used:
JA X Pd)
TJ = TA + (
Where:
TJ - Junction Temperature
TA - Ambient temperature (i.e., the temperature of the air surrounding the part)
The thermal resistivity should be given in the specification sheet, although it may not be given
directly.JC, junction to case thermal resistivity, and CA, case to ambient thermal resistivity, may
be given instead, but JA = JC + CA.
If the case temperature, TC, is known instead of the ambient, an alternate equation can be used.
TJ = TC + (CA X Pd)
Semiconductor device data sheets generally give maximum power dissipation up to a maximum
temperature, TS. Beyond this temperature it is required to linearly derate power to not exceed the
maximum junction temperature, TjMax, as shown by the absolute maximum derating curve in
Figure 300.1. TS may be given as either a maximum case temperataure (TCMAX) or an ambient
temperature (TAMAX), either of which will give identical results.
Power shall be derated 50% as shown by the maximum allowable derating curve in Figure 300.1.
Beyond TS the power shall be linearly derated to the derating temperature, TD, defined as:
Note: The slope of the derating curve is equal to the inverse of JA or JC depending
on whether TA or TC is used as TS, respectively.
300.2 Diodes
A diode is a semiconductor device which has two semiconductor layers which allow current to
flow in essentially only one direction. This manual divides diodes into two categories, rectifier
diodes, and zener diodes. For most applications diode TjMax should be 110C.
a. Description -- An ideal rectifier diode has zero resistance under forward voltage bias
conduction and infinite resistance under reverse blocking, allowing current to flow in only
one direction. Most diode rectifiers are constructed from Silicon (Si), although
Germanium (Ge) devices still exist, and Gallium Arsinide (GaAs) devices are expected to
be approved for usage in the near future. For new designs, Ge devices shall not be used in
military applications without approval from the procuring activity. GaAs has several
advantages over Si, such as operation at higher frequencies with less power dissipation.
Although, GaAs has experienced reliability problems in the past, current research is
expected to result in achieving significant reliabilility improvements for GaAs devices.
b. Applications -- Rectifier diodes should have I-V characteristics as close as possible to that
of an ideal diode. The six major design parameters used in the selection of a diode are the
forward current, wattage, reverse voltage, forward voltage drop, reverse leakage current,
peak surge current, and reverse recovery time. From a reliability standpoint, forward
voltage drop is the most important parameter because the majority of heat dissipation
occurs during forward conduction. The materials used to make diodes (Si, Ge or GaAs)
have resulted in this parameter being fairly constant for all devices.
When diodes are used in high power or high speed applications a fast recovery time is needed.
When a diode is switched from forward conduction to reverse blocking, the current will not
fall immediately to its near zero leakage current because of the capacitively charged depletion
layer. In addition to this switching (or state transition) delay, a high power dissipation spike
usually occurs.
c. Reliability Information -- Because rectifiers are steadily being used in higher power
applications, heat dissipation is becoming a major concern. For devices used in low power
circuits, glass or plastic (if approved) encapsulation, or simple header mounting is
adequate. However, high power diodes must be specifically mounted to transfer thermal
energy away from the p-n junction. Power rectifiers are generally mounted on
molybdenum or tungsten. It should be noted that selection of plastic encapsulation devices
is normally not permitted. disks to match the thermal expansion properties of the silicon.
This disk is then fastened to a large copper or other thermally conductive material that can
be bolted onto a heat sink.
To achieve reliable design there are four design parameters which shall be derated: power,
forward surge current, inverse voltage and transient voltage. Maximum steady state power
shall be derated as shown in Figure 300.1, and current shall be derated in accordance with
Figure 300.2. If other factors, such as high switching frequencies, cause the junction
temperature to rise above the maximum steady state value, the power shall be further derated.
Close attention should be given to transient voltages when designing high power inverters and
converters. The usually encountered high inductance loads can cause excess transients to
develop.
For zener diodes rated below 5V, the breakdown mechanism is caused by a quantum
tunneling effect. Above 7V another mechanism called avalanche breakdown is responsible,
and between 5 and 7V a combination of the two takes place. Even though avalanche
breakdown, not the zener effect, causes breakdown at high voltages, they are still all named
zener diodes.
b. Application -- Zener diodes are used in applications in which certain potential thresholds
are not to be exceeded. The circuits may take the form of voltage regulators, voltage
references, or some type of protection network.
An ideal zener diode has infinite resistance below the zener voltage and zero resistance above
it. Actually, as the reverse voltage approaches the zener voltage the resistance decreases at an
increasing rate. This point is normally called the knee current or knee voltage. The resistance
then becomes a constant called the dynamic resistance. The lower the dynamic resistance the
more effective the zener diode is as a voltage regulator.
Low voltage zener diodes (5v) that break down because of the zener effect suffer from a
problem called weak knees. That is, they do not display well defined and sharp breakdown
knees and thus do not function as well as desired. When such low voltage zener diodes are
considered, it may be more desirable to use instead several forward biased standard diodes in
series. However, since low voltage zeners have very high dynamic
Figure 300.1 -- Diode/Transistor Power Derating Curve
resistances, using standard diodes in series may significantly lower the effective dynamic
resistance. This should be considered in the event of this kind of design tradeoff.
Zener diodes are manufactured in a variety of standard voltages. To achieve a more exact
breakdown voltage, two or more zener diodes are often connected in series. When a high
voltage zener is needed, it is usually more advantageous to install two or more diodes in series
rather than a single diode. This allows for more effective heat dissipation.
c. Reliability Information -- Zener diodes shall be power derated as shown in Figure 300.1.
However, zeners are often used in circuits as protection elements where they only sink
current under abnormal conditions. Under these circumstances, it may not be necessary to
derate the device to such an extent, and higher derating values can be, used with Procuring
Activity approval.
An important reliability parameter is the temperature coefficient (KT) in units of mV/C. This
parameter defines the change in zener voltage due to change in operating temperatures.KT is
usually a positive number except for low voltage (5v) zeners, and standard rectifier diodes,
where it may be zero or negative. A typical standard diode has a KT of -2mV/C. Therefore,
it is possible to connect zener diodes in series with standard diodes, and have the positive and
negative temperature coefficients cancel each other out, resulting in little or no overall voltage
variance with temperature.
The KT can cause further complications because it is not always a constant. As the forward
current increases the temperature coefficient also increases.
300.3 Opto-Electronic Semiconductor Devices
300.4 Transistors
a. Description -- Transistors are three terminal semiconductor devices with either a p-n-p or
n-p-n structure. There are two basic classifications of transistors: bipolar and field effect.
A Bipolar Junction Transistor (BJT) has three leads: a base, collector, and emitter. For an
n-p-n BJT, a current flowing into the base causes the base-emitter junction to become forward
biased, thus allowing current to flow from collector to emitter. A p-n-p BJT is similar except
that holes provide the majority of conduction. A BJT operates on the principle that by
increasing the base voltage the collector current increases even more, thus creating an
amplifier.
A Field Effect Transitor (FET) has three leads: A drain, source, and gate. Current flows from
source to drain through a channel. The conduction of current is due entirely to the flow of
majority carriers through a conduction channel controlled by an electric field arising from a
voltage applied between the gate and source terminals. FETs are also called unipolar
transistors because current is conducted by charge carriers (electrons and holes) flowing
through one type of semiconductor. This is in contrast to BJTs, where current passes through
both p-type and n-type semiconductor materials in series.
There are various types of FETs, some of which are: the Junction FET (JFET), the MEtal
Semiconductor FET (MESFET), the MOdulation Doped FET (MODFET), and the Metal
Insulator Semiconductor FET (MISFET). A special type of MISFET is the Metal Oxide
Semiconductor FET (MOSFET).
For a JFET, a voltage applied to the gate reverse biases the gate-to-channel junction, which
results in a depletion region being formed in the channel. Since current cannot flow through
the depletion region, the width of the channel can be effectively controlled, thus controlling
the current. An amplifier is created because a small gate voltage change causes a
corresponding much larger current change through the channel. A JFET can be made with
either an n or a p type semiconductor material in its channel, just as a BJT can be made as
either a n-p-n or a p-n-p device. The difference between p-channel and n-channel function is
polarity reversal of all voltages and currents. Generally, n-channel devices are preferable for
circuit applications.
A MISFET operates on the same principal as a JFET but its physical construction varies
slightly. The gate does not actually come in contact with the channel. Instead, there is a thin
metal oxide between the two which causes a higher input resistance. A MISFET can be
further classified as an enhancement or depletion type. The difference is that in a depletion
type there is a physical channel, and in an enhancement type an electric field creates the
channel. The MESFET results if the JFET junction is replaced by a Schottky junction.
Transistors are usually made from Si, (doped with boron and phosphorous) with GaAs
expected to become more widely used in the future. Ge devices shall not be used in military
applications without approval from the procuring activity.
BJTs were the first type of transistors mass produced and remain the most widely used. They
are used in discrete circuits as well as in integrated circuits (ICs), both analog and digital. The
device characteristics are understood well enough that one is able to design transistor circuits
whose performance is predictable and quite insensitive to variations in device parameters.
MOSFETs and JFETs are easier to manufacture than BJTs. MOSFETs play a dominant role
in digital IC design. P-channel devices (PMOS) and n-channel devices (NMOS) used in
combination on the same integrated circuit are called Complementary-symmetry MOS
(CMOS) circuitry. Microprocessors, logic, and memory circuits fabricated using Very Large
Scale Integration (VLSI) techniques mostly employ MOSFETs. One disadvantage of
MOSFETs, however, is they are very sensitive to static electricity due to their high input
impedances.
JFETs are very useful in the design of special amplifier circuits, particularly those requiring
very high input impedances. JFETs can also be combined with bipolar transistors to provide
high performance linear circuits, which are called BIFETs.
The MESFET is a JFET structure using a Schottky junction in conjunction with GaAs. This
FET is suitable for use in amplifiers and logic circuits intended for operation in the gigahertz
range.
c. Reliability Information -- All transistors are sensitive to temperature changes, some more
so than others. Also, all transistors exhibit a breakdown condition called avalanche
breakdown.
BJTs are the least temperature sensitive, but because they are typically used in higher power
applications the effect of temperature is still predominate. The collector to base current, with
the emitter open (ICBO), roughly doubles for every 10C rise in temperature. The
common-emitter current gain (hFE) also increases with temperature.
In a JFET temperature effects cause the gate current to increase with temperature, roughly
doubling for every 10C increase in temperature. Also, the conductivity of the channel is
dependent on temperature, which causes the gate-to-source voltage (VGS) to change while the
drain current is held constant. However, there is a particular value of drain current at which
the temperature coefficient of VGS is essentially zero, so a properly designed circuit can be
made to express very little change with temperature.
In MOSFETs the threshold voltage (VT), the drain current and are all temperature sensitive.
The magnitude of VT often decreases by about 2.5 mV for each 1C rise in temperature (This
variation is often not at a fixed rate, however, since VT is actually a function of both
temperature and doping density). also decreases, which causes a corresponding decrease in
drain current as temperature increases.
All transistors exhibit a breakdown condition called the first breakdown or avalanche
breakdown. When breakdown occurs, the result is a large increase in current with a negligible
increase in voltage. The scientific explanation for this is that minority carriers crossing the
depletion region gain sufficient kinetic energy to break covalent bonds in atoms. The carriers
liberated by this process then have sufficient energy to break other bonds, and the process
continues to repeat itself in an avalanche fashion.
The breakdown process differs slightly between BJTs and FETs. In FETs the breakdown
voltage increases as the gate-source voltage increases, and in BJTs it decreases as the gate
current increases. Breakdown can occur at either the emitter-base or the collector-base
junction in a BJT. Breakdown of the collector-base junction is not destructive as long as the
power dissipation in the device is kept within safe limits. However, emitter-base breakdown
is detrimental in the sense thatis reduced.
In a MOSFET, breakdown occurs when the gate-to-source voltage exceeds about 100 V.
However, because MOSFETs have very high input impedances, only a very low current is
needed. A high voltage with a very low current is characteristic of static electricity, which is
why MOSFETs are extremely static sensitive. When MOSFETs are used in ICs there should
be some form of input protection, such as a clamping diode, that reduces (but normally will
not eliminate), ESD sensitivity.
300.5 Thyristors
All thyristors are derived from the basic structure of an SCR. A SCR is similar in operation to
a diode, except that it can be turned on during its forward blocking state by applying a
positive voltage to its gate. A GTO differs in that it can be turned both on or off during
forward blocking and conduction. Applying a positive voltage to the gate turns it on, and a
negative voltage turns it off. The TRIAC is also similar to the SCR, except that it can conduct
in either forward or reverse direction.
b. Applications -- Thyristors are used primarily in high power, high speed switching
applications, such as converters, inverters, crowbar over voltage protection, and motor
controllers. They are more efficient than transistors or mechanical relays when used in
high power applications because of their high switching speed while the two p-n junctions
allow for higher power operation. Presently, SCRs can switch up to 3000A at 2,000V.
Thyristors usually cannot operate at high frequencies for two reasons. First, they require a
long recovery time after current is switched off; second, the maximum power dissipation
occurs during switching and the resultant high temperature may cause component damage.
c. Reliability Information -- Thyristors have five design parameters requiring derating, plus
three parameters which should be given attention in order to achieve a reliable design.
(1) Power -- Maximum steady state power shall be derated as shown in Figure 300.1. If
other factors, such as high switching frequency, cause the thyristor junction
temperature to rise above the maximum steady state value, the power shall be further
derated.
(2) Forward Blocking Voltage -- Also called breakover voltage, determines the
maximum voltage which can be blocked in the forward direction with the gate
grounded. If exceeded, the device will usually turn on without damage to the
thyristor, but there may be damage to other circuit elements. Forward blocking
voltage shall be derated to no more than 50 percent of the specified maximum.
(3) Inverse Voltage -- Also called reverse breakover voltage or the maximum reverse
voltage. It is the maximum voltage that can be reversed biased across a thyristor,
and will destroy the device if exceeded. Maximum inverse voltage shall be derated
to no more than 50 percent of the specified maximum.
(4) Forward Surge Current -- Thyristors can withstand a relatively high surge current,
usually two to three times its forward continuous current. Surge current shall be
derated to no more than 70 percent of the specified maximum.
(5) Turn-Off-Time -- Defined as the time needed for a thyristor to turn off before it can
be turned on again. After a thyristor is turned off it cannot immediately be turned
back on because of excess charge carriers within the device. A recombination of
these carriers must first take place. Turn off times not less than 200 percent of
device rating shall be used as derating criteria for this characteristic.
(6) Rate of Rise of Forward Current (di/dt) -- This parameter is not derated, but the
thyristor can be damaged if the forward current is increased too rapidly causing
localized excessive heat dissipation across the p-n junctions. To minimize this
occurrence a pulse triggering technique called hard firing can be employed. With
this technique, a relatively high amplitude short duration pulse is applied to the gate,
followed by a smaller pulse. This allows conduction to take place across the entire
cross-section of the device as fast as possible. There are also devices which have
some type of regenerative gate which create high di/dt ratings.
(7) Rate of Rise of Forward Voltage (dv/dt) -- If the forward voltage is increased too
rapidly the thyristor may turn on without the application of a gate signal
(self-triggering). This is because the internal capacitances of the thyristor junctions
may draw enough charging current to induce triggering. Some thyristors have
shorted emitter type construction which can increase the dv/dt capability. An
effective method of preventing this type of malfunction is to install a resistor from
gate to cathode and increase the gate driving voltage and current.
(8) Gate Triggering Voltage and Current -- This is the power necessary to drive the
gate to cause triggering. There are two methods of triggering, pulse and continuous.
To increase reliability, continuous gating should be used whenever possible. An
exception to this rule is when a high rate of rise of foward current poses a problem.
In this case, pulse triggering is more reliable. But in general, pulse triggering is less
reliable but more energy efficient. A thyristors minimum pulse width varies with
temperature, age, and load circuit characteristics. An anode -- cathode load with a
large inductance requires a longer pulse width to be applied to the thyristor.
Thyristors have both a minimum and maximum triggering voltage and current. Applying a
value above the maximum can destroy the device. Applying a value below the minimum
prevents the thyristor from triggering, Also, the gating requirements usually decrease at
high temperature, making extraneous signals on the gating lines more dangerous at high
temperatures.
The use of fiber optic systems in military applications is steadily increasing. This is because
optical signals are relatively immune to an Electromagnetic Pulse (EMP) and do not produce any
electromagnetic radiation. A fiber optic system is composed of three parts: photoemitters,
photodetectors, and optical fibers.
300.6.1 Photoemitters
a. Description -- Photoemitters are devices which convert electrical signals into light. Short
wavelength devices are made from a GaAs substrate on which a layer of GaAs alloyed
with aluminum is grown, giving AlGaAs. Long wavelength devices are composed of
Indium-GaAs-Phosphide (InGaAsP) grown on a substrate of Indium Phosphide (InP).
There are four basic types of photoemitters: Light Emitting Diodes (LEDs),
Surface-emitting LEDs (SLEDs), Edge-emitting LEDs (ELEDs), and Laser diodes.
A LED produces light by electron and hole migration into the active layer where they
recombine to emit light. SLEDs and ELEDs work by the same principal except that they have
confining layers. The confining layers confine the light in the active layer, forcing it to be
emitted in a given direction with a decreased spectral width.
A Laser diode has reflective end facets which act as mirrors. The light is reflected back and
forth and amplified. Above a threshold current, when the voltage exceeds the bandgap
energy, the diode begins to Lase. Laser diodes have very narrow spectral widths, 3nm, and
a high power output of about 1 mW. Currently, research is being done to make laser diodes
with variable frequencies, allowing lightwaves to be heterdyned, substantially increasing their
bit rates.
b. Application -- Photoemitter applications depend on the spectral width needed. LEDs have
the widest spectral width, then SLEDs, ELEDs, and finally laser diodes. For analog
systems LEDs may be more desirable because they lack a nonlinear threshold region. For
digital links, a laser diode is more desirable because it can be modulated faster (500 MHz
bandwidth). Between the light emitting and lasing states, a laser diode can be made to
amplify the intensity of light incident from an incoming fiber. In this way it can be used as
a photodetector and photoemitter at the same time, thereby reducing the number of parts in
a repeater. Also, a long wavelength photoemitter can be modulated faster than a short
wavelength device, thereby increasing its bit rate capability. However, long wavelength
devices also require higher currents which increase power dissipation.
As the temperature increases the optical power decreases. For a LED, the optical power
decreases by .5% for each 1C rise in temperature. For a long wavelength device the change
is 1.5%/C. The peak wavelength of a photoemitter also changes with temperature. It
changes by .25 nm/C for a short wavelength device, and .5 nm/C for a long wavelength
device. This change is a more serious problem in laser diodes because of the narrower
spectral width. As the peak wavelength changes the optical fibers loss changes, which in
turn changes the optical energy at the receiver.
300.6.2 Photodetectors
a. Description -- Photodetectors are devices which convert optical energy into electrical
energy. There are many types of devices, but the three most popular are the
photoconductor, the P-I-N photodiode and the avalanche photodiode. Short wavelength
devices are made principally from silicon, while long wavelength devices are made from a
variety of elements, including germanium as well as alloys from groups III and V of the
periodic table.
The P-I-N photodiode derives its name from its three semiconductor layers. The i being an
intrinsic or lightly doped region, and the p and n being semiconductor dopant layers. When
the P-I-N photodiode is reverse biased, photons that are captured in the depletion layer create
electron-hole pairs which generate a leakage current. This leakage reverse bias current is
directly related to light intensity.
An avalanche photodiode (APD) works on the same principal with the exception that a higher
reverse-bias voltage is applied. This causes more electron-hole pairs to be generated when
photons strike the device. An avalanche multiplication takes place which is, in effect, a self
amplifying process. An APD therefore has more gain than a P-I-N photodiode.
An avalanche photodiode has the advantage of an internal gain greater than a hundred, about a
10db signal-to-noise ratio improvement, and a 5 to 7db improved signal sensitivity over a
P-I-N photodiode or a photoconductor. But they are, in general, more difficult to use. An
avalanche photodiode is more sensitive to temperature. In order to run at a constant gain
some form of temperature compensation is required. Also, the leakage current should be kept
at least an order of magnitude lower than the current generated by the optical signal to
maximize sensitivity and signal-to-noise ratio.
Photoconductors have the inherent problem of excess noise. This arises from the lack of a p-n
junction which means that there is always current flowing through it, regardless of the
incident light energy. This current generates randomly fluxuating background current known
as the Johnson noise current. Photoconductors have relatively high gains, but the gain is
usually insufficient to offset the noise. They also have relatively low bandwidths, about 100
MHz for a fast device compared to 10GHz for a fast P-I-N photodiode.
The P-I-N photodiode and P-I-N/FET detector have an inherent problem of very shallow
p-diffusion layers and a very thin oxide, which allow for sufficient light penetration.
However, this also causes the device to be more susceptible to ionic contaminates. The
reverse biased voltage causes ionic drift and localized charge concentrations. This manifests
itself through degraded electrical parameters, such as increased leakage currents.
There are two types of fibers: multimode and single-mode. Their primary difference is that
single-mode fibers are only about 8.5 micrometers in diameter, while multimode fibers have a
50 micrometer diameter.
b. Application -- Basically, an optical fiber is much like an electrical wire, but instead of
conducting electrical energy, it conducts optical energy. It connects a photoemitter at one
end of the fiber, to a photodetector at the other. Optical fibers are extremely transparent
but still have small losses. These losses vary with wavelength, giving a fiber a very
limited bandwidth, shown in Figure 300.3. It is desirable to operate the photoemitters and
photodetectors at a peak wavelength corresponding the lowest attenuation points of the
optical fiber. The absolute lowest attenuation point occurs at 1.55 micrometers, with an
attenuation of .15 to .80 db/km. Another low point occurs at 1.3 micrometers, where it is
.3 to 1 db/km. Long wavelength fiber-optics attempt to operate at these two wavelengths.
Short wavelength components operate at around .85 micrometers, where the attenuation is
2.5 to 3 db/km. Therefore it would be much more efficient to use a fiber at longer
wavelengths. The problem however, is that at present it is more difficult to operate
photoemitters and photodetectors at these longer wavelengths.
Losses in optical cables occur from three sources: Rayleigh Scattering, Chromatic dispersion,
and multimode distortion. Impurities within the fiber were once a problem, but have since
been almost totally eliminated.
Rayleigh scattering is the principal source of attenuation. It decreases as the inverse fourth
power of the wavelength. It is caused by intrinsic non-homogeneous arrangements of
molecules in the material. Very little can be done to prevent this because it arises from the
fibers material properties causing slightly different wavelengths to travel down the fiber at
different speeds. This is the same phenomenon that allows a prism to split light into different
colors.
Chromatic dispersion comes into play at high bit rates. It effectively spreads out the pulse,
setting an upper frequency limit. Like Rayleigh scattering, it decreases with increasing
wavelength.
Multimode distortion occurs because not all modes of light travel the same distance down a
fiber. Some travel straight down while others are continually reflected off the surfaces. This
spreads out the pulse, setting a maximum frequency limit for a given length of cable. This
problem can be solved by the use of single-mode fibers. As the name implies, this type of
cable only allows a single mode of light to exist within the cable.
Of the two types of fiber-optic cable, a single-mode cable is capable of transmitting light
further than a multimode cable. Its disadvantage is that it is so thin that it is extremely
difficult to splice the fibers together and couple the photoemitters and photodetectors to the
fiber. Single-mode fibers are also more sensitive to small bends in the cable.
c. Reliability Information -- Optical fibers are a relatively reliable component in a fiber optic
system. Since there is no current flow through the fiber, the common voltage and current
accelerated failure mechanisms are not a problem. Also, glass is relatively immune to the
same chemicals and ionic contaminates which are detrimental to semiconductor devices.
In the event of failure occurrence it is usually catastrophic, resulting from a fiber break.
Figure 300.3 -- Loss Spectra of Optical Fibers
A fiber by itself is very weak. It contains many small weak spots called microcracks, which
lower the fibers tensile strength. It has been shown that moisture will also weaken the fiber.
To increase fiber reliability, it is usually coated with a plastic layer to increase its strength,
and protect it from moisture and other environmental factors. Fibers can also be combined
with cables to increase strength.
Microwave devices are diodes and transistors which can operate at microwave frequencies.
Microwave diodes are divided into five categories: varactors, p-i-n diodes, tunnel diodes,
transferred electron devices, and avalanche transit time devices. The latter three can be used at
microwave frequencies by the utilization of their negative resistances. Varactors can be used
because of their variable capacitances and p-i-n diodes because of their intrinsic semiconductor
layer.
Tunnel diodes, transferred electron devices, and avalanche transit time devices differ in the way
in which they are biased. Tunnel diodes have a forward biased p-n junction, transferred electron
devices have no p-n junction and operate simply by the application of a d-c voltage to a bulk
semiconductor, and avalanche transit-time devices have a reversed biased p-n junction.
Microwave devices shall have power derated as shown in Figure 300.1.
300.7.1 Varactors
First, it can be used in a circuit as a modulator. Two inputs are applied to the circuit at two
different frequencies, known as signal and pump frequencies. The varactor then multiplies
the two inputs, producing a third frequency called the idler frequency.
The third application of a varactor is as a parametric amplifier. Signal, pump, and idler
frequencies are again used. A parametric amplifier amplifies by the utilization of its input
negative restance. The voltage reflection coefficient is larger than unity so power gains can
be realized.
To choose a varactor for a particular application the following factors should be used:
c. Reliability Information -- As a varactor ages its noise increases. Most noise occurs from
thermal sources. To minimize thermal noise, varactors are often cooled to extremely low
temperatures with liquid-nitrogen or liquid-helium. However, even at low temperatures
plasma noise and shot noise are still present. Varactors made from GaAs are less
susceptible to noise than silicon devices. Excess noise temperature due to shot noise is
about 3_K/mA for GaAs and 25_K/mA for silicon. At extremely low temperatures the
quality of a varactor seems to make little difference in noise generation. However, poorer
quality varactors exhibit higher heat dissipation, which makes it more difficult to keep the
varactor at a low temperature.
a. Description -- A p-i-n diode consists of three semiconductor layers. Heavily doped p and
n layers separated by the i layer, an intrinsic, or highly resistive layer. The i layer is not
truly intrinsic, but actually doped slightly with p or n materials.
At low frequencies a p-i-n diode can be used as a diode or photodetector. However, at high
frequencies internal device characteristics allow its resistance to be controlled by its d-c
biased voltage.
(1) Microwave Switch -- A p-i-n diode, like a common rectifier diode appears as a large
impedance under reverse bias and a small impedance under forward bias. For
switching applications, several diodes are connected in parallel with a common
output, and different inputs from several different microwave channels. An external
voltage source provides the biasing to each diode, switching on one diode at a time
to the output, effectively switching on each channel. This process can also be done
in reverse, switching one input to several outputs. A P-I-N diode is able to switch
relatively large amounts of power with very little heat dissipation because most
losses are second order effects.
(3) Variable Attenuators -- At microwave frequencies p-i-n diodes exhibit the property
of behaving much like a variable resistor. Its resistance is almost linearly dependent
on its forward current. This property can be utilized to keep the output power
relatively constant, thereby creating an attenuator.
a. Description -- A tunnel diode is a highly doped diode which has a very thin depletion-layer
barrier at its p-n junction. This narrow barrier, along with the quantum tunneling of
electrons through the barrier, allows the tunnel diode (sometimes known as the Esaki
diode) to display negative resistance characteristics between peak and valley currents on
the device I-V curve. The equivalent circuit of a tunnel diode is a negative resistance
(about -30 ohm) in parallel with a capacitance (about 20pf).
Advantages of tunnel diodes include low cost, light weight, high speed, and low noise. A
major disadvantage is severe output power limitations. The maximum voltage which can be
applied must be below the bandgap voltage, which is only 1.40 V for GaAs. Tunnel diodes
also have very low efficiencies, typically about 2 percent.
b. Applications -- Tunnel diodes are used in microwave applications because of their high
oscillation frequencies. They can be used in two basic configurations: either parallel or
series loading.
Parallel loading is used to produce microwave oscillators. A load resistance in parallel with
the tunnel diode is allowed to approach the magnitude of the negative resistance of the diode.
This produces an unstable circuit which will oscillate at microwave frequencies.
Series loading is used to produce microwave amplifiers. As the name suggests, a load
resistance is placed in series with the tunnel diode. By allowing this load resistance to
approach the negative resistance of the diode, a negative resistance amplifier is created.
c. Reliability Information -- In general, more heavily doped a diode is, the faster it fails. The
fastest deterioration occurs when the diode is statically biased in the injection part of the
characteristics at approximately twice the peak current (or higher).
Deterioration in tunnel diodes most commonly takes the form of a decreased peak current,
increased injection current, and a decreased junction capacitance with time. Tunnel diodes
deteriorate differently than most other semiconductor devices. Chemical and physical
reactions occur within the diode and proceed until the device fails. That is, their failure rate
over time more closely approximates that of a mechanical device rather than the bathtub
curve for electrical devices.
a. Characteristics -- Transferred Electron Devices (TEDs) are not true diodes because they
have no p-n junctions. Instead, they utilize the bulk negative resistance property of
uniform semiconductors. A TEDs oscillation frequency is a function of the load and the
natural frequency of the circuit. They are used for many of the same applications as tunnel
diodes.
TEDs are fabricated from compound semiconductors such as gallium arsenide (GaAs),
indium phosphite (InP) or cadmium telluride (CdTe). There are four types of TEDs; the
Gunn-effect diode, the limited space-charge accumulation (LSA) diode, CdTe diodes, and InP
diodes.
a. Description -- Avalanche transit time devices utilize the effect of voltage breakdown
across a reversed-biased p-n junction to produce a negative resistance at high frequencies.
There are two principal modes that this diode is operated in.
The first is the impact ionization and transit time (IMPATT) mode, for which the IMPATT
diode is named after. It has a typical dc-RF conversion efficiency of between 5 and 10
percent, and oscillation frequencies up to 100GHz. It consists of a n-p-i-p+ or p-i-n-i-n+
structure, where i refers to an intrinsic material. The most popular diodes which operate in
this mode are the IMPATT and the Reld diodes.
The second mode of operation is the trapped plasma avalanche triggered transit (TRAPATT)
mode, for which the TRAPATT diode is named. Its dc-RF conversion efficiency is from 20
to 60 percent, and it can operate up to several gigahertz. A TRAPATT device has a n-i-p-p+
or p-i-n-n+ structure.
Another type of diode which operates as an avalanche transit time device is the barrier
injected transit time (BARITT) diode. This diode consists of a p-n-p, p-n-i-P, p-n-metal, or a
metal-n-metal structure. It has the advantage of much less noise than the IMPATT devices,
but its use is limited due to its narrow bandwidth and limited output power.
b. Application -- Avalanche transit time devices are the most powerful solid state source of
high frequency power. They are used in a variety of applications, including local-oscillator
sources and pumps for amplifiers.
The IMPATT diode has two fundamental parameters: a resonant and a cutoff frequency. The
resonant frequency is defined as the frequency at which the imaginary part of the diodes
admittance changes from inductive to capacitive. The cutoff frequency is typically above the
resonant frequency. The dc-RF conversion efficiency of IMPATT diodes increases
substantially as the ratio of the voltage drop in the drift zone to the voltage drop across the
avalanche zone (VD/Vk) is allowed to increase. One important drawback is the noise inherent
in the IMPATT ionization process which can interfere with the signal in some frequency
ranges.
The TRAPATT diode can be made from either a n-i-p-p+ or a p-i-n-n+ structure. In almost all
applications the n-i-p-p+ structure is preferred. it has superior performance characteristics
relative to efficiency and power output because of a narrower avalanche region which lowers
the delay time.
Next Section
Previous Section
400 Microcircuits
Standard microcircuits are those listed in MIL-STD-1562. These devices are a subset of those
meeting the general requirements of MIL-M-38510 and the detailed requirements of
MIL-M-38510 slash sheets.
Microcircuits, also known as Integrated Circuits (ICs), enable one to produce a large number of
complete circuits on the same Silicon (Si) wafer. Each circuit may contain a large number of
transistors, diodes, resistors and possibly some small capacitors, all interconnected by overlying
thin aluminum (Al) lines, ending up at a small number of Al pads to which electrical connections
from the outside are made.
The whole wafer is processed as a single unit. When the metallization interconnection is
completed each circuit is electrically tested, marked if defective, and finally the wafer is
separated into individual dies, each comprising a single circuit. From this point on each circuit
requires individual (and costly) handling. Each good circuit die (rectangular chip of the original
wafer) is bonded on to header with Gold (Au) or Aluminum (Al). Wires are bonded to the A1
pads on the die and to the header terminals, and the encapsulation is finished by sealing.
The circuits may also be classified according to their use: linear circuits for both small signal
and low to high power use, and digital circuits for logic use.
The rapid development of IC technology, since its inception the early 1960s, stems from several
important causes:
b. The reliability problems associated with complicated circuits of discrete parts and large
numbers of interconnections;
e. The economics of high cost discrete parts vs relatively low cost ICs;
f. The ability of IC approaches to provide innovative and more effective solutions to systems
problems (e.g., circuit speed).
Economic pressures to produce larger, more complex chips, aided by steady progress in reducing
chip defects, have resulted in the production of large scale integrated (LSI) circuits. The
principal technical distinctions between LSI and conventional ICs are the number of gates
(control-of-state elements), and the use of multilevel interconnections for LSI. This permits the
efficient interconnection of individual ICs on the same wafer to form very complex circuits. It
also allows extensive circuit changes by changing only a single interconnection mask.
Figure 400.1 -- Semiconductor IC Schedule
Like other ICs, LSI chips require a mass (High Volume) market to be economically feasible.
Thus, LSI manufacturers follow the IC strategy of mass producing general-purpose circuits and
limited special purpose consumer circuits. LSI circuits offer an additional advantage --
programmability -- by which a standard circuit can be made to fit individual user special needs.
Semiconductor memories and microprocessors are two widely used examples of programmable
LSI circuits.
Read/write memories, often called Random-Access Memories (RAMs), are used for temporary
storage of programs or data; these memories are volatile, i.e., data is lost when memory power is
interrupted. Non-volatile semiconductor memories include Read-Only Memories (ROMs) and
Programmable Read-Only Memories (PROMs). ROMs are usually mask-programmable, i.e.,
made to order by a semiconductor supplier using a custom interconnection mask. PROMs can be
programmed electrically by the user or a programming service. These memories can be used not
only for storage of data or programs, but also to replace logic gates.
Microprocessors provide the functional parts of a small general purpose computer in the form of
a low cost LSI chip(s). Microprocessors are usually dedicated devices handling a variety of
inputs and outputs in accordance with a fixed program. A microprocessor system design
involves the programming of the processors instruction ROMs as well as the physical
interconnection to peripheral devices. Most processor programming is presently done in
assembly language, although machine language and higher level languages are also used. The
relatively high cost of programming makes the provision of higher language capability very
probable in future microprocessor operations.
Custom designed LSI ICs provide the opportunity for maximum LSI performance to the user
when a market for the product is large enough to recover design costs.
A logic family is a term which represents a method of constructing logic networks, and describes
the types of components and the means by which these components are connected. The
following discussion is intended to provide a brief summary of some widely used various logic
schemes. Table 400-I presents a snapshot summary.
a. Resistor-Transistor Logic (RTL): Circuit input takes place across or through resistors,
while circuit output is at output terminals of a transistor. This logic family is
current-sourcing in that conventional current is from a driving gate to a driven gate or load
(i.e.) the driving gate is a current source. The fan-out (number of like gates that can be
driven) of RTL logic is usually 4 or 5, with fair operating speed, and with typical dead time
delays (propagation times) of the order of 12 nsec.
b. Diode-Transistor Logic (DTL): Input signal events are applied to diode networks, with
output taken from a transistor. This logic family is current-sinking since conventional
current flow is from the driven gate into the driving gate. Fan-out is usually of the order of
eight, or more.
c. High Threshold Logic (HTL): is essentially DTL logic, with an added functional
requirement that input voltages must be high enough to exceed an operational threshold
level. The main purpose is to achieve higher noise immunity to improper circuit triggering
due to spurious signals. Slower gate response results in dead time delays of about 120
nsec; however, this allows for inherent high frequency noise signal filtering.
d. Transistor-Transistor Logic (TTL): This is presently the most often used integrated
circuit logic. It can be thought of as saturation logic in that transistors are allowed to
saturate in some operational situations. This logic family has no discrete component
counterpart. This logic approach originates from design efforts to simplifying design and
performance improvements of integrated circuit DTL/HTL. Several variations in TTL
include High and Low Speed Schottky TTL (STTL, LSTTL, respectively), and advanced
low-power Schottky TTL (ALSTTL, or ASL). The usual propagation or dead time delay
with the above logic schemes varies from 3 to 20 nsec, with fan-out ranging from 8 to 20.
TTL generally is current-sink logic, since in operation conventional current flow is from
emitter lead of a driven gate into the collector of a portion of the driving gate. Further
discussion of TTL is provided by paragraph 400.2.10.1.
e. Emitter-Coupled Logic (ECL): This can be considered as a major sub-set of TTL. ECL is
a non-saturating logic scheme which avoids the speed-limiting effects of transistor
charge-storage times by use of differential amplifiers within the integrated circuit. The
emitter connections of the amplifiers allow for high impedance inputs within the circuit.
ECL output allow for restoration of proper logic levels, with low output impedances for
relatively higher fan-out. Further discussion of ECL is provided by paragraph 400.2.10.2.
f. Integrated-injection logic (I2L): The I2L logic scheme is essentially a unit input,
multi-output inverter, with most of the output gate terminals connected to a common
semiconductor region. Advantages include compact structure (high packing density), with
reductions in gate areas. Variations include Schottky I2L which enhances noise immunity
and improves propagation time.
g. Complementary Metal Oxide Semiconductor (CMOS). This logic is based on MOS Field
Effect Transistor (MOSFET) technology. CMOS gates use only MOSFETs as circuit
components. An essential advantage of MOS technology is realization of a large array of
various functions without the need for additional network components (e.g.) resistors,
diodes, etc., are not required. CMOS cannot be actually classified as either current-sinking
or current-sourcing logic since there is virtually no current flow between driving and
driven gates due to inherently very high DC input resistances. This characteristic allows
for high fan-out (dependent on switching frequency) as noted in Table 400-1. Packing
densities can be very high, partially due to lack of need for resistors or diodes as circuit
components. Further discussion of CMOS logic is provided by paragraph 400.2.10.3.
Results of extensive screening tests indicate that while products of a well developed technology,
such as simple TTL logic gates, had production fallout on the order of 1 percent of units tested,
many newer and more complex devices had an alarmingly high fallout rate (5 percent to 19
percent). High device fallout rates become more significant when hundreds of devices are
assembled into a completed assembly that is difficult and expensive to repair. Fallout rates of
todays state-of-the-art devices will no doubt decrease and stabilize as their technologies mature.
This is accounted for in the IC learning factor of MIL-HDBK-217 IC failure rate prediction
method. In the meantime, it seems necessary for any serious user of complex ICs or LSI
products to be prepared to perform comprehensive device screening in an attempt to find
marginal devices to avoid high maintenance and repair/rework costs in the field.
The linear line of integrated circuits can be indexed by functional applications such as:
Voltage Regulator
Voltage Reference
Operational Amplifier
Instrumentation Amplifier
Voltage Comparator
Analog Switch
Sample and Hold Amplifier
Analog to Digital Converter (A-D)
Industrial/Automotive/Functional Blocks
Audio, Radio and TV Devices
Transistor Arrays
The absolute maximum ratings specified for these devices are similar to those of discrete
transistors.
RTL 1. Low supply voltage, low power dissipation 1. Low voltage-noise immunity
2. Relatively low noise generation 2. Low fanout
3. Most functions capable of implied AND 3. Obsolete (circuits will become
connection scarcer and expensive)
HTL 1. Best voltage and energy noise immunity 1. Relatively expensive logic
2. Largest logic swing form
3. Interfaces well with electromechanical 2. Large gate delays
components. 4. Compatible with discrete 3. Relatively high power
power control devices such as Silicon dissipation
Controlled Rectifiers (SCRs) 4 Fewer functions available at
present than other forms.
TTL 1. Highest speed of saturating logic forms 1. High voltage and current
2. Good immunity to energy noise switching rates require careful
3. Active pull-ups provide excellent drive layout to avoid cross talk
capability 2. Internal current transients
4.Good fanout require well bypassed supplies
5. Wide and expanding variety of available 3. Active pull-up prevents
functions implied AND connection in
6. Readily available from many sources; most forms
medium speed TTL is very cost competitive 4. All forms except medium
with other logic forms speed are relatively expensive
ECL 1. Highest speed logic available 1. Supply and logic levels require
2. Compatible with transmission line inter- inter- facing circuits to saturating
connection logic types
3. Low levels of noise generation 2. Power dissipation higher than
4. Good fanout capability some families
5. Implied OR capability 3. Low external noise immunity
6. Complementary outputs 4. High speed versions relatively
high in cost
I2L 1. Lowest (best) delay time-power product 1. Low external noise immunity
2. Operates on very low supply currents per 2. Not available in a broad range
gate of functions
3. Simple, high density structure promises 3. Unable to drive capacitive
4. Low internal noise generation loads or transmission lines
5. Compatible with TTL drivers 4. Higher gate delays than TTL
or ECL
MOS 1. Low power dissipation (especially CMOS 1. Inherently slower than most
2. NMOS gives lowest cost per bit in large bipolar and single channel
memories and shift registers dynamic logic
3. High device densities (especially single- 2. CMOS expensive, PMOS is
channel) becoming obsolete
4. Excellent fannout 3. Poor driving capability
5. CMOS has excellent noise immunity 4. Vulnerable to damage from
6. Excellent for large scale integration static
7. CMOS has very wide power supply range 5. High output impedance
6. Single channel low threshold
circuits have relatively poor noise
immunity
7. Requires insterfacing circuits
to operate with bipolar families
Standard ICs included in MIL-STD-1562 shall be used to the fullest extent practicable. Attempts
should be made to minimize the required number of IC packages. A single MSI (medium scale
integration, defined to have more than 12, but less than 100 gates per chip) can be used in place
of a number of SSI (small scale integration, defined to have less than 12 gates (100
components)). Similarly, an LSI (large scale integration, containing in excess of 100 gates
(1,000 components)) can be used in the system to replace several MSI chips. Thus a system
should be defined in terms of standard MSI and LSI packages, if not VLSI (very large scale
integration, with over 10,000 elements per chip) packages (see section 402). Discrete gates (SSI)
should be used only for interfaces (also called the glue) as required between the subsystem
ICs.
There are four basic types of IC packages: Metal can, flat-packs, Dual-In-Line (DIP), and chip
carrier. There is a further division in that the DIP packages are available in both ceramic and
plastic. Special packages can be designed for specific applications, as the need arises. Approval
for use of plastic and nonhermetically sealed ICs is required from the procuring activity.
In some cases, only one style is available for a particular IC. For example, where the IC operates
at high power, and dissipates considerable heat, either the TO-3 or TO-5 metal can is required,
because it permits the use of heat sinks or mounting directly on a metal chassis. Where there is a
choice of package styles, where cost is a factor, or where a large volume of ICs is required, the
DIP is generally the best choice. DIPs are ideally suited for mounting on printed circuit (PC)
boards, since there is more spacing between the leads (typically 0.1 inch) than with other
package types. During production, DIPs can be inserted (manually or automatically) into
mounting holes on PC boards, and soldered by various mass production techniques.
The real weak spot in any IC package is at the seals where the leads enter the case or body.
These seals are usually of glass or ceramic, if hermetically sealed, or plastic, if not, and can be
easily broken exposing the chip and unplated metal inside the package. This can occur if the
leads are bent or twisted during production or repair. Also, broken seals can result in moisture
and other undesired elements entering the IC package. While this may not cause immediate
failure, it will shorten the life of the IC. The exposed bare metal under the seal can also corrode,
and affect the IC performance.
If reliability is the major factor, the ceramic flat-pack is generally the best choice. Ceramic ICs
are hermetically sealed to protect the silicon chip. Flat-packs also have an excellent history of
reliability. Flat-packs are smaller and lighter than DIPs, with all other factors being equal.
Ceramic flat-packs are usually the choice for many military applications, except where high
power is involved (there a metal can is preferred for heat dissipation).
Once the package type has been selected, the IC must be mounted and electrically connected to
other parts. The selection of a particular method of mounting and connection of ICs depends
upon: the type of IC package, the equipment available for mounting and interconnection, the
connection method used (soldering, welding, crimping, etc.), the size, shape and weight of the
overall equipment package, the degree of reliability, the ease of replacement in the field, and the
cost factor. The following sections summarize mounting and connection methods for the three
basic package types.
During the breadboard stage of design, the IC packages can be mounted in commercially
available sockets. This will eliminate soldering and unsoldering the leads during design and test.
Such sockets are generally made of Teflon or similar material, and are usually designed for
mounting on a PC board. Other IC sockets are designed for metal chassis mounting. In other
cases, the IC can be soldered to the socket that is in the form of a plug-in PC card. The card can
then be plugged into or out of the circuit during testing. (The use of sockets for production of the
finished product, however, should not be done due to intermittent open circuit problems with
such hardware.)
There are a number of methods for making solder connections to flat packs. The notch in one
end of the package which is used as a reference point to identify the lead numbering is generally
nearest to lead number 1. Always consult the manufacturers data regarding IC lead numbering.
Some common soldering techniques use in-line lead and pad arrangements. Although such
arrangements simplify lead forming, they result in very close spacing between leads (typically
.032 inches) and require the use of high precision production techniques in both board
manufacture and the assembly of ICs on the board, particularly when leads must be inserted
through holes in the PC board. Another disadvantage of the in-line arrangement is the limited
space available for routing circuit conductors between adjacent solder pads.
Some of these disadvantages as referred to earlier can be overcome by the use of a staggered lead
arrangement. In these staggered arrangements the lead holes and terminal pads for adjacent
leads on the same edge of a flat package are offset by some convenient distance from the in-line
axis. Although a staggered lead arrangement requires somewhat more PC board area per IC than
the in-line arrangement, staggered leads provide several advantages:
(3) more space is available for routing circuit conductors between adjacent terminal
connections; and
The most commonly used method for soldering TO-5 style packages is lead insertion into
properly plated-through holes in the PC board with connection completed by wave soldering.
Because the package configurations are very similar, the mounting arrangements and terminal
sorting techniques used for these circuits are much the same as those used in the in-line method
of paragraph 400.2.3.2 above, for the flat-pack ICs. The DIP terminal leads are larger than those
of the flat-pack; the larger sized terminals are more rigid and more easily inserted in PCB or IC
socket mounting holes.
Another significant feature of the DIP is the sharp step increase in width of the terminals near the
package end. This step forms a shoulder upon which the package rests when mounted on the
board. Thus, the DIP package is not mounted flush against the board and as a result, allows
printed circuit wiring directly under the package. Also, convection cooling of the package is
enhanced somewhat, and the component/circuit board can be easily removed if required.
As of this issue of this manual, SMT is considered to be a relatively new technology, in the sense
that internal industry elements or infrastructure, for provision of trained technical personnel, i.e.,
engineers, technicians, procurement functions, available vendors for components and materials,
etc., are not as abundant as those for through-hole technology. As of this writing, industry or
military standards for SMT are still evolving. Some examples of current documents are:
SMT may be thought of as an extension of hybrid circuit technology, which utilizes a mix of ICs
and discrete active and passive circuit elements, all mounted on a single circuit board, either
single- or double-side. The technology has evolved to the extent that surface mount assemblies
can be separated into three configurations, in which production processes differ, and require
different equipment for production:
Type A combination of Type I and Type III (see below), although the Type II usually
II: has no active components bottom mounted.
Type The assembly contains only through-hole components on the top side and only
III: discrete SMT components such as resistors, capacitors, inductors, and
transistors which are glued to board bottom sides.
a. Reduction in weight and size of complete board assemblies by use of small outline
integrated circuits (SOIC) and small lead-pitch (lead spacing) packages (sometimes
referred to as fine-pitch packages).
b. Enhancement of shock and vibration resistance due to decrease in component mass and
shorter lead length.
c. Reduction in undesirable circuit operational side effects such as propagation (dead time)
delay, parasitic signal generation (noise), with a corresponding reduction in the need for
decoupling capacitors.
d. Reduced circuit board manufacturing costs, including material handling costs. Since hole
drilling and sizing is reduced, trace routing is improved for those SMT designs not
utilizing fine pitch of .25 inch and less. For those assemblies, the number of drilled holes
can be the same or more than an equivalent through-hole printed wiring board.
Different parameters should be considered in layout of each type of IC. For example, most linear
ICs have high gain, and are thus subject to oscillation if feedback is not controlled by circuit
layout. On the other hand, digital ICs rarely oscillate due to low gain, but are subject to noise
signals. Proper circuit layout can minimize the generation and pickup of such noise. The
following paragraphs describe those circuit layout problems that IC users must face at one time
or another.
All logic circuits are subject to noise. Therefore, it is recommended that noise and grounding
problems be considered from the very beginning of design layout.
Wherever DC distribution lines run an appreciable distance from the supply to a logic chassis (or
a PC board), both lines (positive and negative) should be bypassed to ground with a capacitor, at
the point at which the wires enter the chassis.
Use 1 to 10 F capacitors for power-line bypass. If the logic circuits operate at higher speeds
(above 10 MHz), add a 0.01 F capacitor in parallel with each 1 to 10 F capacitor. Note that even
though the system may operate at low speeds, there are higher frequency harmonics generated.
These high frequency signals may produce noise on the power line and connecting wiring. If the
digital ICs are particularly sensitive to noise, as is the case with the TTL logic form, use at least
one additional bypass capacitor for each 12 IC packages.
The DC lines and ground return lines should have cross sections sufficiently large to minimize
noise pickup and DC voltage drop. Unless otherwise recommended by the IC manufacturer, use
AWG No.20 or larger wire for all digital IC power and ground lines.
Keep all leads as short as possible to minimize noise pick up. Typically, present day logic
circuits operate at speeds high enough so that the propagation time through long wire or cable
can be comparable to the delay time through a logic element.
The problem of noise can be minimized if ground planes are used, that is, if the circuit board has
solid metal sides. Such ground planes surround the active elements on the board with a noise
shield. If it is not practical to use boards with built-in ground planes, a wire should be run
around the outside edge of the board with both ends of the wire connected to a common or
equipment ground.
Do not run logic signal lines near a clock line for more than 7 inches because of the possibility of
cross talk.
Some digital IC manufacturers specify that a resistor (typically 1 k) be connected between the
gate input and the power supply (or ground, depending upon the type of logic), where long lines
are involved. Always check the IC data sheet for such notes.
The main problem with layout of linear ICs is undesired oscillation due to feedback. Since the
ICs are physically small, the input and output terminals are close, creating ideal conditions for
the occurrence of undesired feedback. To make matters worse, most linear ICs are capable of
passing frequencies higher than those specified on the data sheet.
For example, an operational amplifier used in the audio range (i.e., up to 20 kHz with a power
gain of 20 dB) could possibly pass a 10 MHz signal with some slight gain. This higher
frequency signal could be a harmonic of signals in the normal operating range and, with
sufficient gain, could feedback to the input and produce undesired oscillation. Therefore, always
consider linear ICs as being RF, in laying out circuits, even though the IC is not rated for RF
operation and the circuit is not normally operated at such frequencies. The use of a capacitor to
bypass IC power supply terminals to ground will aid in providing a path for any RF.
Keep IC input and output leads as short as possible. Use shielded leads wherever practical. Use
one common tie point near the IC for all grounds. Resonant circuits can also be formed by poor
grounding or by ground loops in general.
ICs mounted on PC boards (particularly with ground planes) tend to oscillate less than instances
in which conventional wiring is used. For that reason, an IC may oscillate in the breadboard
stage, but not when mounted in final layout form.
Once all of the leads have been connected to an IC and power is applied, monitor all IC terminals
for oscillation with an oscilloscope before signals are applied.
IC data sheets do not necessarily list all of these parameters. It is quite common to list only the
maximum power dissipation for a given ambient temperature and a maximum power decrease
for a given increase in temperature.
For example, a typical IC might show a maximum power dissipation of 110 mW at 25C, with a
decreasing power rating of 1 mW/C for each degree above 25C. If this IC is operated at 100C,
the maximum power dissipation would be: (100 mW -- (100C-25C)(1 mW/C)) = 25 mW.
In the absence of specific data sheet information, the following typical temperature
characteristics can be applied to the basic IC package types:
c. Dual-in-Line (ceramic):
As previously stated, power ICs usually use either the TO-3 or TO-5 style package. The package
is metal and is typically used with some type of heat sink (either an external heat sink or the
metal chassis). The data sheets for power ICs usually list sufficient information to select the
proper heat sink. Also, the data sheets or other literature often provide recommendations for
mounting power ICs. Always follow the IC manufacturers recommendations. In the absence of
such data and to make the reader more familiar with the terms used, the following sections
summarize considerations for power ICs.
Thermal resistance can be defined as the increase in temperature of the semiconductor material
(transistor junctions), relative to some reference, per unit power dissipated.
Power IC data sheets often specify thermal resistance at a given temperature. The IC
characteristics can change with ambient temperature and with the variation in power dissipation.
Most ICs incorporate circuits to compensate for temperature effects. In power ICs, thermal
resistance is normally measured from the semiconductor chip (or pellet) to the case. This results
in the term JC.
When current passes through a transistor junction, heat is generated. If this heat is not dissipated
at the case, the junction temperature will increase. This temperature increase causes more
current to flow through the junction, even though the voltage and other circuit values may remain
constant. With a corresponding increase in current flow the junction temperature increases even
further until the transistor burns out. This is known as thermal runaway.
Temperature compensation circuits have been developed by IC manufacturers; the most common
approach places a diode in the reverse bias circuit for one or more transistors in the IC.
If a power IC is not mounted on a heat sink, the thermal resistance from case to ambient would
be so large the allowable power dissipation would be minimal. In general 1 watt is the maximum
power dissipation for an IC operating without a heat sink. At higher power dissipation levels it
becomes impractical to increase the size of the case to make the case-to-ambient air thermal
resistance term comparable to the junction-to-case term.
To properly design a heat sink for a given application, the thermal resistance of both the IC and
heat sink must be known. Commercial fin-type heat sinks can be used with T0-5 style ICs. Such
heat sinks are especially useful when breadboard ICs are mounted in Teflon sockets, which
provide little thermal conduction to the chassis or PCB. (It should be noted, however, that
production design should not use socket mounts.)
Commercial heat sinks are rated by the manufacturer in terms of thermal resistance, usually in
C/W. For example, if the heat sink temperature rises from 25C to 100C when 25 W are
dissipated, the thermal resistance is 75/25 = 3. This would be listed on the data sheet as a SA of
3C/W. With all other factors being equal, the heat sink with the lowest thermal resistance
(C/W) is best.
Practical heat sink considerations are as follows:
a. When ICs are to be mounted on heat sinks, some form of electrical insulation is usually
required between the case and heat sink since most IC cases are not at electrical ground.
b. Because good electrical insulators usually are also good thermal insulators, it is difficult to
provide electrical insulation without introducing some thermal resistance between case and
heat sink. The best materials for this application are mica and beryllium oxide (Beryllia),
with typical C/W ratings of 0.4 and 0.25, respectively.
c. The use of a zinc oxide filled silicon compound between the washer and chassis, together
with a moderate amount of pressure from the top of the IC helps to decrease thermal
resistance. If the IC is mounted within a fin-type heat sink, an insulated cap should be
used between the case and heat sink.
d. When a washer is added between the IC case and heat sink a certain amount of capacitance
is introduced. In general, this capacitance will have no effect on operation of ICs unless
operating frequency is above 100 MHz. Rarely, if ever, do power ICs operate above the
audio range. Thus, few such problems should be encountered.
The effects of temperature extremes, either high or low, will vary with the type of IC involved,
case style and fabrication techniques of the manufacturer. The following general rules can be
applied to most ICs:
a. In some instances, the IC will fail to operate at temperature extremes, but will return to
normal when the operating temperature is returned to the normal range.
b. In other cases, the IC will fail to operate properly once it has been subjected to a
temperature extreme. In effect, the IC is destroyed once it is operated at an extremely high
temperature primarily because of thermal runaway.
d. If power supply voltages, input signals, output loads, and ambient temperatures specified
on the data sheet are observed, there should be no danger of failure for any IC. However,
as a final check, multiply the rated thermal resistance by the maximum device dissipation
and add the ambient temperature. If the result is less than the maximum allowable
temperature defined on the appropriate derating curve, the device application is acceptable.
All IC power supply voltages should be referenced to a common ground, which may or may not
be earth or equipment ground.
As in the case of discrete transistors, manufacturers do not agree on power supply labeling for
ICs. Some manufacturers use V+ to indicate the positive voltage and V- to indicate the negative
voltage, whereas another manufacturer might use the symbols VEE and VCC to represent negative
and positive respectively. Thus, the IC data sheet must be studied carefully before connecting
any power source. Typically, digital IC power supplies must be kept within + 5 to + 10 percent,
whereas linear ICs will generally operate satisfactorily with power sources of + 20 percent.
Power supply ripple and regulation are also important. Solid state power supplies with filtering
and voltage regulation are recommended. Ripple and any other power supply noise must be kept
below 1 percent for noise sensitive circuits. Proper sequencing of supply voltages should be
observed; refer to the manufacturers specifications.
Proper value capacitors are used with power supply circuits to provide decoupling of the power
supply (signal bypass). Usually, disc ceramic capacitors are used for this purpose. The
capacitors should always be connected as close to the IC terminals as is practical, not at the
power supply terminals. For linear IC power supply decoupling capacitors use capacitance
values between .1F and .001F.
The specification sheets for linear ICs usually specify a nominal and possibly a maximum
operating voltage, as well as a total device dissipation, which is defined as the DC power
dissipated by the IC itself with output at zero and no load. The required current is obtained by
dividing the power by the voltage.
Digital ICs operate with pulses. Thus, current is maximum in either of two states, but not in both
states. Most digital IC data sheets list the current drain for the maximum condition.
Manufacturers list IPDL, the current drain when the logic signals are low, or IPDH, the high-state
current drain. If both IPDL and IPDH are listed, it is obvious that the higher of the two indicates the
maximum current drain state. Thus current drains should be averaged to calculate power. The
current requirements for digital ICs are also affected by the operating speed of the logic circuits
and the type of loads into which the IC must operate.
A digital IC will require more current as the operating speed is increased. Generally, the data
sheet will list a nominal operating speed, a maximum operating speed, and the current drain
at the nominal speed. The IC should never be operated beyond the maximum speed limit.
When operating between the nominal and maximum speeds, the additional current can be
approximated by adding 0.5 to 1 mA for each 1 MHz of speed increase.
400.2.9 Application Data for Commonly Used Linear ICs
The source of signal error in the op-amp is due to the non-ideal parameters of the device.
However, in many applications, the difference between ideal and actual parameters are close to
negligible in terms of overall performance. The two parameters affecting signal output error are:
finite open-loop gain and finite input resistance. (The ideal characteristics are infinite open-loop
gain and input resistance). These two non-ideal parameters produce: offset voltage at input;
offset current at output; input noise; frequency instability and bandwidth limitations.
a. Offset Voltage Error -- In applications where a source of error due to input offset voltage
is undesirable, select devices with minimum offset voltage characteristics and configure
the circuit for offset voltage nulling.
b. Offset Current -- If use of an op-amp with high input resistance and low bias current is
required then the FET input op-amp should be considered. FET input op-amp features
initial (room temperature) bias currents in the 10-12 ampere region, however, they have
relatively high positive temperature coefficients in terms of change in input bias current
versus change in temperature. This characteristic must be considered.
c. Input Noise -- In choosing an op-amp, the requirement will often dictate a source
resistance from which the amplifier must operate. This will dictate the noise performance
specification of the device. In general, low input current amplifiers, such as FET input
op-amps or low bias current bipolar type op-amps will have lower noise factor with
impedances above 10 k. Below 10 ksource impedance, the bipolar input op-amp has the
lower noise factor. Another consideration is that the noninverting configuration has only
half the noise gain as the inverting configuration for equal signal gain, therefore, it offers a
lower signal-to-noise ratio. In addition, optimum noise performance may be obtained by
the use of transformer coupling.
d. Frequency Instability and Limited Bandwidth -- Frequency compensation and slew rate
considerations are the most important for optimum ac performance in terms of stability.
Frequency compensation is obtained by external circuitry or by selection of devices with
internal compensation.
e. Latch-up -- Latch-up occurs most often in voltage follower stages where the output
voltage swing is equal to the input, and the op-amp output is driven to high levels.
Methods to eliminate this failure mode must be considered.
f. Output Short Circuit Protection -- Devices with limiting at the output should be
considered in the design. If this protection is not internal to the chip, external protective
circuitry must be provided.
b. Offset Voltage Drift -- Circuitry can be provided to initially adjust offset voltage to
minimize null offset voltage errors.
c. Wire Size -- One of the principal sources of error in high current and extremely close
regulation tolerance is the wire size used between regulator terminal and load resistance.
Wiring voltage drop must be considered.
The TTL microcircuit families provide general purpose logic with medium to high speed signal
propagation, good noise immunity, and a high degree of economical logic flexibility. The
switching speeds, especially associated with the very fast rise and fall of the circuits, are in the
RF range and good high frequency circuit layout techniques have to be used.
Fanout capability is determined and specified by the device manufacturer. The voltage and
current conditions needed for medium power TTL devices are normalized to a fanin or a fanout
of a certain number of TTL loads. For applications requiring the device to drive more than the
specified TTL load a buffer device should be used. Types of TTL devices are:
a. Standard -- Intended for use in implementing logic functions where speed and power
requirements are not critical. This family offers a full spectrum of logic functions in
various packages. Typical gate power dissipation is 10 mW with a typical propagation
delay time of 10 ns. These devices exhibit a fanout of 10 when driving other standard TTL
devices and are usually used to perform general purpose switching and logic functions.
b. Low Power -- Employed in logic design where low power dissipation is a primary concern.
These devices have a typical gate power dissipation of 1 mW with a typical propagation
delay time of 30 ns. Typically, these devices will drive only one standard TTL device but
exhibit a fanout of 10 when driving other low power devices. Low power generates less
heat and therefore allows for greater board densities. Lower current levels also introduce
less noise and reduce constraints on power supplies.
c. High Speed -- Used to implement high speed logic functions in digital systems. These
devices employ a Darlington output configuration to achieve a typical propagation delay
time of 6 ns. The typical gate power dissipation is 23 mW. These devices can drive up to
12 standard TTL devices and exhibit a fanout of 10 when driving other high speed devices.
These devices are used in high speed memories and central processor units.
d. Schottky -- Used when ultra-high speeds are desired. These devices employ shallow
diffusions and smaller geometries which lowers internal capacitance to reduce delay time
and sensitivity to temperature variation. Typical delay time is 3 ns and power dissipation
is 19 mW per gate. However, this power dissipation increases with frequency. These
devices can drive 12 standard TTL devices and up to 10 Schottky devices. Noise margin is
typically 0.3 volt. A ground plane is recommended for interconnections over 6 inches long
and twisted-pair lines for distances of 10 inches.
The general application data for ECL microcircuits are the same as that for TTL type. The ECL
type microcircuits are intended for use in digital systems requiring high switching speeds and
moderate power dissipation. Typical propagation delay time is 2 ns and typical power
dissipation is 25 mW. The logic levels (-0.9V and -1.7V) are not as easily detected as those of
TTL devices. Intended for use in high speed systems such as central processors, memory
controllers, peripheral equipment, instrumentation and digital communications. Typical DC
fanout can approach 90; while AC fanout is usually limited to 5 due to circuit response-time
consideration when driving ECL devices.
The CMOS devices are intended for use in applications where low power is extremely desirable
and high speeds are not essential. The typical power dissipation is 10 mW and increases with
frequency. Typical delay time is 50 ns. A typical fanout for a CMOS gate is 50 CMOS loads or
1 TTL unit load. Noise immunity is typically 2.25 volts for CMOS compared to 0.4V for
standard TTL devices when powered by a 5 volt supply. This makes these devices useful in high
noise environments. These devices are highly tolerant of power supply variation and operate
anywhere in the range of 3 to 15 volts. Characteristics are as follows:
a. Input Source -- The input requires a minimal current (typically 10 pico amps) voltage
source in the low or high logic state. The voltage source has to be less than the device
operating power supply voltage range.
b. Output Load -- The fanout or output loading factor is determined by the current or sink
capability of the device or the number of logic gates that can be controlled. The output of
CMOS digital microcircuits generally satisfies the input source requirements for other
CMOS devices.
Almost all integrated circuits are found to be susceptible to damage by electrostatic discharge.
ESD handling precautions compatible with DOD-STD-1686 and DOD-HDBK-263 shall be
observed, not only for individual ICs, but for assembled and mounted circuits as well.
When using linear microcircuits, power shall be derated according to the maximum allowable
derating curve as shown in Figures 400.2, 400.3, 400.4, 400.5, 400.6 and 400.7. In those
instances in which Ts may differ from the values provided (due to device composition or
construction) the derating curves should be appropriately revised.
Figure 400.2 -- Derating Requirements for all Hermetically Sealed Microcircuits, Except
Voltage Regulators, With TS = 25C
Figure 400.3 -- Derating Requirements for all Nonhermetically Sealed Microcircuits, Except
Voltage Regulators, With TS = 125C
Figure 400.4 -- Derating Requirements for Hermetically Sealed Voltage Regulators With TS =
25C
Figure 400.5 -- Derating Requirements for Hermetically Sealed Voltage Regulators With TS =
110C
Figure 400.6 -- Derating Requirements for all Nonhermetically Sealed Microcircuits, Except
Voltage Regulators, With TS = 25C
Figure 400.7 -- Derating Requirements for Nonhermetically Sealed Voltage Regulators With TS
= 25C
Note: Nonhermetically sealed microcircuits shall not be used without approval from
the procuring activity.
In addition to limitations of the above derating curves, the following parameters shall be limited
as follows:
Table 400-IIIA -- provides derating parameters for linear hermetically sealed microcircuits.
Table 400-IIIA*
Parameter % of Max.
rated value
Current 70
(continuous)
Current (surge) 60
Voltage (signal) 75
Voltage (surge) 80
Table 400-IIIB
% of Max.
Parameter rated value
Current 60
(continuous)
Current (surge) 60
Voltage (signal) 75
Voltage (surge) 80
Table 400-IV
Parameter % of Max.
rated value
Fanout 80
a. There may occur, from time-to-time, instances in which nonstandard ICs are approved for
uses which have maximum function temperatures which do not exceed 75C. In these
instances, derate the 75C maximum rating to 60C.
b. Gallium Arsenide (GaAs) digital device (both discrete as well as integrated networks)
maximum junction temperature should not exceed 160C. GaAs and Gallium Phosphide
(GaP) power devices should not exceed 200C. These increases in maximum junction
temperature is primarily due to the Ga metallic interface characteristics versus the oxide
stresses prevalent in Si devices.
402 Micron/Submicron Digital Devices: Very High Speed Integrated Circuits (VHSIC)
And VLSI ICs
The goal of the VHSIC program is to develop advanced semiconductor technology for military
applications and to reduce the delay experienced by the Department of Defense in introducing
such technology into military hardware. This section is intended to facilitate that goal while
reducing the governments exposure to undue risks.
The acronym VHSIC refers to the DoD technology development program (1980 -- 1989) for the
design and manufacture of high speed digital circuits with 1.25 and 0.5 micrometer feature sizes
for military use. Although the official DoD VHSIC program came to completion in FY 89,
VHSIC manufacturing technology insertion, and submicron chip development continues. Device
feature size is the minimum lateral dimension of the integrated circuit as defined by the
lithographic process during fabrication. A prime example is the dimension of transistor gate
length.
Information provided by this section is applicable to all digital micron and submicron ICs
meeting the general requirements of VHSIC devices such as testability, speed, feature size and
VHSIC Hardware Description Language (VHDL) documentation. In this sense, VHSIC is used
as a generic term to mean 2.0 micron technologies and smaller. VHSIC components are in
essence high density Very Large Scale Integration (VLSI) ICs. The density increase is
accomplished by scaling devices to very small geometries with a corresponding increase in the
Functional Throughput Rate (FTR). FTR (Gate-Hz/sq. cm) is defined as the product of on-chip
clock speed (Hz) and the gate density (logic gates per square centimeter).
Parallel to the design and manufacture of VHSIC chips, supporting technologies have evolved in
design automation and lithography. VHDL has been incorporated in IEEE-1076, and all digital
Application-Specific Integrated Circuits (ASICs) designed after 30 September 1988 are required
to be documented by structural and behavioral VHDL syntax.
Electron beam lithography has been a key technology in the fabrication of submicron chips.
E-beam lithographic equipment with high wafer throughput is necessary to enhance yield and
reduce unit cost. This development will eventually permit circuit patterns with feature size as
small as 0.25 micron. Since X-rays have extremely short wavelengths, X-ray lithography is
critical for the fabrication of next generation chips. With advances in X-ray optics, the
fabrication of pilot line 0.10 micron devices is feasible although not anticipated until the mid to
late 1990s.
Single-chip VHSIC packages as well as multi-chip sets are available for technology insertion.
The predominant technology in use is CMOS due to its low power requirements, noise
immunity, and radiation hardness capability. In VHSIC-based systems, a trade-off study of the
type of technology to be used should be performed and be submitted to the Government. VHSIC
technology insertions have been successfully demonstrated by the Navy and other services in a
number of critical programs. VHSIC technology has matured to a level where it can be deployed
in new systems and retrofit existing systems. Advantages of VHSIC include an increase in
reliability due to a reduction in the number of components and interconnects, reduction in size
and weight of existing hardware, and a reduction in power consumption.
VHSIC technology chips are typically produced in two basic types of single chip packages:
perimeter chip carriers and grid array packages, shown in Figures 400.9A and 400.9B,
respectively. For certain non-VHSIC micron chips, Dual-In-Line Packages (DIP) and flatpack
packages are available. Most packages are hermetically sealed ceramic. The selection of
package type depends on the application. Multi-chip Packages (MCPs) are also available for
high speed requirements. An example of a MCP is illustrated in Figure 400.10.
The perimeter type package can be Leaded Chip Carriers (LDCC) or Leadless Chip Carriers
(LCC) with I/O counts in the hundreds. The primary advantage of the leadless chip carrier is its
small footprint, which is important on densely populated boards. LCC provides for increased
switching speeds due to shortened circuit paths. However, associated with LCC packages are
mounting problems caused by possible mismatch in the Thermal Coefficients of Expansion
(TCE) between the package and the board. Therefore, the leaded packages are more widely
used. A primary problem associated with the use of the leaded package is the possibility of
damage to leads during handling and testing.
VHSIC chips use two types of LDCC packages, J-Hook and Gull Wing lead packages. The Gull
Wing package is more widely used. Gull Wing leads allow the dimensions of the package to
change with respect to the Printed Wiring Board (PWB) during thermal cycling. This provides a
strain-accommodating interface that serves to reduce stresses on solder joints. However, each
configuration has its own advantages and disadvantages, summarized in Table 400-V.
Advantages shared by both are: proven processes, easy auto-positioning, and resilient placement
and replacement.
The Grid Array package is available in two types of packages: Pin Grid Array and Pad Grid
Array. The packages can contain up to 500 I/O connections. The Grid Array package should be
used for high pin count applications since it has more I/O connections than the perimeter type.
The Pin Grid Array is a square multi-layered ceramic body with rows of pins exiting the base of
the package in a grid pattern. The Pad Grid Array package is the surface mount counterpart of
the Pin Grid Array package. The Pad Grid Array has an area pad array of solderable bonding
pads for electrical connection to the underlying substrate. The primary reason for the limited use
of the Pin Grid Array is the difficulty of inspecting solder joints underneath the package due to
minimal component standoff height. For this reason Pin Grid Arrays are not recommended for
Navy programs.
Multi-Chip Packages (MCPs) are available for VHSIC chips. The packages are Pin Grid Array
packages which connect to the board with the possibility of over 600 I/O connections. The MCP
should be used in high speed applications to take advantage of the increased speed capability of
submicron chips. The speed performance is enhanced by shorter interconnections within the
package as opposed to individual packages. MCPs are hermetically sealed ceramic modules
which can house a number of chips, typically 5 to 16. The MCP uses thin film multi-layer
copper conductors with polyimide dielectric for chip-to-chip interconnections. Chip-to-chip
interconnection can be incorporated in a multi-layer Tape Automated Bonding (TAB) system
customized for each chip combination. The package also has distributed power and ground
planes and provisions for decoupling capacitors.
The three most common chip-to-package electrical interconnection schemes are wirebonding,
tape bonding, (TAB) and flip-chip or solder bumping techniques. Table 400-VI compares these
alternate interconnection methods to assist in the selection of the appropriate method.
DISADVANTAGES
Wirebonding is performed on integrated circuits after a die has been separated from a wafer and
attached to the package or substrate. Gold or aluminum wires are typically used. There are
several problems associated with the use of wirebonded interconnections with high density I/O
and high speed, integrated-circuit chips. The primary concern is the possibility of shorting
between adjacent wires. A second concern is the inability to control the impedance of the wire
leads.
A third method is solder bumping or flip-chip. In this attachment technique, solder nodules or
bumps are attached to the chip bonding pads and the substrate lead pattern. The die is then
inverted over the substrate and bonding is accomplished by a reflow method. Solder bumping
provides very short, low-resistance leads, which minimizes lead inductance. This is particularly
useful for the high-frequency operations encountered in VHSIC chips. The disadvantages in this
process include solder joints under the chip that are not fully inspectable prior to packaging and
poor heat transfer since the only path is through the solder bumps.
402.3 Mounting
The mounting method is dependent upon the type of package selected. There are two basic
techniques for attaching packaged chips to circuit boards. Through-hole mounting and surface
mounting. Since there may be a large TCE mismatch between the PWB and the device, solder
joint problems may result when using LCC packages. This is especially the case for large ICs
such as VHSIC-type devices. Surface mounted leadless chip carriers with pin counts greater
than 24 should not be used unless the contractor can verify that reliability requirements will not
be adversely affected. The following sections describe the different methods of mounting as
well as various reliability considerations. The most reliable and recommended configuration of
the discussed package and mounting techniques is the Gull Wing leaded package surface
mounted to a ceramic board.
The Pin Grid Array package requires the use of plated-through hole mounting techniques for
connection to the circuit board. These holes hold component leads and serve as conduits, or vias
for interconnections between the circuit board layers. This type of mounting has several
disadvantages for VHSIC applications, which include reduced circuit board density (due to the
through-hole via structure), difficulty of repair (removing package leads can damage
through-hole structures, especially as I/O numbers increase), and increased inductance due to
long round wire leads. To avoid hole mounting by use of surface mounting, the pins may be
modified or a Pad Grid Array may be used. However, surface mounting has a number of
associated problems which have not been resolved, as discussed in Section 402.3.2. Therefore,
for high I/O count applications, the hole mounted Pin Grid Array package is recommended and is
currently the most commonly used Grid Array package.
Perimeter type packages, both leadless and leaded, are connected to the board using Surface
Mount Technology. Surface mounting of leadless, Gull Wing, or J-Hook leaded components to
various circuit board materials is the dominant thrust in modern device packaging. In this
technique, leaded or leadless packages are soldered to the surface of the circuit board. No
through-hole mounting is required. Vias are made without through-hole drilling and plating,
allowing an increase in circuit board density. Repair is also easier since most joints are
accessible and not locked into holes.
One of the main reliability concerns of Surface Mount Technology is solder joint integrity. This
is because the solder joint acts as both electrical and mechanical connection between the
component and the board. One factor which affects the solder joint is the difference in the TCE
between the printed wiring board and the chip carrier. When materials with different TCEs are
joined and exposed to temperature variations, mechanical stresses due to TCE result. Such stress
is applied directly to the solder joint. To minimize this mechanical stress, the following
guidelines should be followed:
a. Match the PC board material and interconnection material TCEs with that of the chip
carrier. Inner core materials which should be considered are copper-invar-copper, copper-
molybdenum-copper, and epoxy graphite.
c. Develop a substrate with compliant top layers that can absorb the stress.
d. Affix or manufacture ceramic chip carriers with leads, since the leads act as compliant
members between the package and the board.
Table 400-VII lists TCEs of various materials used in packages and substrates. TCE mismatch
between the package and substrate should not exceed 2 PPM/C for LCC. In the event that TCE
mismatch is large, the contractor should verify that system reliability has not been adversely
affected.
Refer to MIL-STD-2000 for component mounting guidelines and acceptance criteria. When
analog and digital ICs are mounted on the same board, separate analog and digital ground planes
must be used to protect the analog circuits from digital noise corruption.
Alloy 42 5
Copper-Clad Invar 5 to 6
Copper-Clad Molybdenum 5 to 6
Glass Fiber 4 to 5
Epoxy/Glass Laminate 12 to 16
Polyimide/Glass Laminate 11 to 14
Polyimide/Kevlar Laminate 3 to 8
Polyimide/Quartz Laminate 6 to 9
Epoxy/Kevlar Laminate 6 to 8
Aluminum 18 to 24
Copper 17
Since operating temperature is one of the critical attributes affecting reliability, it is essential that
sufficient cooling precautions be taken to assure adequate heat dissipation. The amount of heat
produced is proportional to the power. Power dissipation of VHSIC chips varies from .5 Watt to
5 Watts per chip, and up to 30 Watts for the multi-chip package. Typically, single-chip packages
range in size from one square inch to four square inches. Multi-chip packages can be up to 9
square inches in size.
The primary means of dissipating generated heat is through the package base and mounting to
the printed circuit board or ceramic substrate. Ceramic packages, either alumina or beryllium
oxide, offer better thermal conductivity than other packages. Thermal pads, placed directly
under the die, can be bonded to the substrate to enhance thermal conductivity. Heat sinks may
also be used to enhance heat transfer. The ideal placement of the heat sink would be in direct
contact with the bottom of the chip or package.
Both short and detailed models were developed for CMOS VHSIC devices but may be applied to
other MOS integrated circuits. However, the models should not be extrapolated to determine
failure rates of Bipolar components. Failure rates obtained from other sources require the
approval of the procuring activity. A brief discussion of the models is presented in 402.5.1 and
402.5.2 to provide some familiarization.
This model is derived from the detailed model and includes only those parameters that can
readily be obtained. The failure rate factors are listed in Table 400-VIIIA through Table
400-VIIIF.
p = [BD MFG T SD CD] + [BP E SP PT + EOS]
Quality Level SD
D 1.0
B .94
S .85
Feature Size
(Micron) .1-.2 .2-.4 .4-1.0 1.0-2.0 2.0-3.0
Environment E Environment E
NU 7.7 AUF 12
NH 8.0 SF 1.2
ARW 12 MFA 15
AIC 3.4 ML 17
Quality
Screen Level Level SP
None D 10
Burn-In - 8.0
Environmental - 2.8
Burn-In/Environmental B 1.0
PT
Package Type
Hermetic Nonhermetic
T = Temperature Factor
[- .0002 VTH]
-1n[1-.00057 e]
= [ ]
.00876
Where VTH is the ESD Threshold level of the device using a 100 pF, 1500 ohm discharge model.
Typically, integrated circuits are found to be susceptible to damage by electrostatic discharge.
ESD handling precautions in compliance with or compatible with DOD-STD-1686 and
DOD-HDBK-263 should be observed.
This model calculates the part failure rate based on the aggregate failure rates of various failure
mechanisms. These mechanisms include hot charge carrier effect and metallization. It also
provides the input parameters necessary to apply the model and their default values.
The equations for each of the above failure rates are provided in the model and can be obtained
from RADC.
402.5.3 Failure Mechanisms
The detailed model incorporates failure mechanisms which contribute to the failure of these
semiconductor devices. Both time-dependent and time-independent failures were considered in
the development of the model. Among these mechanisms are metallization electromigration, hot
charge carriers, and oxide failures.
Hot charge carriers are either electrons or holes that have gained sufficient energy from the
electric field to penetrate and then become trapped in the gate oxide resulting in transistor
parameter shifts. Hot charge carrier degradation is a function of transistor geometry, applied bias
voltages, relatively cold temperature, and oxide quality.
Oxide failures include defect-related and wearout-type oxide breakdowns. The model takes into
consideration the thickness of the gate oxide and the maximum power supply voltage (VDD).
Electromigration, hot charge carrier effects, and oxide defects or wearout all increase the
probability of field failures. Appropriate design rules and process controls enhance device
reliability and reduce failure rate. Oxide defect-related failures typically occur early in product
life and devices with such defects are screenable by high-voltage stress or burn-in.
All VHSIC failures should be analyzed in-depth, failure modes identified, and corrective actions
implemented.
402.6 Interoperability
VHSIC submicron chips incorporate electrical and physical interoperability features. Four
specifications (electrical interface, ETM-Bus, TM-Bus, and PI-Bus) have been established (To
date are in the process of being formally issued) defining standards for bus interfaces, clocks,
and voltage levels for single and multi-chip packages. They facilitate the interface between the
chips and provide a digital medium for data communication including the transfer of control and
status bits to test individual devices. These specifications are intended for implementation in any
VHSIC-based system or subsystem employing VHSIC submicron chips and chip sets. These
systems or subsystems should exploit the interoperability standards. The use of other schemes
will require prior approval of the procuring activity.
The four standards include three bus specifications and an electrical specification. The Parallel
Interface (PI) bus is configurable either as a 16-bit (single word) or 32-bit (double word) parallel
bus with either simple parity or single-error correction double-error detection (SECDED)
encoding. The bus can support up to 32 modules residing on a single backplane with extensive
control and data lines. These standards assure that all VHSIC submicron chips can function
together regardless of the supplier. Figure 400.11 illustrates a typical implementation of these
standards.
The purpose and a general overview of each standard are given in Table 400.IX. For a full
description and complete details, refer to the Interoperability Standards. The contractor should
identify any exceptions that may exist in the implementation of the specifications invoked above.
402.7 Testability
As chips, boards, and systems become more complex, engineers should adopt a Design-For-Test
(DFT) philosophy to develop easily testable and maintainable products. This approach reduces,
maintenance costs, increases overall availability, and underlies the Navys at-sea maintainability
policy and requirements. Current VHSIC chip methodology employs Built-In Test/Built-In Self
Test (BIT/BIST) features which should be exploited to enhance system testability and
maintainability.
In VHSIC-based systems, control of the on-chip BIT/BIST is achieved via the interoperability
bus schemes. The ETM-Bus provides a serial path for direct communication between the
elements (devices), while the TM-Bus provides the interface at the board or module level. To
initiate BIT routines, a maintenance controller would transmit control signals to various elements
and in turn receive element status signals. Actual instructions issued to elements are provided by
the device manufacturer and not by the Interoperability Standards.
All digital Application Specific Integrated Circuits (ASICs) designed after 30 September 1988
are to be documented by means of structural and behavioral VHDL descriptions in conformance
with IEEE-1076 and as specified by MIL-STD-454, Requirement 64. It is anticipated that
VHDL will become a mandated standard for more categories of electronic systems at various
levels of hardware development and design abstractions, consequently, it should be used
wherever applicable. VHDL documentation shall be in accordance with DI-EGDS-80811,
VHSIC Hardware Description Language (VHDL) Documentation.
Figure 400.11 -- Typical Use of Interoperability Standards
VHDL is a Hardware Description Language (HDL) which was initiated by the Department of
Defense to provide standard documentation for the design, procurement, and logistics of very
complex components and systems. The development of VHDL began under the auspices of the
VHSIC Program Office. The high level software support environment funded by DoD is
illustrated in Figure 400.12
The analyzer checks the source document, verifies the syntax, and converts it to an intermediate
format which is then used by the simulator to dynamically verify the design. Digital circuits can
be exercised and validated without the intermediate step of prototyping. A Design Library
Manager organizes and accesses the intermediate form data stored and maintained in a Design
Library database. Various tool sets have been marketed by vendors to support VHDL and its
implementation, including analyzers, simulators, and translators. The tool sets either accept
VHDL inputs or generate VHDL output descriptions. Although VHDL describes digital
circuitry, it has some capabilities relating to analog networks. Analog portions of circuits are
expected to be described and documented by an analog HDL at some future date.
A system can be documented by a hierarchy of VHDL modules similar to its physical hierarchy.
VHDL constructs can express structural and behavioral aspects at a wide range of design
abstractions from the system to the gate level and is being extended into switch levels as
illustrated in Figure 400.13. Currently, VHDL does not describe circuits at the level of the
transistor. The focus of VHDL is to aid in reprocurement, maintenance, and support of digital
systems acquired by the Department of Defense.
The purpose of T1SSS is to automate the generation and maintenance of electrical test
specifications and test programs for VHSIC and VLSI devices. It is a database-centered
software support system that is independent of both Computer Aided Design (CAD) and tester
environments. This allows the maintenance of electrical specifications in a standardized,
transportable, computerized format that can automatically generate test programs. The input to
the TISSS system is the appropriate VHDL description of the device. Such data permits the
reprocurement of devices that have been discontinued by the original manufacturer. TISSS
should be used for electrical test specifications and test program generation unless otherwise
specified.
Figure 400.12 -- DoD Funded VHDL Software Support Environment
Figure 400.13 -- Range of Design Abstractions That can be Expressed by VHDL
VHSIC devices have been hardened to withstand the damaging effects of radiation. Radiation by
high energy particles introduces defects into semiconductor lattice structures. The particles of
concern are electrons, protons, photons, alpha particles, neutrons and heavy ions. Two basic
mechanisms dominate the effect of radiation on electronics. Displacement of atoms from their
lattice sites (displacement damage), and generation of electron hole pairs (ionization). Radiation
can cause permanent failures or performance degradation. VHSIC devices used in military
applications should be hardened, as a minimum, to the requirements in Table 400-X. However,
each application dictates its own radiation hardness requirements. Certain applications require
VHSIC technologies which have been radiation hardened to space levels. Two military
standards exist which deal with radiation hardening, MIL-M-38510 and MIL-STD-883.
MIL-STD-883 includes test procedures which define the requirements for testing sealed
semiconductor devices for radiation effects.
Table 400-X lists the radiation threats and threshold requirements. These include: total dose,
ionizing dose rate, single event, and neutron. Total dose is the total radiation energy received by
a device from various radiation environments. This exposure causes a slow degradation of IC
performance until a total permissible amount is reached, when permanent damage is caused. The
permanent effects of ionizing total dose radiation on MDS device characteristics include
threshold shifts, reduced device transconductance, and increased junction and surface leakage
currents.
One of the effects of ionizing dose radiation is transient upset, which is a temporary electrical
disturbance disrupting logic states. Another effect of ionizing dose radiation is circuit latch-up.
Latch-up is a potentially disabling, high current condition caused by high energy, heavy ion
strikes. A device is considered to be latched if a distinguishable change in power supply current
persists 100 seconds after radiation exposure. A limit exists on the maximum ionizing dose
radiation a device can receive without experiencing permanent damage. A device becomes
permanently damaged if it ceases to be functional after irradiation or if it experiences burnout.
Burnout is a catastrophic failure of a device resulting from radiation induced currents.
Single event upset (SEU) is a reversible change in a digital logic state caused by single ionizing
particles. A high energy particle striking an integrated circuit element causes the production of
electron hole pairs. The results include memory bit upset, microprocessor errors, CMOS
latch-up, and burnout in electrically erasable PROMS. Single particles also produce effects that
can cause permanent failures in circuit elements. Single heavy ions can produce a latch-up in
CMOS circuits which can lead to burnout unless the power is removed. The particles of interest
in terms of SEU are high energy protons, alpha particles, and heavy ions.
VHSIC devices are also susceptible to a neutron environment. Neutrons cause both ionization
and atomic displacement damage in semiconductor devices. Neutron irradiation tests are
performed on devices to determine susceptibility to degradation in a neutron environment.
Device parameters must remain within specified limits after exposure to the required level of
neutron fluence.
Another factor which can cause degradation of semiconductor devices is Electromagnetic Pulse
(EMP). EMP creates currents which flow on a systems external surface and cables. These
currents couple energy into the circuits and cause transient and/or permanent failures. Refer to
Appendix F, Section F.2.2.4, for an EMP description.
Circuits vulnerable to EMP require design techniques which harden the system against EMP
damage, including: shielding, filtering, component selection, and circuit layout. High clock
speed circuitry is less susceptible to EMP. For further information regarding the speed threshold
that impacts EMP susceptibility contact the Defense Nuclear Agency (DNA). The agency can
also provide the minimum radiation hardness levels required for space applications.
When using VHSIC devices, power and other parameters should be derated according to the
guidelines established in Section 401 of this manual. However, due to the nature of VHSIC
architecture, the following maximum operating function temperature (Tj) should be observed,
dependent on the line widths used in microcircuit fabrication:
Tj Line Width
A generic qualification concept, Qualified Manufacturers List (QML), has been developed. This
concept is based on Statistical Quality Control and Statistical Process Control (SQC/SPC)
procedures whereby a microcircuit design and manufacturing process is characterized and
continually monitored to assess its quality. QML is a new system which will run parallel to the
Qualified Parts List (QPL). The quality of QML products will be equivalent to QPL-38510
Class B or higher. Only QML products or MIL-M-38510 Class B or higher quality levels should
be used in systems incorporating VHSIC devices. Current Navy policy is directed toward QML
as a preferred qualification methodology. Procedures for microcircuit QML will be in
MIL-1-38535 General Specification for Integrated Circuit Manufacturing.
Next Section
Previous Section
a. Voltage and current requirements -- low current and low voltage situations, for example,
require a plating that will not oxidize because the current may not be able to penetrate an
oxide coating.
b. Resistance -- becomes a critical factor if connectors are in series and the impedances
involved are low.
c. Maximum current -- determined by the connector and the size of wires attached to it, as
well as contact size.
d. Maximum voltage -- depends on the spacing between contacts and insulating material
used.
Other key electrical parameters include surge current, characteristic impedance, insertion loss,
and EMI leakage attenuation.
g. If crimped removable contacts are used, the direction of removal (i.e., front release-rear
removable or rear release-rear removable).
h. The type of receptacle to be employed (i.e., square flange mount or single hole mount).
I. The type of support hardware (clamps, caps, etc.) required and mounting provisions to be
made.
Achieving good electrical contact in a connector is a function of contact surface films, surface
roughness, contact area, plastic deformation of the contacting materials, and load applied. Since
even the best machined, polished, and coated surfaces look rough and uneven when viewed
microscopically, the common concept of a flat, smooth contact is grossly oversimplified. In
reality, the connector interface is basically an insulating barrier with a few widely scattered
points of microscopic contact. The performance of the connector is dependent on chemical,
thermal and mechanical behavior at these contact points.
Current flow between mating materials is constricted at the interface to those small points on the
contact surfaces which are in electrical contact. This flow pattern causes differences of potential
to exist along the contact interface, and causes current bunching at points of lower resistance. As
a result, contact resistance and capacitance are introduced into the circuit, and certain chemical
effects evolve (see 500.2.3.4 on chemical effects).
Since the total contact resistance in a good connector may be small (micro-ohms) and is achieved
by the paralleling along the interface of many higher resistance point conducting paths, a series
of localized hot spots can develop. When high currents are conducted through multiple pins. the
cumulative heat rise in the connector can be appreciable.
Maximum operating temperatures are the sum of ambient temperature and conductor
temperature rise caused by the passage of current. For example, maximum conductor
operating temperature of 125C is based on an ambient temperature of 100C, plus a rise of
25C, due to the conductor carrying current. A graph of service life versus hot spot
temperature is provided in Figure 500-1.
b. Low Temperature Effects -- Metals and nonmetals tend to become brittle and contract in
response to low temperature at different rates because of differing coefficients of
expansion. How important each characteristic is depends on the application. Most high
performance connectors will operate down to -55C. Operation at lower temperature may
require special materials.
Ambient temperatures below normal are not usually the cause of trouble in interconnection
systems, so far as conductivity is concerned. The lower the temperature, the more current can
be carried by a given conductor. However, extremely low ambient temperatures do produce
mechanical failures, mostly occurring in the nonmetallic portions of connectors, wires and
cables. The coefficient of expansion of most plastics and elastomers are so different from
those of the metals used in structural members that they will contract enough at extremely low
temperatures to open seals. An open seal may not cause a malfunction unless moisture and
contaminants enter through the opening. If a seal opens after the temperature of a connector
fall below the freezing point of the contaminants present, and then seals itself before the
melting point of the contaminants is reached, foreign matter will never enter. However, if a
connector seal opens at a temperature where liquid or gaseous contaminants have not been
frozen, contamination can occur.
Most contact failures of connectors are induced by film growth at contact points. These films
can cause increased contact resistance or open circuit. Such increased resistance can cause
higher temperature interfaces, thus increasing the chemical activity. Ions in impurities or
contamination in the surface pores of contacts will migrate to the points of highest potential,
which are frequently the localized hot spots. Ions interfacing with electrons and other
constituents at the points of high chemical activity usually generate nonconducting films. There
is also a continuous supply of material for the growth of insulating films from environments
where there are corrosive elements such as hydrogen sulfide, water vapor, oxygen, ozone,
hydrocarbons and various dusts.
The connector plugged to its mate during much of its operational life is characterized by a typical
catastrophic failure rate based on the factors described. Many connectors, particularly of the
cable type that are repeatedly plugged and unplugged continuously expose the contacts to a fresh
supply of local corrosive contaminants. These cycling effects also create the problem of physical
wear on the connecting interfaces. Surface contact points become worn making unsymmetrical
contacts and sometimes substituting nonconducting films to replace conducting points in the
physical interface. The result is increased interface resistance, higher conduct temperature and
degradation of the connection. Hence, there is an added failure rate relation between cycling rate
of connector contacts and operational life.
Figure 500.1 -- Service Life Versus Hot Spot Temperature
All unmated connectors, during shipment, storage or operation, should be kept covered with
moisture proof or vapor proof caps. Protective caps specified by military specifications or
military standards and designed for mating with specific connectors should be used. Where such
protective caps are not available, disposable plastic or metallic caps designed for purpose should
be used.
The insulation resistance limits vary with the temperature as shown in Figure 500.2.
Figure 500.2 -- Insulation Resistance Versus Temperature
The service life of these connectors varies with temperature as shown in Figure 500.1.
a. With Coupling Rings -- Counterpart connectors are required to be capable of mating and
unmating 100 times at a maximum of 10 cycles per hour with coupling rings attached.
a. Type MS3400s shall be used only for shipboard jacketed cable applications.
b. Type MS3450s shall not be used for shipboard jacketed cable applications and classes W
and K are only acceptable for hookup wire applications.
The various configurations of series III and series IV connectors are intended for use as follows:
Series III and IV connectors shall not be used in Navy shipboard jacketed cable applications.
Series III with finish W are acceptable for hook-up wire applications.
Sealing plugs should be installed in all grommet holes of E and T connectors which do not
contain wires.
501.2.1.4 Performance
The tests of mated connectors covered in the dielectric withstanding voltage at altitude tests are
overstress tests intended to demonstrate the sealing capabilities of mated connectors. They are
not to be taken as indicative of recommended service usage. Operating voltages shall be based
upon the applicable test voltages for unmated connectors with suitable allowances for transients,
switching surges, and safety factors appropriate to the particular circuit in which the connector is
to be used.
Connectors containing size 22 and smaller contacts shall not be used for equipment designed for
military applications, unless specifically approved by the procuring activity.
These connectors are for use with jacket cable in shipboard applications.
Connectors are intended for heavy duty (rough serviced applications for external electrical
interconnection of equipments such as shelters, vans, buildings, missile/space launch sites.
Connectors are intended for heavy duty (rough service) applications in protected enclosures
where water-proofing (unmated) or pressurization is not required.
Connectors are intended to be used for power connections in the current range of 60 to 200
amperes and will be used only with the heavy duty jacketed cables specified on the applicable
insert standard. Reference MIL-STD-255.
503 Connector, Rack and Panel
Class G connectors are intended for use in nonenvironment. resisting applications where the
operating temperature range of -55C to 125C is experienced.
Class N connectors are intended for use in applications where presence of residual magnetism
must be held to low levels to avoid interference with nearby sensitive instrumentation.
Class H connectors are intended for use in application where atmospheric pressures must be
contained by the connectors across the wall or panels they are mounted on.
These connectors are intended for use in electronic and electrical equipment.
503.3 MIL-C-28748, Connectors, Electrical, Rectangular, Rack and Panel, Solder Type
and Crimp Type Contacts
Class G connectors are intended for use in nonenvironment resisting applications where the
operating temperature range of -55C to 125C is experienced.
Class E connectors are intended for use in environmental resisting applications. Provisions are
made for sealing around wire at rear of connectors.
503.5 MIL-C-81659, Connectors, Electrical, Rectangular, Environment Resistant, Crimp
Contacts
MIL-C-81659 covers environmental resistant rectangular connectors with one to four inserts per
connector.
MIL-C-83733 covers miniature environmental resisting, 200C rectangular connectors. All the
types and classes are intermatable under the same shell size.
505.1 MIL-C-39024, Connectors, Electrical; Jacks, Tip (Test Point, Panel or Printed
Wiring Type)
506.1 WC-596, Connectors, Plug, Receptacles and Cable Outlet, Electrical Power
MIL-C-39012 covers radio frequency connectors used with flexible RF cables and certain other
types of coaxial transmission lines.
Intended for use on panel boards, printed circuit boards, and microelectronic components.
Intended for use on panel boards, printed circuit boards, and microelectronic components.
Intended for plug-in electronic components, such as electron tubes and related electronic devices,
plug-in related electronic devices, plug-in capacitors, crystal units, batteries, vibrators, relays,
coils, etc.
509 Derating Requirements
When using connectors, current and operating temperature shall be derated according to the
maximum allowable derating curves as shown in Figure 500.3.
The voltage between the contacts shall not exceed 25 percent of the dielectric withstanding
voltage.
A 250 190
B 200 130
C 120 50
D 120 50
TMAX TD
200 165
Next Section
Previous Section
600 Relays
A relay is defined as an electrically controlled device that opens and closes electrical contacts to
effect the operation of other devices in the same or another electrical circuit. Standard relays are
specified in MIL-STD-1346. Relays should be selected based upon the function to be
performed. Table 600-I summarizes the relay types applicable to different functions, while
Section 601 provides narrative details for relay application. Where more than one type of relay
can be used in a given application, consideration should be given to cost and availability.
Classification of relays can be in accordance with application, by construction, or configuration,
or a combination of these categories. These classifications are as discussed below.
Classifications are of an arbitrary nature, and any particular relay design may fall into one or
more categories. For example, a low level relay may also be a latching relay or a sensitive relay.
a. General Purpose. Relays with an ac or DC voltage rated coil whose contacts are rated
resistive up to and including 10 A. The term general purpose may be used when
discussing nonlatching relays.
b. Intermediate Level. Relays used in a load application where there is insufficient contact
arcing to effectively remove surface residue from the organic vapor deposits on the contact
surface, although there may be sufficient energy to cause melting of the contact material.
c. Latching. A bistable polarized relay having contacts that latch in either position. A signal
of the correct polarity and magnitude will reset or transfer the contacts from one given
position to the other.
d. Low-level. Relays intended specifically for the switching of low-level or dry circuits. In
these circuits only the mechanical forces between the contacts affects the physical
condition of the contact interface, that is, there are no thermal or electrical effects; e.g.,
arcing. The current and open circuit voltage are generally defined as being in the
microampere, millivolt range.
f. Sensitive. Relays which are defined in terms of coil resistance and maximum operating
current. The relatively low coil power required to operate the relay is characteristic of a
sensitive relay. It is accomplished by increasing the ampere-turns, and thereby the
resistance, of the coil.
600.1.2 Classification by Configuration
a. Armature. The armature relay operation depends upon energizing an electromagnet which
attracts a hinged or pivoted lever of magnetic material to a fixed pole piece. The hinged or
pivoted lever is called the armature.
General Purpose
DC Operated X
AC Operated X
AC/DC Operated
Electromagnetic, ER X
Latching DC
Operated X X X
AC Operated X
AC/DC X
Operated
Reed Type X
Dry Reed
Telegraph Relays, Passive, Solid State No standard part has been established.
Solid State X
Vacuum, High Voltage (DC Coil No standard part has been established.
Operated)
All the specifications give the part number to M -- specification number -- slash sheet number.
In addition, MIL-R-6106 relays have MS numbers, and MIL-R-83726 relays have dash
numbers.
Note: A relay contact gap operational requirement of 0.005 minimum opening should
be observed as a general application requirement.
The actuating coils may be operated with ac or DC voltage. Relays operated on direct current
usually have greater life expectancy than ac relays.
b. Hybrid. A relay with an isolated input and output. The input is a solid state device which
controls an electromechanical output. Switching characteristics are controlled by this
electromechanical output.
d. Sensor Relay. A sensor relay detects specified functions (for example, frequency, phase
sequence, voltage level) and changes the output when the functions are within specified
limits. The relay may incorporate time delay characteristics with the switching operation.
e. Solid State. These are relays incorporating only semiconductor or passive circuit devices.
There are no moving parts, so therefore there is no bounce or chatter, and they have fast
response and long life; however, the number of designs available is still limited and at
present only single pole devices are available.
f. Time-delay
1. A delay in operate time or dropout time, or both, of the armature type relay may be
obtained by placing a conducting slug or sleeve on the core in the proper position.
This produces a counter magnetomotive force which results in a desired time delay.
When the slug is placed on the core nearest the armature gap, a delay in operate time
is obtained. Placing the slug farthest from the armature gap results in a delay in
dropout time.
2. The most common method of producing a time delay is the use of a separate circuit,
usually in the same package, to produce either a fixed time delay or in some cases an
externally adjustable delay in the time before the relay coil itself is energized.
c. Increase the number of output circuits (so as to switch more than one load or to
switch loads from different sources)
d. Repeat signals
g. Interlock circuits
600.2.1 Switching
ARC suppression techniques should be used to protect relay contacts. Arc suppression circuitry
(e.g., diodes) should be mounted externally to the relay package.
Solid state relays are preferred over electromechanical relays. Redundant configurations should
be used when high reliability is required. Contacts should be operated in parallel for redundancy
only and never to increase the current rating of the relay contacts. Contact life is a central
concern relative to overall reliability. With the exception of solid state units, relays are
electromechanical devices and, therefore, subject to both electrical and mechanical failure.
Some causes of failures are poor contact alignment, loss of resiliency in springs, and open coils,
as well as open, contaminated, or pitted contacts. Contact failure can result from high inrush or
sustained high currents, or from high voltage spikes generated when an inductive circuit is
opened. High inrush currents occur in loads composed of motors, lamps, heaters, capacitive
input filters, or other devices that have low starting resistance compared to operating resistance.
These currents may cause intense heat with associated welding of the contacts.
In addition to overstressed contacts, contamination is the most common cause of relay failure.
Such failures are often intermittent and difficult to verify. Causes may be nonmetallic or gaseous
contamination, which periodically deposits itself on contacts, causing an open condition; or
metallic particles which cause shorted conditions or block movement of mechanical parts.
Contamination can be significantly reduced by proper process controls, use of welded hermetic
sealed enclosures, small particle cleaning, assembly and back filling in Class 100 clean room
facilities, as defined in FED-STD-209 precap visual inspection, and added screening after
assembly.
In the event of failures attributed to vendor workmanship, timely corrective action can
significantly reduce this type of failure.
Engineering selection of the proper relay for an application is the most significant factor of relay
reliability.
600.2.4 Misapplications
Misapplication of relays will result in reduced reliability. The following, taken from
MIL-STD-1346, is a listing of typical relay misapplications:
a. Improperly using existing military specifications or using the incorrect relay military
specification.
b. Paralleling contacts to increase capacity. Contacts will not make or break simultaneously
and one contact carries all the load under the worst conditions. Contacts can be paralleled
for redundancy in the low level or minimum current (contamination test current) areas.
c. Circuit transient surges. Circuit designers shall be careful not to expect relays to handle
circuit transient surges in excess of their ratings. It should be noted that surge currents
greater than ten times the steady state currents can result when switching inductive,
capacitive and lamp loads. Protection devices (such as transient suppression diodes)
should be used to limit these surges or a relay rated higher than the surge current should be
used.
d. Using relays under load conditions for which ratings have not been established. Contact
ratings should be established for each type of load. Many relays will work from low level
to rated load. However, relays designed for low-level applications should not be used at
low level loads after having been tested or used for a short period of time at high level
loads. A cold filament lamp draws very high currents (between 3 and 10 times steady-state
value) until warmed up. Contacts used for switching lamps should be able to withstand
such current surges without the possibility of welding contacts.
e. Using relays at higher voltages than those for which they were designed, for example,
switching 300 volt power supplies with relays rated at 115 volts maximum.
f. Contact ratings with grounded case. Some relays employing a grounded case have small
internal spacing, or lack arc barriers. In such cases, contact ratings should be derated more
than in the ungrounded case mode of operation when switching in excess of 40 volts ac or
dc. Typically, the maximum ac rating of a nominally rated 28 Vdc, 2 amp resistive relay,
is of the order of 0.150 ampere. Switching high voltage with the relay case ungrounded
results in a potential personnel hazard.
i. Using relays with no established motor ratings to switch motor loads. In addition, caution
should be used in applying relays to reverse motors, particularly where the motor can be
reversed while running, commonly called plugging. This results in a condition where
both voltage and current greatly exceed normal. Only power relays rated for plugging
and reversing service should be utilized in these applications.
k. Using relays rated for 115 Vac only on 28 Vdc or higher voltage DC applications. If
contacts in these devices are of the single break form A type, it may be necessary to derate
severely for use on DC applications, at 28 volts or higher.
l. Effects of ambient temperature on coil overdrive. Many users do not realize that more
power is required to operate a relay at elevated temperatures. A coil operated relay is a
current device (ampere-turns). Temperature increases coil resistance at the rate of 0.004
ohm/ohm/C due to the temperature coefficient of copper. Therefore, with a given voltage
applied to a relay coil, overdrive decreases at elevated temperatures; if this is not taken into
account, misapplication occurs. When rated voltage is specified, an ambient temperature is
usually also specified, the user should consider the maximum ambient temperature
condition and the effect upon the voltage that is supplied.
m. Relay race involves conditions where one relay must operate prior to another in separate
drive circuits. Relay race circuits should be avoided, but where they must be used ambient
temperature, drive power, operate and release times, coil suppression circuitry, and wear
consideration should be carefully considered.
n. A problem is encountered when a relay coil is operated from a slowly rising current.
When a triggering threshold is reached, the relay operates. Back electromotive forces
(EMFs) are produced when the armature closes to the pole face. This voltage being
opposite in polarity to the driving voltage causes the relay to release and then reoperate.
This chatter condition continues until a sufficient amount of drive current is available to
overcome the back EMFs.
p. Using relays to switch inductive loads. While ac inductive circuit requirements and relay
capabilities can be properly matched in terms of current, voltage, frequency, and power
factor, no such positive comparison method exists for DC inductive circuits. Thus, special
care should be exercised in selecting relays to switch DC inductive loads.
q. Using coil transient suppression relays where suppression is not required. Suppressing coil
transients can affect load switching capability and relay life. Using maximum possible
suppression will increase relay drop-out time. Increased drop-out time can reduce the
amount of current that can be switched and the relay life. Increased drop-out time can also
adversely offset relay logic circuits.
r. Relays should be located and mounted to minimize the probability of contact chatter due to
shock and vibration. The shock from pyrotechnic sources is a significant problem to
relays; this can be avoided by the use of solid-state relays.
t. Relays which are not designed specifically for load transfer applications should not be used
for that purpose.
600.3 Derating
a. Military standard
MS27400 -19 X
MS27400 /9 058 X
__________ ________ ________ _________
M39016 /9 058 X
_________ ________ ________ _________
Military Slash sheet Dash number Failure rate
specifications
number
600.4.2 Shock
600.4.4 Terminal
The style of the terminal is identified by a single or double letter according to Table 600-VI.
Contact Current 80
(surge)
B -65 to +125
C -65 to +200
D -55 to + 71
E -65 to + 85
F 0 to + 70
G -70 to +125
H -70 to +200
J -55 to +125
1 A (50G) 213
2 B (75G) 213
3 C (100G) 213
5 -- 207 (high-impact)
7 D (500G) 213
9 F (1100G) 213
Note: Symbols 1, 2, and 3 replace 15, 30, and 50G of Methods 202 and 205 of
MIL-STD-202.
1 02 (G) 10 -500
3 10 (G) 10 -500
4 10 (G) 10 -- 1,500
5 15 (G) 10 -- 2,000
6 20 (G) 10 -- 2,000
7 20 (G) 10 -- 3,000
8 30 (G) 10 -- 2,000
9 30 (G) 10 -- 3,000
10 50 (G) 10 -- 3,000
11 5 (G) 10 -- 2,000
12 10 (G) 10 -- 2,000
13 10 (G) 55 -- 2,000
Note: Use .060 double amplitude whenever it is less than the curve G level.
The specified failure rate level is identified by a single letter according to Table 600-VII. Only
ER level P or higher shall be used.
WL Wire Lead
Table 600-VII. -- Failure Rate Level (Established at 90% Confidence Level For Qualification
and a 60% Confidence Level for Maintenance of Qualification)
L 3.0
M 1.0
P 0.1
R 0.01
S 0.001
601.1 DC Operated
This section covers relays with DC voltage rated coils and contacts nominally rated up to and
including 10 amperes. The applicable military specifications for these relays are MIL-R-5757
and MIL-R-39016 having the following characteristics:
For standard part numbers and individual relay characteristics see MIL-STD-1346.
601.2 AC Operated
This section covers relays with ac voltage rated coils and contacts nominally rated up to and
including 10 amperes. The applicable military specification for these relays is MIL-R-5757
having the following characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
601.3 Sensitive
This section covers relays designed to operate with an input coil power of 100 milliwatts or less.
The applicable military specifications for these relays are MIL-R-5757 and MIL-R-39016 having
the following characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
601.4 Hybrid
This section covers relays that use a combination of solid state circuitry and an
electromechanical relay to perform the switching function. The applicable military specification
for these relays is MIL-R-28776 having the following characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
601.5 MIL5757, Relays, Electrical (for Electronic and Communication Type Equipment)
601.6 MIL28776, Relays, Electrical for Electronic and Communication Type Equipment,
Hybrid
601.7 MIL39016, Relay, Electromagnetic, Established Reliability
602.1 DC Operated
This section covers DC voltage rated relays nominally rated for 5 amperes and up. The relays
are capable of meeting the electrical and environmental requirements when mounted directly to a
structure. The applicable military specification for these relays is MIL-R-6106 having the
following characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
602.2 AC Operated
This section covers AC voltage rated relays nominally rated for 5 amperes and up. The relays
are capable of meeting the electrical and environmental requirements when mounted directly to a
structure. The applicable military specification for these relays is MIL-R-6106 having the
following characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
This section covers relays with ac and DC voltage rated coils and contacts rated 5 amperes and
up. These relays are capable of meeting the electrical and environmental requirements when
mounted directly to the structure.
This section covers relays with DC voltage rated coils and contacts that latch in the energized or
deenergized position, or both positions, until reset electrically. The military specifications
covering these relays are MIL-R-5757, MIL-R-6106 and MIL-R-39016 having the following
characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
603.2 AC Operated
This section covers relays with ac voltage rated coils and contacts that latch in the energized or
deenergized position, or both positions, until reset electrically. The military specification
covering these relays is MIL-R-6106 having the following characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
This section covers relays with ac/dc voltage rated coils and contacts that latch in the energized
(DC) or deenergized (AC) position, or both positions, until reset electrically. The military
specification covering these relays is MIL-R-6106 having the following characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
This section covers relays consisting of one or more reed switch capsules and one or more coils.
The military specification for these relays is MIL-R-5757 having the following characteristics:
b. Enclosure -- Sealed
This section covers time delay relays in which the specified time delay interval is obtained
through the use of electric or electronic circuitry. The military specification for these relays is
MIL-R-83726 having the following characteristics:
For standard part numbers and individual relay characteristics, see MIL-STD-1346.
This section covers time delay relays in which the specified time delay interval is obtained
through the use of solid state electronic circuitry.
Note: At this time, no military specifications are established for these relays.
605.3.1 Classification
Time delay relays covered by this section consist of the following types and classes:
III-Interval timer.
C-Solid state.
D-Hybrid (integral electromagnetic relay not qualified with contact ratings 5 amperes or
lower).
E-Hybrid (integral electromagnetic relay not qualified with contact ratings 5 amperes or
higher).
605.3.2 Ratings
Time delay relays with electromechanical relay output and with contact ratings 10 amperes or
greater shall be class B or class E.
This section covers solid state polar relays for use in telegraph circuits and associated equipment.
Note: At this time, no military specifications are established for these relays.
This section covers relays utilizing only semiconductor and electrical passive circuit devices.
The military specification covering these relays is MIL-R-28750.
Note: At this time, no military specifications are established for high voltage,
vacuum, relays.
Next Section
Previous Section
Chapter I -- Requirements
1. Scope
This document establishes part derating requirements, minimum quality levels and analysis
information for the reliable application of parts in electronic equipment. This document provides
information that supplements a parts control program. Requirements for selecting standard parts,
approving nonstandard parts and other parts control program requirements are defined in
MIL-STD-965.
Chapter I identifies part quality levels and part derating requirements defined in greater detail in
Chapter II.
Chapter II contains part application guidelines and detailed derating requirements for commonly
used standard part types.
The appendices contain information on general topics applicable to parts applications and
reliability. The appendices are intended to aid in the understanding of the requirements specified
in Chapters I and II.
2. Reference Documents
The documents specified herein on the issue in effect on the date of invitation for bid or request
for proposal, form a part of the requirements of Section 3 to the extent they are specified. These
documents and other documents are listed in Appendix G. In the event that advancing
technology may supersede some of the requirements of this manual, resolution should be
obtained from the procuring activity.
3. Requirements
The requirements of this chapter are applicable as specified in the contract. When this document
is cited in a contract any deviation from the requirements specified in Section 3 herein shall
require approval by the Procuring Activity.
If required by contract, the contractor shall implement a MIL-STD-965 parts control program.
The GFB is intended to support the DoD Standardization and Parts Control Programs by
providing listings of preferred parts for use in military electronic/electrical systems. The GFB
electronics parts list is comprised of those parts and part types which have been evaluated by the
Military Parts Control Advisory Group (MPCAG) of the Defense Electronic Supply Center
(DESC) and subsequently recommended for use. Essentially the GFB is a list of approved
standard parts for design selection, and should be specified early in the acquisition process at the
solicitation point. When contractually approved, those parts selected from the GFB can be added
to the PPSL without further evaluation. The purpose and goal of the GFB is to allow for
minimizing the number of part submittals, reduction of procurement problems, and to provide
standardization guidance. The GFB currently consists of three sub baselines:
GFB-01 This baseline is used primarily by AIR FORCE and ARMY activities for both airborne
and ground applications. This baseline satisfies the requirements of MIL-STD-454 and
MIL-E-5400.
GFB-03 This baseline is used primarily by NAVAL AIR SYSTEMS COMMAND for airborne
applications, taking into account shipboard environments. This baseline satisfies the
requirements of MIL-STD-454, MIL-E-5400, and MIL-E-16400.
GFB-NAVSEA This baseline is used primarily by NAVAL SEA SYSTEMS COMMAND for
shipboard, submarine, and other equipments which are either exposed to or immersed in salt
water. This baseline satisfies the requirements of MIL-STD-454 and MIL-E-16400.
Passive parts shall be selected from Established Reliability (ER) military specifications. They
shall meet, (unless specified otherwise by contract) as a minimum, an ER failure rate level of P
or higher (i.e., R or S). As an exception, parts procured to Weibull failure distributions (i.e.,
solid tantalum capacitors (MIL-C-39003)) shall be ER failure rate level (Weibull) of B or higher
(i.e., C or D). In the event that parts are unavailable at the minimum failure rate level, then the
contractor shall use the highest quality level part available. The selection of a lower quality level
part will normally require nonstandard part approval from the Procuring Activity in accordance
with 3.1.3. Lower quality level parts should not be used in the design, development, or
production of any electronic hardware and equipment if there are direct ER replacements
available.
3.1.2.3 Microcircuits
Microcircuits (and by extension, hybrid circuits) shall be selected in accordance with the
requirements of MIL-STD-965 and MIL-STD-454, Requirement 64. Quality level shall be in
accordance with MIL-STD-454, Requirement 64. Lower quality level microcircuits and hybrid
circuits are considered nonstandard and shall be treated as such. To use a nonstandard
microcircuit or hybrid the contractor shall: (1) justify the selection of the lower quality level part
to the Procuring Activity, (2) upgrade screen the part to MIL-STD-883 Class B requirements, (3)
receive nonstandard part approval from the Procuring Activity in accordance with 3.1.3, and (4)
mark the part with a contractors part number identifying it as nonstandard.
Hybrid microcircuits shall be selected in accordance with the requirements of MIL-STD-965 and
MIL-H-38534. Quality level shall be determined by the contract and shall consist of one of the
three options provided by MIL-H-38534, paragraph 3.4.
Unless otherwise specified in the contract, the use of nonstandard parts shall require approval by
the Procuring Activity. The contractor shall provide documentation, justification, and
qualification provided in accordance with MIL-STD-965, Parts Control Program.
A nonstandard part is a part which does not meet the minimum quality levels given in 3.1.2.1,
3.1.2.2, and 3.1.2.3. In addition, a nonstandard part is further defined as:
a. Nonstandard Application -- Use of a part in an application where its specification does not
apply (e.g. a tantalum capacitor used at a frequency outside its recommended operation
frequency). In these cases the contractor shall provide: (1) justification for the use of that
part and (2) data showing that the part will perform the desired circuit functions without
degradation to its reliability over the expected life of the system. For further details refer
to MIL-STD-965.
A nonstandard part shall be derated the same as its nearest equivalent standard military part. For
example, a nonstandard chip tantalum capacitor may be required in a circuit because of size and
space constraints. The derating requirements for this part would be the same as its nearest
equivalent military standard part. This would be a MIL-C-55365 tantalum capacitor.
Nonstandard part specifications should be compatible with the standard part specifications (i.e.
the parameters of each part should be measured using the same methods). The derating
requirements of this manual are based on military standard parts. Manufacturers catalog ratings
for nonstandard parts should be carefully reviewed. The contractor should be able to
demonstrate, by cross-references and/or test data, that the ratings are compatible.
An inherent and necessary component of Navy Quality and Reliability programs is the provision
for latent defect detection, identification, correction-as-to-cause, and recurrence control. The use
of Environmental Stress Screening (ESS) of parts, modules, units-of-assembly, or systems is
used to detect and identify latent defects in an effort to improve field reliability as well as to
reduce production, operational, and maintenance costs. Although the primary focus of this
manual is the provision of derating requirements and criteria, a brief synopsis of Navy stress
screening rationale, policy, and summary requirements is presented in this section as an adjunct
program effort to achieve reliability and quality goals and requirements.
ESS is a term which has evolved to encompass an overall approach of applying electrical and/or
environmental stress in such a way as to accelerate the occurrence of any latent defects to the
point of detection. ESS is considered as a dynamic manufacturing process in which specific
procedures are adjusted, based on screening results, to optimize defect detection and subsequent
corrective action. Navy policy is that development and production contracts for all mission
essential electronic hardware will provide for requirements for stress screening and such
screening shall be documented and integrated with in-process inspection and process control
procedures. ESS program requirements and details are provided by other Navy publications,
particularly NAVSEA TE000-AB-GTP-020 Environmental Stress Screening Requirements and
Application Manual for Navy Electronic Equipment.
3.2 Derating
Parts identified in Table I and similar part types shall be derated electrically and thermally in
accordance with Table I.
The derating requirements in Table I and other related sections are based on ambient
temperatures (i.e. the temperature of the air surrounding the part). However, the individual
contractors design or thermal analysis may lend itself better to use case, part, or junction
temperatures. The contractor may convert the derating requirements from ambient to case, part,
or junction temperature, but the original derating parameters must remain intact. Also, if the
contractor converts a table or graph it must be documented and supplied with any derating
deliverable data, as required by the contract DD 1423.
Designing for optimum life should be an integral part of any design process. The most reliable
method of increasing the life of a part is to decrease the stress on that part. Stress is the primary
cause of part failures. Therefore, the contractor should perform electrical stress analyses as an
integral component of the design process. Such analyses can be aided and expedited by use of
MIL-HDBK-251 Reliability Design Thermal Applications. Several examples of such
analysis are provided by Appendices A and B.
Mechanical stress analysis should also be conducted on designed structural components. One
reference for mechanical stress analysis is Handbook of Reliability Prediction Procedures
for Mechanical Equipment U.S. Army TROSCOM Belvoir Research and Development
Center (in preparation). Another is the Nonelectronic Reliability Notbebook
(RADC-TR-69-458) by Reliability Analysis Center of the Rome Air Development Center.
4.1 Responsibility
When specified in the contract, the contractor shall be responsible for the performance of such
analyses and tests as may be required to verify that the derating requirements of this contract
have been met. The procuring activity reserves the right to perform such tests and any analyses
considered necessary to ensure that the design meets the requirements set forth herein.
Part thermal and electrical derating shall be verified through test by actual measurement of part
stress levels and part ambient temperatures. These measurements shall be performed on at least
5 percent of equipment parts. Fifty percent of the candidate parts shall be those having the
highest power dissipation in the equipment. The other 50 percent of the candidate parts shall be
randomly selected. Should the verification test demonstrate that the derating requirements are
not met (i.e., all parts do not meet temperature and electrical derating requirements), corrective
action shall be implemented and the test repeated on different parts (i.e., 50 percent of parts
having the next highest power dissipation and 50 percent new randomly selected parts).
5. Notes
This document is intended to facilitate the application of electrical and electronic parts in
military systems and equipments in such a manner as to optimize reliability and life cycle costs.
5.2 Definitions
Terms used herein shall be interpreted in accordance with the definitions of MIL-STD-721
unless otherwise specified herein.
5.2.1 Derating
Derating is the application of electrical and electronic parts in such a manner that the actual
worst case electrical and thermal stresses are less than the parts design maximum ratings.
5.2.4 Application
The method in which an electrical or electronic part is used, which influences its predicted
failure rate as well as the effect of its possible failure modes.
5.2.5 Stress
Physical or electrical forces imposed on the electrical or electronic part, such as temperature,
current, voltage, power dissipation, etc., which affect part failure rate.
The numeric ratio between the applied stress and the maximum rated stress for a given
parameter, e.g., applied voltage divided by rated voltage.
Electrical
Networks,
Fixed, Film
Electrical
Fixed,
Temperature
Compensating,
ER
Variable,
Ceramic
Envelope
70
ELECTRICAL
Paper, Plastic,
Paper-Plastic
Dielectric
Electrical
Current 70
Surge
Inverse 65
Voltage
Transient 80
Voltage
Forward 75
Current
(Surge)
Breakdown 70
(Reverse
Junction)
Voltage
Forward 50
Blocking
Voltage
Output 70
Current
(Continuous)
Output 60
Current
(Surge)
Input 75
Voltage(
Signal)
Supply 80
Voltage
(Surge)
Output 75
Current
(Continuous)
Output 60
Current
(Surge)
Input 75
Voltage
(Signal)
Output 80
Voltage
(Surge)
Output 60
Current
(Surge)
Input 75
Voltage
(Signal)
Supply 80
Voltage
(Surge)
Output 65
Current
(Continuous)
Output 60
Current(
Surge)
Input 75
Voltage
(Signal)
Supply 80
Voltage
(Surge)
Toggle 70
Frequency
Set Up and 200 minimum
Hold Time
Fanout 80
Toggle 70
Frequency
Fanout 80
Electrical
PART MIL-SPEC Insert Contact Size Para meter Max. % of Rated Max Derated
TYPE Materi Electrical Stress Temperature(C
al )
Type
Electrical
Part Type MIL-STD Material Contact Parameter Max. % of Rated Max Derated
Type Size Electrical Stress Temperature
(C)
C 22 GA Pin Current 60 60
Voltage 25 of the dielectic
withstanding voltage
D 22 GA Pin Current 60 60
Voltage 25 of the dielectric
withstanding voltage
C 20 GA Pin Current 60 50
Voltage 25 of the dielectric
withstanding voltage
D 20 GA Pin Current 60 50
Voltage 25 of the dielectric
withstanding voltage
Voltage 25 of the
dielectric
C 16 GA Pin Current 60 50
Voltage 25 of the dielectric
withstanding voltage
D 16 GA Pin Current 60 50
Voltage 25 of the dielectric
withstanding voltage
C 12 GA Pin Current 60 55
Voltage 25 of the dielectric
withstanding voltage
Electrical
Relays All those Contact 60- Capacitive load Limit to 65C when
listed in Current 60- Resistive load rated at 85C or
MIL-STD- (Continuous) 40- Inductive load 100C when rated
1346 20- Motor at 125C
10- Filament (Lamp)
Contact 80
Current
(Surge)
80
Contact
Current
(Surge)
Next Section
Previous Section
Specifications
Military
MIL-T-27 Transformer and Inductor (Audio, Power and High-Power Pulse), General
Specification for
MIL-C-3432 Cable and Wire, Electrical (Power and Control; Flexible and Extra flexible,
300 and 600 Volts)
MIL-S-8805 Switches and Switch Assemblies, Sensitive and Push (Snap Action),
General Specification for
MIL-S-8805 Switches and Switch Assemblies, Sensitive and Push (Snap Action),
General Specification for
MIL-15305 Goil, Fixed and Variable, Radio Frequency, General Specification for
MIL-F-18327 Filter, High Pass, Low Pass, Band Pass, Band Suppression and Dual
Specification for
MIL-C-19978 Capacitor, Fixed, Plastic (or Paper Plastic), Dielectric (Hermetically Sealed
in Metal, Ceramic or Glass Cases), Established Reliability, General
Specification for
MIL-T-21038 Transformer, Pulse, Low Power, General Specification for
MIL-S-22710 Switch, Rotary (Printed Circuit), (Thumbwheel, Inline and Push Button),
General Specification for
MIL-C-28748 Connector, Electrical, Rectangular, Rack and Panel, Solder Type and Crimp
Type Contacts, General Specification for
MIL-M-28788 Switches, Air and Liquid Flow Sensing, General Specification for
MIL-R-83726 Relay, Time Delay, Hybrid and Solid State, General Specification for
Federal
WC-596 Connector, Plug, Receptacle and Cable Outlet, Electrical Power, General
Specification for
Standards
Military
(Navy)
MIL-STD-1531 Insert Arrangements for MIL-C-83733 Rack to Panel Connectors, Shell Size
B
MIL-STD-1532 Insert Arrangement for MIL-C-83733 Rack to Panel Connectors, Shell Size
B
Handbooks
Military
MIL-HDBK-246 Program Managers Guide for the Standard Electronic Modules Program
900 Filters
Standard filters should be selected from MIL-STD-1395. The variety of filter and network types
used in any particular equipment should be the minimum necessary to obtain satisfactory
performance. Where more than one type filter or network can be used in a given application
(i.e., L-C, R-C, L-R, electro-mechanical, piezo-electric crystal, etc.) consideration should be
given to cost and availability (use of strategic materials, multiple sources, etc.). The filters and
networks identified herein meet all the criteria for standard types as identified in MIL-STD-1395.
Part numbers used to identify the filters and networks listed herein are as specified in the
individual filter or network specification. Type designations can be constructed as indicated in
examples given in applicable sections of this manual.
Careful consideration shall be given to the insulation resistance of filters. The value of insulation
resistance varies with temperature, and it is necessary to apply a correction factor to
measurements made at temperatures other than 25C. Table 900-I gives correction factors for
measurements made at temperatures between 20C and 35C. The required value of insulation
resistance shall be multiplied by the correction factor to determine the new value required at the
new temperature.
20 1.42 28 0.82
21 1.33 29 0.76
22 1.24 30 0.71
23 1.16 31 0.67
24 1.08 32 0.63
25 1.00 33 0.59
26 0.94 34 0.55
27 0.87 35 0.51
The design engineer should give consideration to insertion-loss and discrimination characteristics
of the filter for its application. This will provide transmission of desirable frequencies through
the filter at acceptable levels, while providing the necessary attenuation of undesirable
frequencies.
Current 50
Working Voltage 50
901.1.1.1 Use
These filters are current carrying filters, ac and dc, and are used primarily for the reduction of
broadband radio interference. They are also applicable to shielded room and power factor
applications.
These filters are applicable for use in equipment requiring frequency ratings up to 1,000 MHz.
901.1.1.3 Construction
These filters consist of discrete component parts (inductors and capacitors) arranged in the
popular circuit configurations such as Pi, L, and T. They are enclosed in hermetically
sealed metallic enclosures, with all exposed metallic surfaces protected against corrosion by
plating, lead alloy coating, or other means.
The filters covered by this section are of two types: those rated for direct current use, and those
rated for both alternating current and direct current use. The direct current types are rated at 100
volts dc, and the ac-dc types are rated at 125 volts ac and 400 volts dc.
These filters are available in seven current ratings from 1 ampere to 30 amperes.
902.1 MIL-F-18327, Filters, High Pass, Low Pass, Band Pass, Band Suppression and Dual
Functioning
902.1.1.1 Use
These filters are designed for use in applications with a wide range of source and load
impedances ranging from a few ohms to several megohms.
902.1.1.2 Terminals
These filters are equipped with solder lug and pin type terminals. They are provided with
external mounting studs, lock nut or flat washer, lock washer, and nut.
902.1.1.3 Construction
The filters covered by this section are composed of combinations of inductors, capacitors,
resistors, piezo-electric crystals, electro-mechanical and other electronic components arranged in
electrical configurations which provide insertion-loss and discrimination characteristics required
in a particular filter.
Next Section
Previous Section
1000.1General Information
Standard transformers, inductors and coils are specified in MIL-STD-1286. The selection of a
transformer, inductor, or coil should consider such factors as circuit function, construction,
circuit application, operating temperature, altitude, type of mounting, environmental conditions,
size, weight, life expectancy, and reliability. These factors are described herein. After the
preliminary selection of a transformer, inductor or coil, the appropriate military specifications
and MS drawings should be examined to verify that the item parameters important to the new
application are controlled to the degree necessary.
1000.2.1.1 Frequency
Power transformers and inductors are designed to operate efficiently over a fixed frequency
range. Operation outside this range, will result in overheating. Lower frequencies will tend to
saturate the core and higher frequencies will increase core losses.
Transformers that drive rectifier circuits with capacitive input filters require special
consideration. Capacitive input filters cause the current through the transformer to be very
non-linerar, since the current used to keep the input capacitor charged is much greater than the
average current delivered to the load. (Current is delivered to the input filter only when the
rectifier output voltage exceeds the stored voltage in the capacitor.) The result is that average
current through the transformer is the same as average current delivered to the load. However,
initially the current is delivered as a series of spikes of much higher amplitude than the steady
state current. Since transformer heating is a function of current squared, transformer internal
power dissipation will be greater with a capacitive input filter than with an inductive input filter.
1000.2.1.3 Saturation
Power inductors used as filters usually carry a large direct current component. If this component
exceeds the value specified, the inductance can be reduced because of core saturation.
Audio transformers are not normally designed to accommodate any direct current. Small
amounts of direct current can cause core saturation with significant performance degradation,
especially at low frequencies.
The temperature coefficient of resistance for copper windings is approximately 0.4%/C. This
change in resistance can be significant in some applications. Most military equipment is
required to operate over a large temperature range. An analysis should be performed to ensure
that such resistance variations are compatible with design requirements.
1000.2.2.3 Shielding
Electrostatic or electromagnetic shielding may be required in low level circuits to avoid noise or
hum pickup.
Transformers, inductors, coils, and RF coils shall be derated according to the parameters shown
in Table 1000-I. It should be noted that in the event of selection and use of custom designed
transformers or inductors, there may be no specific temperature rating assigned. In these
instances a maximum temperature rise above ambient not exceed 25C should be used, with 40C
for hot spot temperature; and derate accordingly. To avoid double derating, devices designed for
current density of 2mA per circular mil should not be derated for continuous and surge current.
Table 1000-I -- Derating Requirements for Transformers, Inductors, Coils, and RF Coils
Transformers,
Inductors and
Coils
1001 Transformers/Inductors
1001.1 MIL-T-27, Transformers and Inductors, Power, Audio Frequency, High Power
Pulse
The MIL-T-27 transformers and inductors shall be applied according to Table 1000-II.
Ground-fixed 4 or 5 Q, R, S or V
Shipboard, 4 or 5 R, S, T or U X
transportable and
ground-mobile
Ground-fixed 4 or 5 Q, R, S or T X
MIL-C-15305 covers radio frequency coils, fixed and variable, for use as simple inductive
elements in radio frequency circuits.
MIL-C-39010 covers radio frequency, molded coils which have a specified reliability for use in
equipment where reliability, long life, and continuity of operation are necessary.
MIL-C-83446 covers fixed or variable chip radio frequency coils intended for incorporation into
hybrid microelectronic circuits.
Next Section
Previous Section
A.1 General
The power dissipated in a component causes a temperature rise which can affect performance
and reliability. Such temperature changes must be taken into account when designing a circuit,
selecting parts, and deriving a physical circuit configuration. One method of doing this is to do a
thermal analysis. This appendix provides an introduction to general procedure and sets
guidelines on how thermal analysis should be done. MIL-HDBK-251 Reliability/Design
Thermal Applications should be referred to for more detailed and extensive information.
As circuit operating temperature increases, physical changes take place within the component
parts. These cause variations in part electrical parameters, which can degrade performance and
increase the likelihood of failures.
Chronic high temperature may not always cause immediate catastrophic failure. However, there
is always a slow, progressive deterioration of the part along with acceleration of any chemical
reactions which eventually lead to failure. Dielectrics, metallization areas, transistor junctions,
and many other materials degrade faster with increase in temperature. These effects are
cumulative so that failure rates depend, to some extent, on the entire thermal history of the part.
In addition, many part performance ratings decrease as ambient temperatures increase. A
thermal profile analysis determines the air (to sink) temperature in the vicinity of the part. A
thermal profile analysis is therefore mandatory to the stress analysis/derating process.
It should be emphasized that thermal design alone, including effective cooling of parts, is not
necessarily a cure-all for high electrical stresses. While many parts are thermal sensitive, many
others are voltage or current sensitive. Increased reliability requires both control of part
temperatures and use of parts with electrical ratings adequate for the application.
This appendix presents general guidelines and requirements for thermal analysis. For more
detailed and extensive information use MIL-HDBK-251.
A.2 Definitions
Emissivity -- The ratio of radiation intensity from a surface to the radiation intensity from a black
body at the same temperature and wave length. As applied in this appendix, a measure of a
surfaces ability to radiate heat.
Heat Concentration -- Heat dissipation per unit volume expressed in watts per cubic unit of
measure (cubic inch, cubic foot, or other appropriate unit).
Heat Dissipation -- The difference between the electrical input and output of an electronic
device, expressed in watts, except where mechanical work is being accomplished; e.g.,
motors.
Heat Flow Rate -- The power flowing along a thermal path expressed in watts. The symbol used
for heat flow rate is (q).
Internal Temperature -- The temperature of a gas, liquid, or solid at a specified location within
an enclosure.
Thermal Resistance -- The resistance to heat flow generally in units of C per watt and identified
as 0.
Thermal Environment -- The condition of (1) fluid type, temperature, pressure, and velocity; (2)
surface temperatures, configurations, and emissivities; and (3) all conductive thermal paths
surrounding an electronic device.
View Factor -- A measure of the view angle of the absorbing material with respect to the
emitting material in heat radiation transfer.
This section presents the basic guidelines for developing the thermal resistance values for
conduction, convection and radiation. It then presents methods for combining these in an
equivalent thermal network displaying the thermal profile.
A.3.1 Procedure
a. Determine the outside temperature from the equipment operating specifications. Find out
what types of cooling techniques will be available and what their constraints are (e.g.,
pressures, air flow rates, etc.).
b. Find the power requirements of individual modules or boards. From this, derive how
much heat must be dissipated by each module or board and produce a general heat flow
model. This model usually takes the form of an electrical circuit analogy, with electrical
resistance corresponding to thermal resistance, potential difference to temperature
gradients, and current to heat flow. The model should begin with the outside, coolant, or
heat sink temperature. At first, it should extend only to the board level. Later, it should
continue down to the part level. It does not need to extend to each individual part
however. Groups of similar parts in the same general area of the circuit assembly should
be grouped together to simplify calculations. It should only extend to individual parts if
the parts are large heat producers or have heat sinks. It should also include the heat flow
from one circuit to another.
c. From the circuit analysis, find the power dissipated by each device. In step b in which
parts were grouped together, add the power dissipation of the parts in each group. Enter
these values into the thermal network developed in step b. Knowing the outside air
temperature and thermal resistivities, work backwards to find ambient temperatures.
Several iterations may be needed because thermal resistivity is dependent to some extent
on temperature. This step should be done during the breadboard phase of the design.
d. Measure ambient temperatures to confirm the calculated values in step c. Resolve any
difference by refining the thermal model. This step should be done just after circuit
fabrication and assembly.
Note: Steps c and d are very similar. Basically, they use two different methods for
arriving at the same result. Step c uses engineering analysis to determine
temperatures, and step d uses actual measurements. The degree to which each
is used is dependant on where the thermal analysis takes place in the design
process. Ideally, the two steps should be done at two different points in the
design process. Step c should be done at the breadboard level to design the
basic cooling system, and step d should be done at the production circuit
assembly level to confirm the breadboard level results.
e. Use part specifications to find maximum part temperature ratings. Derate the maximum
ratings in accordance with this manual. Use the ambient temperatures found in step d to
determine whether parts may be exceeding their maximum ratings.
f. The results of the thermal analysis will indicate which parts exceed absolute maximum and
derated maximum limits. For each of these parts corrective action may consist of:
g. After corrective actions have been taken, steps e and f must be repeated to assure no
additional problems have been created.
For todays densely packaged equipment, the local air temperature (ambient) surrounding a part
is related to both the parts own power dissipation and of nearby parts and structures. Even
though the parts own power dissipation may not cause overheating, nearby parts may. A typical
example is a silicon microcircuit mounted next to a wirewound power resistor. The microcircuit
may not dissipate much power, but the resistor can have a hot spot temperature rise of 230C
when operating at full power. Most silicon microcircuits would fail if mounted close to this hot
spot.
The maximum temperature a semiconductor can withstand can be given as either junction, case,
or ambient temperature. All three are related to each other through thermal resistance paths.
Thermal resistance is the ratio of temperature change to power dissipation under steady state
conditions. It is mathematically defined as:
= T/PD
where:
= Thermal Resistance
T = Change in Temperature
PD = Power Dissipation
Thermal resistance for active solid-state devices such as transistors may be specified by three
different constants:
JA = JC + CA
Junction, case, and ambient temperatures are related to each other by:
TJ = TC + PDJC
TC = TA + PDCA
However, this is only under steady state DC operation. Under pulsed operation, the situation
changes. For high frequency pulses, temperature usually increases faster. As frequency
decreases, so does temperature. This is because the part cools while it is off. Therefore, the
nature of the duty cycle makes a difference. A high duty cycle may increase temperature, and a
low duty cycle decrease it. For many devices which are repetitively switched on and off (e.g.,
thyristors), maximum temperature versus frequency and duty cycle information is provided in
the component specifications.
The fundamental principles used in a thermal profile analysis are presented in this section.
Ideally, small temperature gradients and consequently low operating temperatures indicate that
effective heat transfer techniques have been used. Two basic assumptions used in this analysis
are: (1) positive heat flow is the heat flow from a high temperature region to a low temperature
region, and (2) heat emitted by a high temperature region is equal to the heat absorbed by a low
temperature region.
There are three basic methods of heat transfer: conduction, convection, radiation. Heat can also
be transferred by mass transfer (i.e., evaporation and condensation), but this will not be
discussed.
A.5.1 Heat Conduction
Heat conduction is caused by molecular oscillations in solid materials and elastic impact of
molecules in liquids and gases. Heat flow in liquids and solids is analogous to ohms law for
current flow in a circuit. The resistance to heat flow is analogous to the resistance to current
flow in a circuit, and temperature difference is analogous to potential difference.
For heat flowing through a region of constant cross sectional area, the equation for heat
conduction is:
Where:
cond = thermal resistance to heat conducted through and along the region
T = temperature gradient across the conductive path (C)
q = heat flow rate through and along the conductive path (watts)
A second general relation for thermal resistance can be used, which is based on analogy to
electric circuit resistance:
where:
= electrical conductivity
L = circuit path
A = circuit wiring cross-sectional area
where:
cond = T/q
cond = L/KA
Heat convection is the process where heat is transferred from a solid surface to a moving fluid or
gas. The circulation of the fluid or gas removes heat from a warm area and transfers it to a
cooler area.
conv = T/q
q = hcAs Ts
Where:
Ts = Temperature gradient from the surface to the ambient in the near vicinity of the
surface (C)
hc = The convective heat transfer coefficient, a complex function of the fluid flow,
thermal properties of the ambient, the geometry of the system (i.e., size, shape, surface
texture, etc.), as well as a function of temperature itself. However, for most electronic
components in air,hc may be approximated by the value 0.003 watts/in 2C (See table A.2
for other values.)
Convection is more complicated than conduction because the convective heat transfer coefficient
hc is a nonlinear function of T. It also varies much more with temperature than thermal
resistivity. However, approximate values of the temperatures are usually known. More exact
values, within +5 percent, can be calculated using a successive approximation method of two or
three steps. This is good enough for most electronic equipment cooling designs.
Convection heat transfer coefficients are usually relatively small so that the corresponding conv
is high compared to cond. In situations in which conduction and convection are serially
occurring, convection is usually the dominant heat transfer limiting factor. Two types of
convective heat transfer are of interest. When the ambient fluid is moved by external means
such as fans or pumps, the process is termed forced convection; fluid motion due to density
decreases of the heated fluid with resultant changes in buoyancy is termed free convection.
There are separate convective coefficients for vertical and horizontal, and top and bottom
surfaces. A further expansion of the convection equation for thermal resistance could be
performed using the individual surfaces.
Metals Insulators
Kovar 0.42
Molybdenum 3.30
Semiconductors
Silicon (doped to
Forced Convection
Liquid Cooling
Radiation is the transfer of heat through electromagnetic energy. Radiation travels from a
warmer body (emitter) to a cooler body (heat sink), with the assumption of relatively little
absorption from the air. When reaching a cooler body the energy is either absorbed, reflected, or
is transmitted through. The transmitted energy is usually insignificant.
The amount of energy absorbed or reflected depends on the surface characteristics of the body,
such as color and finish. Perfectly black bodies are defined as those which absorb all the
radiation, while perfectly shiny bodies reflect all radiation. The radiation characteristics of a
surface are defined by a dimensionless quantity known as emissivity. A perfect absorber and
emitter has an emissivity of one, and a perfect reflector has an emissivity of zero. Table A.3 lists
the emissivity of several common materials.
The rate of heat transfer by radiation is low when the difference in temperature between the
emitting and absorbing bodies is small, or the temperature of the bodies are close to room
temperature. The thermal resistance due to radiation decreases rapidly as the temperature
difference between the emitting and absorbing bodies increases. This is because the heat flow
rate, qrad, is:
where:
For two non-black bodies, the relation for net rate of exchange of radiant heat is:
where:
Fe = an emissivity factor
Fa = a physical configuration factor based on the geometry of the situation
For the commonly occurring instance of essentially parallel planes which are large compared to
their distance apart, the emissivity factor Fe is a composite of the emissivities of the surface and
is of the form:
The configuration factor Fa is sometimes known as the view factor (see table A.4 and section A.2
for representative values and clarifying definition).
The above expression is in K/W, where Kelvin is the absolute unit of temperature. Degrees
centigrade can be converted to degrees Kelvin by:
K = C + 273
Since the Kelvin scale and centigrade scale are identical units except for the additive constant of
273, once the thermal resistance for radiation is determined in K/watt, the same resistance can
be used for C/watt. In other words, a 1K rise is equal to a 1C rise.
Silver 0.02
Chrome 0.08
Tantalum 0.08
Rene 41 0.11
Nickel 0.18
Titanium 0.20
Magnesia 0.95
Body completely enclosed by another body; internal body cannot see any 1.0
part of itself
Two equal, parallel circular disks separated by distance equal in diameter 0.18
Figure A.1 provides a typical example of a thermal network. The thermal resistances due to
conduction, convection and radiation are clearly shown. For this example, an ambient external
temperature of 50C and 145 W of internal power dissipation is assumed. Note that printed
wiring assemblies can have an operating ambient air temperature of almost 77C, or an internal
temperature rise of 27C.
Many computer programs are available for modeling thermal networks. The modeling programs
can do a steady state or transient analysis and can have thousands of nodes and thermal
resistance values. Some examples of available programs are: MITAS, SYSCAP, and ANSYS.
These programs run on mainframe computers and are available on most time share services
throughout the country. Also, there are many similar versions of these programs which have
been scaled down to run on micro and minicomputers.
Next Section
Previous Section
B.1 Introduction
The electrical stress derating analysis consists of determining, from the circuit and the operating
conditions of a given application, the actual stresses induced on each part, the parts ability to
withstand that stress at the parts operating temperature, and a comparison of that stress ratio to
the derating requirements in this manual. These stresses are identified in terms of voltage,
current, power, etc. Transient conditions must also be taken into account. The analysis will not
normally consider worst case conditions with regard to applied voltages or currents, part
parameter values, or driving signals. However, when an undesirable stress condition is noted,
worst case conditions should be examined, and the probability of worst case occurrence
investigated.
One of the objectives of a stress analysis is to provide early warning of design deficiencies at the
program phase where changes are least expensive; that is, while the design is still on paper. A
stress analysis incorporated early into a program can save significant amount of test time and
dollars by providing a basis for a reliable design. Failures during a test program will inevitably
cause delays in order to progress to the next acquisition phase, which is production.
The purpose of a circuit analysis is to calculate the electrical parameters of each part in the
circuit. These parameters can be AC/DC voltages and currents, peak or ripple voltages,
transients, signal and power supply variations, etc. There are two ways of doing a circuit
analysis: manual and computer aided.
In manual circuit analysis the engineer must calculate currents and voltages using basic circuit
theory. This consists of using Ohms law, Kirchoffs laws, Thevenins Thermo, and equivalent
network theory, just to name a few. This may be good for a small, simple circuit, but is too labor
intensive and time consuming for most modern designs.
For large circuits, a computer-aided circuit analysis technique must be used. The computer
generates a mathematical model of each component. It then arranges these models to fit the
circuit, and steps through the analysis process. Currently, there are two well known
computer-aided systems. They are SPICE, for Simulation Program for Integrated Circuit
Evaluation, and SUPER COMPAC, for Super Computerized Optimization of Microwave Passive
and Active Circuits.
It can also be readily adapted to do worst case analysis. The effect of a part drifting out of spec,
or its complete failure, can be simulated on the computer. Thus, the computer can assess its
effect on the entire circuit. One, disadvantage, however, occurs when a semiconductor is not
part of the programs database models. Then a model must first be developed by a design
engineer before the computer can run.
Part stress rating is defined as the ratio of applied to rated electrical parameters. These electrical
parameters may consist of voltage, current, power, inverse voltage, etc., or any combination of
these, depending on the part. For example, a power stress ratio is used for a resistor, while a
voltage stress ratio is used for a capacitor.
A parts stress rating can vary from lot to lot, vendor to vendor, and usually decreases with
increasing temperature. This appendix will concentrate on the latter -- how to calculate stress
ratings with increasing temperatures. It will do this by presenting examples. For the purpose of
these examples, it is assumed that a thermal profile analysis has already been done in accordance
with Appendix B.
B.3.1 Examples
1. Given:
c. An equipment internal temperature rise of 30C has been determined, using the
principles of Appendix B.
2. Determine:
3. Solution:
The part ambient operating temperature (TOP) is the sum of the external ambient equipment
temperature (70C) plus the internal temperature rise (30C) or:
From the absolute maximum part rating data for solid tantalum capacitors (Figure 200.8), we
know graphically the maximum DC voltage rating at a part operating temperature of 100C has
decreased to 87.25 percent of its maximum rating at 80C (reference Figure B.1). Analytically,
we know:
Figure B.1 -- Maximum Voltage Derating Curve
4. Determine:
The required capacitor voltage rating for the application using the derating requirements in
this manual for solid tantalum capacitors.
5. Solution:
b. Plot a vertical line from the 100C point on the temperature scale to the
intersection of the derating curve (reference Figure B.2).
c. Plot a horizontal line from this point to the left hand scale.
d. Read: Maximum allowable impress voltage = .30 times the absolute maximum
rating at 85C.
1. Given:
The general absolute maximum power rating and the derating requirements of this manual
(reference Figure B.3).
2. Determine:
Formula for the maximum permissible power dissipation at TJM that meets the derating
requirement for transistors in this manual.
c. Determine the maximum rated power at TS from the device specification. This
will be designated PMAX.
d. The absolute maximum rating curve is now completely defined for the given
device, (reference Figure B.3).
g. The derating requirement curve is now completely defined for the given device
(reference Figure B.3).
The reader will observe the semiconductor derating requirement curve is parallel to
the absolute maximum rated curve, whereas other device may display curves which
are not parallel. For semiconductors, it can readily be confirmed that any curve
parallel to the absolute maximum rating curve actually represents a semiconductor at
a constant junction temperature.
To readily appreciate this phenomenon and gain familiarity with some of the
terminology, the following semiconductor example is provided:
Maximum ratings selected from a 2N917 data sheet to develop the derating curve are
now provided:
Arbitrarily selecting two ambient air temperatures of 50C and 100C, the maximum derated
permissible operating power dissipations (POP) are calculated to be:
and
For a 50C ambient temperature and an actual circuit application of 71mW power dissipation, the
junction temperature would be
For a 100C ambient temperature and an actual circuit application of 14 mW power dissipation,
the junction temperature is:
The reader can verify that for ambient temperatures greater than 25C, a 50 percent power
derating actually results in a junction temperature greater than 112.5C.
Figure B.4 -- Transistor Derating Curve
The next step in the electrical stress derating analysis process is to calculate the stress ratios and
document the results of the stress analysis. The stress ratio is the numeric ratio between the
actual stresses determined from the circuit analysis divided by the stress rating of the part at the
part operating temperature. This can be expressed mathematically as a percentage as follows:
Examples
Example B-3
Referring to Example B-1, the working voltage stress ratio and documentation of the analysis is
presented on Stress Analysis Worksheets as Figure B.5.
Example B-4
Referring to Example B-2, the power stress ratio and documentation of the analysis is presented
on Stress Analysis Worksheets as Figure B.6.
In general, the best method of stress analysis documentation is to utilize worksheets that allow
for a logical flow of information from left to right with all required data and parameters
specifically called out in a column callout. This obviates the casual omission of required
parameters and is most effectively accomplished with the use of different worksheets for the
various part categories.
Documentation of any electrical stress analysis should be to a level sufficient to accomplish the
following in descending order of importance.
1. To assure the designer that all derating parameters required by this manual have been
reviewed and the derating requirements met.
2. To assure that the contractor can verify compliance to the derating requirements in
this manual during formal and informal design reviews.
3. To any additional level required to provide data required by the Contract Data
Requirements List, DD-1423.
An example collection of Part Usage and Applied Stress Data Worksheets are included herein.
Verification of the derating requirements is accomplished by comparing the actual stress ratios to
the maximum allowable stress ratio as provided in the derating requirements of this manual.
If all parameters contained in the part derating requirements have not been addressed for each
and every part type, the Electrical Stress Derating Analysis has not been satisfactorily completed.
A major pitfall is that some contractors review only those stress parameters required to perform a
failure rate prediction. As a result, many of the parameters contained in the derating
requirements of this manual are not addressed. Electrical Stress Derating Analyses that address
only the parameters necessary for failure rate prediction should be rejected.
If all the derating requirements contained in Table I of Section I have been addressed and met,
the baseline design has been established.
If the derating requirements have not been met, the Electrical Stress Derating Analysis must
contain trade-off studies which bring the baseline design within the derating requirements, or
engineering justification demonstrating why they cannot be met. One of the most important
elements in requiring an Electrical Stress Derating Analysis is to allow for Navy review of any
the contractor justification of stresses which do not comply with the derating criteria and
determine if there is agreement with the justification.
Figure B.5 -- Part Usage and Applied Stress Data Capacitors Fixed and Variable
Figuer B.7 -- Part Usage and Applied Stress Data Resistors Fixed
Figure B.8 -- Part Usate and Applied Stress Data Relays
Figure B.9 -- Part Usage and Applied Stress Data Diaode -- Zener
Figure B.10 -- Part Usage and Applied Stress Data Diodes Signal, General Purpose and
Recitifier
Figure B.11 -- Part Usage and Applied Stress Data Linear Microcircuit
Next Section
Previous Section
C.1 General
The following tables give the factors affecting the failure rates of electrical/electronic parts. As
given in MIL-HDBK-217 the part failure rate is a function of these factors (designated as
factors). An asterisk appearing in any column indicates that those factors do not contribute to
the failure rate of the particular part type:
For example, the part failure rate p for fixed resistors is given by:
p = b(E x R x Q)
E = Environmental factor
R = Resistance factor
Q = Quality factor
Resistors X X X X
Capacitors X X X X
Semiconductors X X X X
Microcircuits X X X 2*
Relays X X X 2*
Connectors X X *2 2*
Switches X X 2* X
Inductive X X 2* X
Devices
* Power for resistors
Voltage for capacitors
Power (current) for semiconductor devices
Power, current (continuous) for microcircuits
Contact current (continuous) for relays
Contact current and voltage for switches
** Due to a lack of statistical data MIL-HDBK-217 failure rates do not consider all
the electrical parameters affecting part failure rate. Also MIL-HDBK-217 does
not consider the effect of transients on failure rate. For a more complete listing
of factors which affect part reliability, see Table 1 of Chapter 1.
Fixed X
Variable X X X
Variable X X X X
(Styles
RP and RR
only)
Resistor X
Network
(Style RZ)
3 The higher the resistance value, the higher the failure rate.
Capacitance values -- all styles except CV, PC, CT and CG. (The higher the capacitance value,
the higher the failure rate)
Series circuit resistance -- for type CSR. (The higher the series circuit resistance, the lower the
failure rate)
Relays X X X X
Switches X X X
Connectors X X X
Next Section
Previous Section
Appendix D -- Derating
D.1 General
This appendix explains the reason derating is required on electronic parts. The definition of
derating is: the application of parts in such a manner that the actual stresses are substantially less
than the design maximum ratings. Design maximum ratings usually relate to the maximum
rating given to a part by the manufacturer. The closer a part is operated to its design maximum
ratings, the greater the probability of failure. Derating reduces the probability of failure. It also
allows added protection from system anomalies unforeseen by the designer (e.g. transients).
Derating is a well known and commonly practiced procedure, and is one of the most powerful
reliability tools available to the designer.
A parts strength varies from lot to lot and from one manufacturer to another. This is a random
process and can therefore be represented by a statistical distribution. Likewise, the stress on a
part is random. It changes with temperature, vibration, electrical transients, vibration, shock, etc.
Stress can also be represented by a statistical distribution. Figure D.1 is a graph showing
strength and stress distributions together. Each statistical distribution is represented by a
probability density function. The average value is the highest point on the curve, and it gradually
diminishes at the same rate on either side of the average.
For a part to operate properly, the strength must be higher than the stress. However, since
strength and stress are both random, there is always a slight chance that stress will be higher than
strength. It is represented by the intersecting (shaded) area of the graph. The larger the
intersection area, the higher the failure rate becomes.
(1) decrease the stress on a part (which moves the stress distribution to the left), or
(2) increase the parts strength (which moves the strength distribution to the right). In
either case, or both, the goal is to decrease the parts stress-to- strength ratio. The
degree to which the stress-to-strength ratio affects the random failure rate is well
known and is published in MIL-HDBK-217.
Basically, MIL-HDBK-217 is a listing of the intersecting areas for different parts under different
stresses. From MIL-HDBK-217 one can plot failure rate vs. stress level for various
temperatures. An example is shown in Figure D.2. It is readily apparent from this graph that
failure rate increases exponentially with stress. It can also be readily shown that failure rates
increase exponentially with temperature (see Figure D.3). Therefore, by setting temperature and
stress limits one can decrease failure rates exponentially. Ideally, these limits should be set at a
point where the rate of increase of failure rate is above an acceptable amount. In other words,
where the slope of the line becomes too steep. This is how the derating curves in this manual
were derived.
In most instances stress cannot be reduced without a change in the electrical design. Therefore,
the most common approach is to increase the parts strength. This is done by using a larger or
stronger part. The part can then be stressed to only a small percentage of its capability. This is
analogous to using safety factors in mechanical designs. The higher the safety factor, the
stronger the end item will be.
As a side benefit, derating also reduces part internal operating temperature. This decreases the
rate of chemical time-temperature reactions, which are the primary cause of part aging and
parameter drifting.
Different part types are failure sensitive to different types of environmental and electrical
stresses. A capacitor, for instance, is primarily sensitive to voltage, while a diode is sensitive to
power, forward current, and reverse breakdown voltage. These are the stresses a particular part
must be derated to. Some stresses can be derated directly. Other stresses are depended on
temperature. Therefore, their derating requirements must also be dependent on temperature. For
example, a type CUR13 capacitor (p. 200-28) has its voltage derated by a constant 60 percent up
to 105 degrees C. A type CB50 capacitor (p. 200-29), however, is derated by anywhere between
55 and 40 percent, depending on its operating temperature.
D.3 Example
The following is an example of how the absolute maximum and derated maximum power limits
are calculated for a MIL-R-55182 resistor.
The absolute maximum rating line for a MIL-R-55182 resistor (style RNR) is shown in Figure
D.4. Along the absolute maximum rating line the resistor is operating at 100 percent of its
capability. Below 125 degrees C the resistor is capable of operating at full wattage. Above 125
degrees C, the absolute maximum wattage rating is reduced linearly. It reaches zero at 175
degrees C. The absolute maximum rating of a 0.125 watt resistor used at 140 degrees C is 70
percent of its maximum, or 0.0875 watts.
The derating curve of a MIL-R-55182 resistor is also shown in Figure D.4. As can be seen, it is
parallel to the absolute maximum rating line. It is derated to 55 percent of maximum up to 125
degrees C. Above 125 degrees C, it is reduced linearly and reaches zero at 150 degrees C.
When derated, the resistor cannot operate above 150 degrees C. At 125 degrees C,
the same 0.125 watt RNR resistor should not dissipate more than 0.069 watts. Likewise, at 140
degrees C it should not dissipate more than 0.019 watts.
There may be circumstance where the full derating requirements in this manual are not desired.
However, any deviation from the requirements in this manual must receive approval from the
Procuring Activity.
The reason full derating may not be desired is because derating requires tradeoffs in other areas.
For instance, for a circuit to meet derating requirements it must be made more complex. Where
one part could do the job, now two parts must be used. This increased complexity increases
space and weight. Also, full derating may not be desired for one-shot devices, such as missiles
or torpedoes. If the devices operating life is only a few minutes, derating will not be very
effective. However, in these circumstances one must also take into account if the one-shot
device receives any operational testing, or can stay in a stand-by mode for long periods of time.
The degree to which derating is applied should be weighed against the impact on mission
performance in the event of system failure, as well as space and weight considerations.
In these circumstances, full derating requirements may have to be sacrificed. However, rather
than completely eliminating derating requirements a tradeoff can be made. This manual is
written so it can be tailored to different applications. A statement in the contract stating that the
derating requirements be decreased by a certain percentage would suffice.
Although derating will increase the life of a part, failure rates will vary widely depending on
circuit application and part parameter drift. To assure low failure rates, designers should strive
to make circuits as tolerant as possible to part parameter variations. Although part specifications
control the amount of parameter drift parts can undergo as a result of artificial aging and
environmental exposure, individual parts may vary more. Unless the circuit design is
sufficiently tolerant, the circuit may not function properly, even though no catastrophic part
failure has occurred. Extreme examples of poor design are those circuits which require part
selection for proper operation.
Next Section
Previous Section
Appendix E
E.1 General
The purpose of the Standard Electronic Module (SEM) program is to take many electronic
functions and combine them into one electronic module. The program uses quality assurance
techniques, high quality parts, derating, and detailed thermal analysis to make a highly reliable
product. The intent of the SEM program is to make the modules more reliable and less costly
than their individual parts put together.
The SEM program is operated by Naval Avionics Center (NAC), Indianapolis, Indiana, and
Naval Weapons Support Center (NWSC), Crane, Indiana. NAC is the SEM program Design
Review Activity (DRA). Its responsibilities are to review new modules and applications to a
particular system, recommend methods of optimizing design, determine whether new modules
should become standard, assign module key codes and drawing numbers, and maintain module
data banks. NWSC, Crane is the Quality Assurance Activity (QAA). Its responsibilities are to
review new module specifications, do initial qualification design reviews, correlate vendor test
equipment with bench test setup equipment, review failure trends, perform failure analysis, and
conduct process audits.
1. Divide electronic functions into building blocks that can be used in many different
applications.
4. Provide thermal design limits (e.g., 60_ C Class I, 100_ C Class II maximum fin
temperature).
There are about 350 standard modules presently in existence. To maintain package
configurations, specially designed SEMs are allowed for special functions. These special SEMs
are only allowed for functions not currently available, and they are required to meet the same
quality assurance requirements as the standard SEMs. Special SEMs expected to have common
usage in future equipment and can be changed to standard SEMs.
Figure E.1 depicts the quality assurance activity. It begins in the design phase and continues
through design verification, production, and use. Quality assurance is implemented through
auditing and failure analysis reviews.
The Military Specifications pertinent to the SEM program are shown in Figure E.2.
Figure E.1 -- QA Process
Next Section
Previous Section
F.1 General
Man-Made
Switching (mechanical and solid state) of reactive loads; opening and closing of switches
and relays
Generator and motor operation (overspeed and hunting, startup, control and shutdown).
Reflected waves.
Electromagnetic pulse (EMP), e.g., from nuclear blasts, large chemical explosions.
Current inrush.
Natural
Lightning.
Transients originate from three major sources; normal switching operations (power supply
turn-on and turn-off cycles), routine AC line fluctuations, and abrupt circuit disturbances (faults,
load switching, voltage dips, magnetic coupling by electro-mechanical devices, lightning surges,
etc.)
Transients are a major cause of component failures in seminconductors. Random transients can
permanently damage voltage sensitive devices and disrupt proper system operation. Normal
shipboard power system on-off cycles have the potential of emitting spikes with enough energy
to destroy an entire semiconductor device chain. Any surviving devices are also suspect.
Trouble shooting, isolation, and replacing damaged devices is both time consuming and costly.
This is especially true in the field. Transients are fairly common on shipboard power systems.
As described in DOD-STD-1399 (NAVY), Section 300, shipboard power systems may
encounter many types of voltage transients depending upon the type of power system.
There are three different types of power systems used in shipboard applications are:
1. Type I -- 400/115 V (rms), 60 Hz, at either 3 phase or 1 phase. This is used mainly
for ships servicing power and lighting distribution system. Voltage tolerance is +5
percent of the average of the three line to line voltages.
2. Type II -- 440 or 115 volts (rms), 400 Hz, at either 1 phase or 3 phase. The voltage
tolerance is not as precise as Type III systems.
3. Type III -- 440 or 115 volt (rms), 400 Hz, 3-wire, or 115 volt (rms) 4-wire. This is
similar to Type II except the average voltage tolerance between line to line is +1/2
percent.
F.1.2.1 Shipboard:
For Type I and Type II power supply systems, voltage transients of 10 percent or less may occur
several times an hour, and transients of 10 to 16 percent may occur several times a day
(percentage based on nominal user voltage). On Type I systems, the time to reach the transient
maximum varies from 0.001 to 0.03 second, and to reach the transient minimum from 0.001 to
0.06 seconds. This depends on the rating of the generator and the type of regulator and
excitation system used.
For Type III power supply system, voltage transients of 1 percent or less may occur several times
an hour. The time to reach the transient maximum may vary from 0.001 to 0.1 second.
F.1.2.2 Aircraft:
Aircraft power transients are required to be capable of tolerating transient variations in both
voltage and frequency values. Figures F1 to F5, taken from MIL-STD-704, provide limit
envelopes for application to aircraft power.
Some system protection is normally built into shipboard equipment, but this protection will not
always prevent damage. The equipment is still susceptible to high frequency, high voltage
transients. These can occur from electromagnetic pulses, lightning, static discharges, switching
of low factor loads, switching from normal to alternate power supplies, or active ground detector
tests (an active ground detector superimposes 500 V DC on an AC system).
F.2.1 Lightning
A single lightning can have a length of over 2 Km and a peak current up to 400 KA. Lightning
usually occurs in two or three strokes, but can vary anywhere between one to twelve. The rise
time for the first return stroke is about 1.5 s with decay to 1/2 crest value of 40 s. The highest
peak currents (i.e. 400 kA) occur in the tropical regions of the world, because of the greater
height of the thundercloud. Maximum peak currents in the temperate zones are about 250 kA.
The initial phase of a lightning discharge begins with a downward moving stepped leader. This
is when the electric field between the thundercloud and the earth is sufficient to cause dielectric
breakdown of the intervening air. The stepped leader lowers the cloud to ground charge
inincremental steps. It ionizes a channel which becomes the path of the lightning stroke. After
the channel is generated, the return stroke travels from ground up to the base of the cloud.
Although the stroke travels from earth to cloud, the charge transfer of electrons is normally from
cloud to earth.
Note: Limits shown do not apply to voltage spikes having a duration of less than 50
microseconds. These are controlled by MIL-E-6051
Figure F.4 -- Envelope for Voltage Transient for 270 Volts (Nominal) DC System
Note: Limits shown do not apply to voltage spikes having a duration of less than 50
microseconds. These are controlled by MIL-E-6051
Figure F.5 -- Limits For AC Overfrequency or Underfrequency for Aircraft Power Systems
(3) a strike on a nearby object causing an induced voltage in an overhead line by the
magnetic field produced.
A model of a voltage transient on a 120 V AC system is waveform which rises to a peak in 500
ns, and then decays in a sinusoidal waveform at a frequency of 100 kHz. DOD-STD-1399
(NAVY), Section 300 gives a rise time of 1.5 s.
Switching operations involving restrikes, such as those produced by air contactors or switches,
can produce voltage escalations reaching several times the system voltage. The worst case is
generally found on the load side of the switch. Therefore, it usually involves only the device
being switched, and the prime responsibility rests with the end user. However, transients can
also affect the line side of the switch. They can be reflected back onto the line and be passed on
to other equipment, possible damaging it.
Fast rise time voltage transients can cause secondary effects due to inductance in the circuit.
This secondary voltage transient is described by the relationship:
V(t) = di L
dt
Induced voltages have been recognized for a long time, but because of their short durations, were
not a problem until the introduction of semiconductors. Many power semiconductors are
relatively immune to most transients. However, small geometry semiconductors have been
damaged with transient voltages of only 25 ns duration.
The waveform of an induced voltage is usually oscillatory in nature. This is because the switch
gap alternately sparks over and extinguishes itself. This following sequence occurs: (1) The
switch opens and interrupts the line current. (2) The current in the inductor needs to dissipate so
it charges the capacitance in the line and interwinding capacitance of the inductor. (3) This
raises the voltage until it reaches the spark-over voltage of the switch. (4) At this point the
contacts spark over, and the current is dissipated to the load. (5) However, the spark-over occurs
very rapidly. When it extinguishes itself it effectively opens the switch, which is a repeatof step
(1). The entire process then repeats itself until there is insufficient stored energy left in the
inductor to cause the spark-over. The stored energy in the coil is expressed by the following
equation:
E = 1 LI22
Where:
E = energy in joules
L = inductance in henries
The maximum inductive switching transient for shipboard 110 volts AC systems is defined by
DOD-STD-1399 (NAVY), Section 300, as a peak voltage of 2,500 volts and a waveform as
shown in Figure F.6.
This waveform has been adopted as the worst case switching transient which would be generated
by a large inductive source. An example of such a worst case transient generator could be an
elevator motor on an aircraft carrier.
During a high altitude nuclear detonation, gamma rays are released which set high energy
electrons into motion. These electrons are subsequently deflected by the electromagnetic belt
surrounding the earth and an electromagnetic pulse is created. This deflection can generate a
voltage pulse of 50,000 V/m at a point 300 miles from the detonation, with a rise time of
approximately 5,000 V/s. This is much more severe than a lightning strike, which has a field
density of 3 V/m, 6 miles from point of discharge, and a rest time of 600 V/s (see Table F.2).
Because of the large magnitude of the voltage and frequency spectrum of an EMP, there are
basically no off-the-shelf R-C or L-C filters that can effectively reduce or eliminate such an
EMP.
Metal Oxide Semiconductor (MOS) circuits and small area geometry semiconductors are
especially vulnerable to the EMPs. Because of this vulnerability, effective suppression
techniques and protective devices must be used to protect against EMP.
Electrostatic Discharge (ESD) is a high voltage, low current pulse. Its rise time is in the range of
nanoseconds, compared to microseconds for a lighting or switching transient. The rate of
voltage increase is about 2 KV/ns and reaches a maximum of about 35,000 V. New generation
microcircuits made under the VHSIC program are especially sensitive to ESD. Some can be
damaged by less than 100 V.
Figure F.6 -- DoD-STD-1399 Wave Form
For additional information on ESD, one should consult MIL-STD-1686 and its accompanying
handbook, DOD-HDBK-263. A comparison between EMP, lightning, and static discharge
pulses is presented in Table F.2.
The primary method of suppressing transients is a low pass filter. The simplest form of a filter is
a capacitor in parallel with the DC input. This will suppress any transient to which the capacitor
presents an impedance lower than the transient source. A capacitor can be an effective filter as
long as it:
(1) does not load down the system and create any current in-rush problems (a resistor in
series with the capacitor will reduce the in-rush problems but also reduces the
effectiveness of the capacitor),
(2) does not have any parasitic inductance which will degrade the high frequency
admittance of the device, and
If the transient has high DC components, a capacitor filter can become ineffective. Also, the
inductance associated with the filter resistance will reduce its suppression effectiveness.
In addition, transient oscillations (ringing) can develop. When this happens, the capacitor can
have the effect of increasing the transient voltage if the transient source is inductive.
Filters are often used in conjunction with transient suppressors. These will be discussed in the
next section.
A second method of suppressing voltage spikes is to use a transient suppressor. Basically, this is
a device which switches a low impedance load into the circuit when the current or voltage goes
over a set limit. The low impedance load then absorbs the excess power, effectively leveling off
the spike. To be effective, a transient suppressor must have a fast response time and be capable
of handling high energy pulses. It also must be able to clip the transient at a safe voltage level
and then dissipate the energy before any damage occurs. Good engineering judgement must be
used when selecting a suppressor. Voltage and current spikes are not precisely very predictable,
but they obey the laws of probability. Therefore, the statistical distribution of the spikes can be
taken into account. Also, the power rating, maximum operating temperature, size, parasitic
leakage, and capacitance of the device should all be considered.
b. A clamping voltage level less than the maximum voltage the equipment can
withstand. Also, it should not interfere with the normal operation of the equipment.
c. It should be self-restoring.
d. It should be maintenance free.
To avoid interference with normal equipment operation, zener or varistor clamping voltages
should be more than 20 percent higher than the maximum operating voltage of the equipment.
On the other hand, the surge protection voltage level (P) should be lower than the equipment
withstanding voltage (W).
Although various schemes have been used for transient suppression, such as Zener diodes,
avalanche diodes, varistors, RC filters, spark gap arrestors, etc, this discussion will focus on
Bipolar Transient Suppressors, avalanche diodes, and metal oxide varistors. Use of circuit
breakers, fast fuses, and thermistors is intended to protect against extended overload conditions
and these types of devices are not recommended for suppression of fast transients. Section F.3.3
below, is taken from MIL-HDBK-978(NASA).
F.3.3.1 Operation:
The TVS consists of two special construction Zener diodes oriented back-to-back. It is
characterized by extremely rapid response time, low series resistance, and high surge voltage
handling capacity. These devices are not used as voltage regulators in the usual Zener diode
application but as voltage suppression agents. A Zener diode is primarily used as a voltage
regulator. Therefore, its selection is concerned with the dynamic slope of breakdown,
breakdown voltage minimum and maximum within set limits, and wattage. The transient voltage
suppressor is used to suppress voltage surges, wherein the main concern is the breakdown at a set
maximum limit and not breakdown before this clamping voltage.
Zener diodes are usually selected for the average power that must be dissipated while regulating.
The transient suppressor diodes are selected for the instantaneous power that must be dissipated
with less attention being placed on the maximum applied voltage of the transient, when at low
current values, as long as the device does not exceed its maximum temperature rating.
Transient suppressors are required to display minimal leakage currents since the clamping
voltage is usually set marginally above the maximum operating voltage of the circuit. The Zener
diode is not as concerned with leakage current since regulation occurs most often within the
avalanche region.
b. Working peak voltage (VM, WKG) or stand-off voltage (VR). This parameter is the
maximum permissible DC working voltage. It is the highest reverse voltage at
which the TVS will be nonconducting.
c. Maximum peak surge voltage (VSM) or maximum clamping voltage (VCmax). This is
the maximum voltage drop across the TVS while subjected to the peak pulse current,
usually for 1 ms.
e. Test current (IT). The current is the zener current at which the nominal breakdown
voltage is measured.
f. Maximum leakage current (IL). This current is the current leakage measured at the
maximum DC working voltage (VM or VR).
g. Maximum peak surge current (ISM). This current is the maximum permissible surge
current.
F.3.3.2 Physical Construction:
The transient voltage suppressor diode is generally made using two passivated diffused, planar or
diffused planar junctions on an epitaxial substrate process die placed back-to-back in a single
glass-to-metal or double-slug package. The three basic die processes are passivated diffused,
planar, and diffused planar junction on epitaxial substrate, as shown in Figures F.8, F.9 and F.10
respectively.
Figure F.11 below illustrates the back contact technique used in constructing Transient Voltage
Suppressor (TVS) diodes. TVS diodes generally use high temperature alloy back contacts,
associated with double-slug construction.
F.3.3.3 Applications.
When choosing a TVS for a particular application, the following important factors should be
considered:
b. The TVS selected should display a reverse stand-off voltage (VR) equal to or greater
than the circuit operating voltage (maximum ac or DC peak voltage with tolerances).
c. To select the appropriate TVS one must also determine transient pulse power (Pp).
This can be accomplished by using the simple definition; transient pulse power (Pp)
equals the peak pulse current (Ipp) multiplied by the clamping voltage (VC).
Pp = VC x Ipp
a. Microprocessor System TVS Applications. The TVS is placed on the signal and
input power lines to prevent system failures caused by the effect of switching power
supplies, AC power surges and transients, such as electrostatic discharges as
illustrated by Figure F.12. A TVS across the signal line to ground will prevent
transients from entering the data and control buses. TVSs shunted across the power
lines ensure transient-free operating voltage.
b. DC Line TVS Applications. A TVS in the output of a voltage regulator can replace
many components used as protection circuits such as the crowbar circuit illustrated
by Figure F.13. It may also be used to protect the bypass transistor from voltage
spikes across the collector-to-emitter terminals.
Figure F.14 shows a typical switching power supply with TVS devices used for protection
in voltage sensitive areas.
Figure F.14 -- Typical Switching Power Supply
(5) Relay and Solenoid TVS Applications. The coil inductance of a solenoid or
relay can release energy that can damage contacts or drive-transistors. A TVS
used as shown in Figure F.15 would provide adequate protection.
The proper TVS can be selected by determining peak pulse power (Pp) and pulse
time (tp). Knowing the values of VCC, L, and, RL the following equations can be
used to determine Pp and tp.
I V
O = CC/ RL
PP = IP x VC
V
tl = CC/RL/ VC/L
tp = t1
Figure F.15 -- Coil and Contacts, DC.
In extensive tests of transient voltage suppressors, the three most critical parameters were peak
pulse power, peak surge voltage and reverse leakage current. Because of its inherent use as a
transient suppressor, the TVS must sustain high voltage pulse power. Opens or shorts caused by
cracking of the die are main-failure modes if peak reverse power rating is exceeded. Long term
life tests have yielded a significant number of failures in these areas. Failure mechanisms of
TVSs are similar to those of other diode types.
A second type of semiconductor transient suppressor is the avalanche diode. The avalanche
diode was first developed to protect telephone circuits from lightning. This device suppresses
surges by limiting the peak voltages through avalanche breakdown. It is especially effective for
short duration pulses (i.e., in the order of 10 ms). It can absorb relatively large transients
because of its large junction area. It can also quickly dissipate relatively large amounts of heat
because it has silver heat sinks which are metallurgically bonded to the silicon chip. The design
and structure of this device provides inherently lower impedance compared to zener diodes
having the same steady-state voltage ratings.
The clamping speed of the avalanche diode is in the order of microseconds. This gives them the
ability to protect very sensitive devices from fast rise time pulses. They are also available in
special low inductance configurations.
One disadvantage of avalanche diodes is their large capacitance. This is due to their large
junction area. When used on DC or low frequency AC lines, the capacitance will not attenuate
or alter the signal. However, in high frequency applications insertion loss occurs. To
compensate, a low capacitance diode can be added, as shown in Figure F.16. However, it must
have a reverse breakdown voltage greater than that of the suppressor, and must be able to
withstand the maximum peak pulse current of the suppressor with the minimum voltage drop
across it. The low capacitance diode will also reduce the response time of the suppressor by the
very nature of its construction. Under pulse conditions the low capacitance diode, which is
essentially a high voltage rectifier, will conduct in the forward conduction mode only. This
mode is slower than the avalanche mode of conduction.
The Metal Oxide Varistors (MOV) is a very nonlinear device. At normal voltages, it has a very
high resistance, about 160 kohm. However, when a surge occurs, its resistance decreases by
several orders of magnitude. The device is made from a ceramic-like material composed of
small granules of zinc oxide suspended in a matrix of bismuth oxide.
At normal voltages, a steady-state current (standby current) flows through the device which is
less than 1 mA peak. Once the transient voltage exceeds the normal voltage by about 100 V, the
resistance decreases. One disadvantage of the varistor is that a relatively large voltage is needed
before suppression begins. This is called a weak knee. The device will also only operate for
only a limited number of transient pulses.
Some of the varistors advantages are voltage-current characteristics comparable to zener diodes,
good bipolar suppression capabilities, and high power dissipation ability. It also has a fast
response time, which is in the nanosecond range. Figure F.17 illustrates one method for
assuming automatic voltage protection of motor starters, thyristors, and diodes.
Inductive effects can be, and often are, a source of abnormally high peak clamping voltages
which can nullify the capability of a transient voltage suppressor. These high clamping voltages
can result in failure of vulnerable electronic parts. Therefore, transient voltage suppressors can
be rendered ineffective due to inductive effects. To minimize the inductive effect, a zero
inductance suppressor element can be used.
Figure F.17 -- Primary Method for Assuring Automatic Voltage Protection of Motor Starter
Thyristors and Diodes
The voltage developed across an inductor under a voltage step is expressed as:
VL = L di/ dt
L = inductance in henries
The inductance caused by the lead wires between the suppressor and the circuitry is usually
overlooked when designing suppressors into a system. Although the inductance of such lead
wires is quite low (about 1 H/m), for fast rise time transients even a few centimeters of lead wire
can drastically reduce supressor effectiveness. Inductance causes a voltage overshoot across the
leads. For example, if a 20 kV voltage transient occurs, and the total wire length were 10 cm,
then the voltage at point A (reference Figure F.18), would be:
where:
Thus:
VA = 400 volts
Even if this voltage overshoot may not be permanently destructive, it could still cause circuit
malfunction. The effect of lead length on peak clamping voltage is shown in Figure F.19 for an
ICT-5 type Avalanche (TranZorb) suppressor. This device was designed to protect low voltage
logic circuits. It was pulsed at 100, 200, 300, 400 and 500 A with a 1.2 x 50 second waveform.
The voltage drop was measured across the 0.030 cm diameter straight wire leads at distances of
0, 1.0 and 2.0 cm from the body of the package. Figure F.18 shows that clamping voltage
increases with both pulse current and lead. The increase in clamping voltage with lead length is
due to inductive effects.
For fast rise time transients (e.g., ESD which has rise times on the order of 10 ns) lead lengths
present a real problem. Therefore, if the protector lead lengths could be reduced to virtually
zero, more effective suppression would result.
Figure F.18 -- Transient Suppressors With Lead Wire Inductance
The intent of adding suppression elements is to improve reliability of the equipment, but the
opposite effect can occur if the suppressor is not properly chosen. For example, adding a
suppressor having marginal capability can be worse than no suppressor at all. Selection of the
proper transient suppressor is, for most applications, a five step process:
Quite often adequate transient protection may not be attainable with only one type of suppressor.
For example, high energy transient sources may require the use of spark gaps followed by
semiconductor protective devices. A spark gap can divert the high current surge, and a varistor,
Zener diode or Avalanche diode can then rapidly clamp the residual voltage.
Avalanche operated devices have proven to be effective EMP suppressors. However, each
situation must be evaluated on its own particular set of boundary conditions (i.e, circuit operating
voltage and frequency, circuit destruct threshold, maximum peak current anticipated, etc).
Integrated circuits can be protected by placing an avalanche suppressor across the power line.
The suppressor, having a low on resistance will reduce unwanted transients while maintaining
the circuit voltage level. In case of abnormal transients beyond the maximum current or power
ratings of the suppressor, the suppressor will usually fail short. This trips the systems circuit
breaker or fuse, but protects the equipment circuitry.
b. The suppressor protects internal MOSFET devices from transients introduced on the
power supply line (see Figure F.21).
d. Input stages of operational amplifiers are vulnerable to low energy, high voltage
static discharges and EMPs. Limited protection is provided by a clamping diode or a
diode input network within the IC substrate (see Figure F.23). The diode, however,
must have a breakdown voltage greater than the supply voltage (Vcc). Such diodes
are limited in current capacity.
MOVs are a cost effective means of dealing with high, medium, and low level transients. Most
MOVs are electrically symmetrical, resembling back-to-back Zener diodes. They are useful in
protecting both AC and DC circuits. However, they are not effective in clamping highly
repetitive spikes. This is because the MOVs characteristics degrade each time it suppresses a
spike. As a consequence, pulse life derating curves identify the operating life of a MOV as a
function of peak current, pulse width, and mean number of pulses.
A MOV should not be used in applications were repetitive pulses will occur. For example,
assume a high power MOV is capable of suppressing 1,000,000 pulses, 20 ms wide at 50 A peak.
Operating at 10 kHz, the MOV can function for only 100 s. By that time the characteristics have
deteriorated enough so that rated specifications are no longer guaranteed.
MOVs are recommended for use in circuits where medium to high surge currents are expected
on a random basis, and where maximum insulation resistance and minimum discharge voltage
are not important. MOVs provide good protection together with small size, low cost, and large
energy handling capacity. They are available with clamping voltages between 22 and 1,800 V,
peak surge capacities from 250 to 20,000 A, and response times in the order of 50 ns. MOV
ratings of energy, power dissipation capability, voltage, and peak current, are temperature
dependent. Therefore, it is important to use derating curves when selecting MOVs.
MOVs have some drawbacks for high frequency applications. They can exhibit high shunt
capacitance in the range of 10 pf to about .02 f. Most varistors are also slightly inductive.
Table F-3 is a general guide for comparing various types of transient suppressors with ratings on
their performance characteristics. The higher the rating number (e.g., 4), the better the device
performance characteristics.
Table F.3
Voltage Capability 3 1 3
Peak Current 2 1 2
Capability(non-repetitive)
Leakage Current 4 3 2
Energy Absorption 4 2 2
Capability (Repetitive)
Response Time 4 2 2
Operating Temperature 3 2 2
Life 3 2 1
Size 3 4 4
Cost 1 3 3
Note: Ratings are based on a scale of one to four; the higher the number the better the
rating.
Next Section
Previous Section
800 Switches
Standard switches shall be selected from MIL-STD-1132. Effective and proper selection of
switches and associated hardware, requires an awareness of the advantages and disadvantages of
different types of switches, their behavior under various environmental conditions, switch
construction, the effect of the switch upon the circuit, and the effect of the circuit upon the
switch.
The designer should consider the following characteristics and parameters in choosing the most
suitable switch design and associated hardware:
b. Flexibility of circuitry
c. Type of action
e. Type of contacts
h. Panel layout
b. Toggle
c. Rotary
d. Thermostatic
e. Pressure
These types differ from each other in size, cost, actuation, construction, and general mechanical
and electrical characteristics.
b. Operating characteristics
(2) Switching action -- momentary action, maintained action, alternate action, snap
action
c. Contacts
(2) Contact ratings -- resistive, inductive, lamp, motor, capacitive, and frequency
d. Environmental Considerations
(2) Moisture
(3) Altitude
(4) Shock and vibration
(5) Acceleration
(7) Explosion
e. Insulation Requirements
f. Switching speed
g. Life
(1) Mechanical
h. Terminals
(1) Solder
(2) Screw
(3) Wire
800.2.1 Enclosures
Many types of enclosures are used to protect switches from varying external conditions,
particularly high humidity and dirt. Switches may be classified based on the degree of protection
offered by the enclosure. Such classifications include the following: open, sealed, enclosed,
environmentally (resilient), and hermetically sealed. With the open construction switch, no
effort is made to protect the switch or its parts from atmospheric conditions. The enclosed
switch is one in which the contacts are enclosed in a case made of plastic or metal and plastic.
The environmentally (resilient) sealed switch contains a completely sealed case where any
portion of the seal is resilient material such as a gasket or a seal. The hermetically sealed switch
is made air tight by a sealing process which involves fusing or soldering and does not use
gaskets. The hermetically sealed enclosure offers the greatest protection because it insulates
against such elements as moisture, harmful gases, and dirt. It also eliminates the increased
arcing caused by low atmospheric pressures at high altitudes.
800.2.2 Contacts
The switch electrical contacts can be classified by function, current carrying capacity, and
application. The contact arrangements vary in complexity from a simple make or break, through
make-before-break, break-before-make, make-make, break-break, etc.; from a single-throw to
multiple-throw, single pole to multipole; and various combinations of these features.
Contacts are usually given multiple ratings dependent on the type of load being switched. These
ratings consist of resistive, capacitive, lamp, motor, or inductive loads. Most switches are given
the resistive load rating and in most instances at least one additional rating mentioned above.
Extra care should be used in selecting switches for motor, inductive, or lamp loads. Also, see
section 800.3 on derating.
In many instances, critical operate and bounce times of the contact are important. Operate time
in a double-throw switch is defined as the time it takes the moving contact to separate from the
normally closed contact, travel to the normally open contact and make the circuit, not including
bounce time. Bounce time is the interval between first make of the contact until any
uncontrolled making and breaking of the contact ceases. In many electronic circuits, a
millisecond is a long time and operate and bounce times become critical parameters.
Contact resistance is the resistance between two mating closed electrical contacts measured at
their external terminals. Contact resistance can be used to measure voltage drop and power
dissipation across the contacts. Contact resistance includes the resistance of the contact material,
oxide or other film on the surface of the contacts, and the resistance of the elements on which the
contacts are mounted (e.g., springs, mounting, and the external terminals and their connections).
Dry circuit applications require switch contact resistance ratings based on testing, using an open
circuit voltage of 30 millivolts maximum and a test current of 10 milliamperes maximum (e.g.,
Method 311 of MIL-STD-202). In order to achieve low-level load capability, suppliers often use
contact materials such as gold, platinum, palladium (or their alloys) to minimize formation of
insulating films on the contacts. They also design switch contacts so that they wipe across each
other to remove such films. Other considerations are: to provide internal designs which do not
allow rubbing of insulated parts against metal that generates dust particles internally; and to
adequately seal the switch contacts from external dust and foreign matter since foreign particles
being deposited on the switch contacts increases contact resistance. Proper test and performance
requirements before and after life tests should be the basis for selection of these switches.
Insulation resistance is important in high impedance circuits. Low insulation resistance in a high
voltage circuit can result in excessive dissipation within the dielectric leading to failure. For
applications where arc-over is a problem, switches should be selected which have a high
insulation resistance (1,000 megohms or more and 5 megohms or more as measured immediately
after the moisture resistance test). Properly rated insulating materials, furthermore, will not form
a conducting surface film buildup after repeated arcs on making and breaking of contacts.
A careful analysis of the required life of the switch or total number of operations should be
made. In some equipment applications, the operational life of the switch can be comparatively
short.
800.2.6.1 Temperature
b. Exposure to low temperature may cause certain materials of a switch to contract, causing
case cracking or opening. Such failure could result in moisture or other foreign matter
entering the switch causing short circuit, voltage breakdown, or corona.
800.2.6.2 Moisture
Moisture in the dielectric will decrease the dielectric strength, life, and insulation resistance and
could cause corrosion by increasing the galvanic action between dissimilar metals in the switch.
Switches which operate in high humidities shall be hermetically sealed, or if this is not
applicable, the use of boots, O rings, or diaphragms placed over switch openings, is
recommended to decrease moisture entry.
800.2.6.3 Altitude
With a decrease of atmospheric pressure, the spacings required to prevent flashover increase
substantially. Small switches, because of their very close contact spacing, are particularly
susceptible to malfunction at high altitudes. Contact life decreases substantially with continued
arc-over.
Switches should be selected that will operate under expected shock and vibration. Those with
contact chatter limitations can be used in low frequency and shock vibrations. High frequency
vibration will determine the effects of fatigue and resonance on the mechanical construction of
the switch contact elements. Contact bounce due to shock or vibration causes arcing which
shortens contact life and could generate electrical noise.
800.2.6.5 Acceleration
Some switches are sensitive to acceleration forces arising from use in high speed vehicles or
aircraft. Failures are usually due to internal construction which allows normally closed contacts
to open and normally open contacts to close under acceleration conditions.
A combination of dust and small amounts of moisture will increase the possibility of voltage
breakdown of the insulation between closely spaced terminals. Where low insulation resistance
or high leakage currents can cause circuit malfunction, the switch should be capable of passing
sand and dust test requirements.
800.2.6.7 Explosion
Explosion resistance requires that switches operate in a volatile atmosphere without causing
explosion. Wherever possible, switches to be used in an explosive atmosphere shall be sealed.
800.2.7 Precautions
a. Switch contacts shall be operated in parallel for redundancy only and never to increase the
current rating.
b. Switch applications in digital circuits must be carefully reviewed to assure that contact
bounce or chatter will not be interpreted as pulses which will produce logic errors.
c. Switches are subject to contact chatter in high shock and vibration environments, and these
environments may dictate the use of solid state devices. The mounting of switches shall be
designed to minimize vibration and shock amplification or to provide necessary isolation.
800.3 Derating
The principal applications of various types of switches are provided in Table 800-II.
Guards MIL-G-7703*
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