MC10E131, MC100E131

5VECL 4-Bit D Flip-Flop

Description
The MC10E/100E131 is a quad master-slave D-type flip-flop with
differential outputs. Each flip-flop may be clocked separately by
holding Common Clock (CC) LOW and using the Clock Enable (CE)
inputs for clocking. Common clocking is achieved by holding the CE http://onsemi.com
inputs LOW and using CC to clock all four flip-flops. In this case, the
CE inputs perform the function of controlling the common clock, to
each flip-flop.
Individual asynchronous resets are provided (R). Asynchronous set
controls (S) are ganged together in pairs, with the pairing chosen to
reflect physical chip symmetry.
Data enters the master when both CC and CE are LOW, and transfers
to the slave when either CC or CE (or both) go HIGH. PLCC28
FN SUFFIX
The 100 Series contains temperature compensation.
CASE 776
Features
1100 MHz Min. Toggle Frequency
Differential Outputs
Individual and Common Clocks MARKING DIAGRAM*
Individual Resets (asynchronous) 1
Paired Sets (asynchronous)
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V MCxxxE131G
with VEE = 0 V AWLYYWW
NECL Mode Operating Range: VCC = 0 V
with VEE = 4.2 V to 5.7 V
Metastability Time Constant is 200 ps.
xxx = 10 or 100
Internal Input 50 kW Pulldown Resistors A = Assembly Location
ESD Protection: Human Body Model; > 2 kV, WL = Wafer Lot
Machine Model; > 200 V YY = Year
WW = Work Week
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test G = PbFree Package
Moisture Sensitivity Level:
Pb = 1
PbFree = 3 *For additional marking information, refer to
Application Note AND8002/D.
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 0.125 in, ORDERING INFORMATION
Oxygen Index: 28 to 34 See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Transistor Count = 240 devices
PbFree Packages are Available*

*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2006 1 Publication Order Number:

November, 2006 Rev. 11 MC10E131/D
 MC10E131, MC100E131

S
D3 D Q Q3

CE3 Q Q3
R
R3 D2 CE2 R2 VCCO Q3 Q3
R3
25 24 23 22 21 20 19
S
CE3 26 18 Q2 D2 D Q Q2

Q2 CE2
D3 27 17 Q Q2
R
S12 28 16 VCC R2
S03
Pinout: 28-Lead PLCC S12
VEE 1 15 Q1
(Top View) CC

CC 2 14 Q1 R1
R
Q Q1
CE1
S03 3 13 Q0
D1 D Q Q1
D0 4 12 Q0 S

5 6 7 8 9 10 11
R0
CE0 R0 D1 CE1 R1 NC VCCO R
CE0 Q Q0

* All VCC and VCCO pins are tied together on the die.
D0 D Q Q0
Warning: All VCC, VCCO, and VEE pins must be externally S
connected to Power Supply to guarantee proper operation.

Figure 1. Pinout Diagram Figure 2. Logic Diagram

Table 1. PIN DESCRIPTION

PIN FUNCTION
D0 D3 ECL Data Inputs
CE0 CE3 ECL Clock Enables (Individual)
R0 R3 ECL Resets
CC ECL Common Clock
S03, S12 ECL Sets (paired)
Q0 Q3, Q0 Q3 ECL Differential Outputs
VCC, VCCO Positive Supply
VEE Negative Supply
NC No Connect

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 MC10E131, MC100E131

Table 2. MAXIMUM RATINGS

Symbol Parameter Condition 1 Condition 2 Rating Unit
VCC PECL Mode Power Supply VEE = 0 V 8 V
VEE NECL Mode Power Supply VCC = 0 V 8 V
VI PECL Mode Input Voltage VEE = 0 V VI v VCC 6 V
NECL Mode Input Voltage VCC = 0 V VI w VEE 6 V
Iout Output Current Continuous 50 mA
Surge 100 mA
TA Operating Temperature Range 0 to +85 C
Tstg Storage Temperature Range 65 to +150 C
qJA Thermal Resistance (JunctiontoAmbient) 0 lfpm PLCC28 63.5 C/W
500 lfpm PLCC28 43.5 C/W
qJC Thermal Resistance (JunctiontoCase) Standard Board PLCC28 22 to 26 C/W
Tsol Wave Solder Pb 265 C
PbFree 265
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.

Table 3. 10E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V (Note 1)
40C 0C 25C 85C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 58 70 58 70 58 70 58 70 mA
VOH Output HIGH Voltage (Note 2) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mV
VOL Output LOW Voltage (Note 2) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mV
VIH Input HIGH Voltage 3830 3995 4160 3870 4030 4190 3940 4110 4280 mV
VIL Input LOW Voltage 3050 3285 3520 3050 3285 3520 3050 3302 3555 mV
IIH Input HIGH Current CC 350 350 350 350 mA
S 450 450 450 450
R, CE 300 300 300 300
D 150 150 150 150
IIL Input LOW Current 0.5 0.3 0.5 0.25 0.3 0.2 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary 0.46 V / +0.06 V.
2. Outputs are terminated through a 50 W resistor to VCC 2.0 V.

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 MC10E131, MC100E131

Table 4. 10E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = 5.0 V (Note 3)
40C 0C 25C 85C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Cur- 58 70 58 70 58 70 58 70 mA
rent
VOH Output HIGH Volt- 1020 930 840 980 895 810 910 815 720 mV
age (Note 4)
VOL Output LOW Volt- 1950 1790 1630 1950 1790 1630 1950 1773 1595 mV
age (Note 4)
VIH Input HIGH Voltage 1170 1005 840 1130 970 810 1060 890 720 mV
VIL Input LOW Voltage 1950 1715 1480 1950 1715 1480 1950 1698 1445 mV
IIH Input HIGH Current mA
CC 350 350 350 350
S 450 450 450 450
R, CE 300 300 300 300
D 150 150 150 150
IIL Input LOW Current 0.5 0.3 0.5 0.065 0.3 0.2 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. Input and output parameters vary 1:1 with VCC. VEE can vary 0.46 V / +0.06 V.
4. Outputs are terminated through a 50 W resistor to VCC 2.0 V.

Table 5. 100E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V (Note 5)
40C 0C 25C 85C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 58 70 58 70 58 70 67 81 mA
VOH Output HIGH Voltage 3975 4050 4120 3975 4050 4120 3975 4050 4120 mV
(Note 6)
VOL Output LOW Voltage 3190 3295 3380 3190 3255 3380 3190 3260 3380 mV
(Note 6)
VIH Input HIGH Voltage 3975 3835 3975 4120 3835 3975 4120 3835 3975 4120 mV
VIL Input LOW Voltage 3355 3190 3355 3525 3190 3355 3525 3190 3355 3525 mV
IIH Input HIGH Current CC 350 350 350 350 mA
S 450 450 450 450
R, CE 300 300 300 300
D 150 150 150 150
IIL Input LOW Current 0.5 0.3 0.5 0.25 0.5 0.2 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC. VEE can vary 0.46 V / +0.8 V.
6. Outputs are terminated through a 50 W resistor to VCC 2.0 V.

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 MC10E131, MC100E131

Table 6. 100E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = 5.0 V (Note 7)
40C 0C 25C 85C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply 58 70 58 70 58 70 67 81 mA
Current
VOH Output HIGH 1025 950 880 1025 950 880 1025 950 880 mV
Voltage (Note 8)
VOL Output LOW 1810 1705 1620 1810 1745 1620 1810 1740 1620 mV
Voltage (Note 8)
VIH Input HIGH Volt- 1025 1165 1025 880 1165 1025 880 1165 1025 880 mV
age
VIL Input LOW Volt- 1645 1810 1645 1475 1810 1645 1475 1810 1645 1475 mV
age
IIH Input HIGH Cur- mA
rent
CC 350 350 350 350
S 450 450 450 450
R, CE 300 300 300 300
D 150 150 150 150
IIL Input LOW Cur- 0.5 0.3 0.5 0.25 0.5 0.2 mA
rent

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
7. Input and output parameters vary 1:1 with VCC. VEE can vary 0.46 V / +0.8 V.
8. Outputs are terminated through a 50 W resistor to VCC 2.0 V.

Table 7. AC CHARACTERISTICS VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = 5.0 V (Note 7)
40C 25C 85C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
fMAX Maximum Toggle Frequency 1100 1400 1100 1400 1100 1400 MHz
tPLH Propagation Delay to Output CE 310 600 750 360 500 700 360 500 700 ps
tPHL CC 275 600 725 325 500 675 325 500 675
R 400 635 875 450 640 825 450 640 825
S 300 550 775 350 550 725 350 550 725
tS Setup Time (Note 10) D 200 20 150 20 150 20 ps
tH Hold Time (Note 10) D 225 20 175 20 175 20 ps
tRR Reset Recovery Time 450 150 400 150 400 150 ps
tPW Minimum Pulse Width CLK 400 400 400 ps
R, S 400 400 400
tSKEW Within-Device Skew (Note 11) 60 60 60 ps
tJITTER Random Clock Jitter <1 <1 <1 ps
tr/tf Rise/Fall Time (2080%) 275 460 725 300 480 300 480 675 ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. 10 Series: VEE can vary 0.46 V / +0.06 V.
100 Series: VEE can vary 0.46 V / +0.8 V.
10. Setup/hold times guaranteed for both CC and CE.
11. Within-device skew is defined as identical transitions on similar paths through a device.

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 MC10E131, MC100E131

Q Zo = 50 W D
Driver Receiver
Device Device
Q Zo = 50 W D

50 W 50 W

VTT
VTT = VCC 2.0 V

Figure 3. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D Termination of ECL Logic Devices.)

ORDERING INFORMATION
Device Package Shipping
MC10E131FN PLCC28 37 Units / Rail
MC10E131FNG PLCC28 37 Units / Rail
(PbFree)
MC10E131FNR2 PLCC28 500 / Tape & Reel
MC10E131FNR2G PLCC28 500 / Tape & Reel
(PbFree)

MC100E131FN PLCC28 37 Units / Rail

MC100E131FNG PLCC28 37 Units / Rail
(PbFree)

MC100E131FNR2 PLCC28 500 / Tape & Reel

MC100E131FNR2G PLCC28 500 / Tape & Reel
(PbFree)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices

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 MC10E131, MC100E131

PACKAGE DIMENSIONS

PLCC28
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 77602
ISSUE E

B 0.007 (0.180) M T LM S N S
Y BRK
N U 0.007 (0.180) M T LM S N S

Z
L M

W
D
X G1 0.010 (0.250) S T LM S N S

28 1 V
VIEW DD

A 0.007 (0.180) M T LM S N S
H 0.007 (0.180) M T LM S N S
Z
R 0.007 (0.180) M T LM S N S

C K1
E

0.004 (0.100)
G T SEATING K
J PLANE
F 0.007 (0.180) M T LM S N S
G1 VIEW S
0.010 (0.250) S T LM S N S VIEW S

NOTES: INCHES MILLIMETERS

1. DATUMS L, M, AND N DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS DIM MIN MAX MIN MAX
PLASTIC BODY AT MOLD PARTING LINE. A 0.485 0.495 12.32 12.57
2. DIMENSION G1, TRUE POSITION TO BE B 0.485 0.495 12.32 12.57
MEASURED AT DATUM T, SEATING PLANE. C 0.165 0.180 4.20 4.57
3. DIMENSIONS R AND U DO NOT INCLUDE E 0.090 0.110 2.29 2.79
MOLD FLASH. ALLOWABLE MOLD FLASH IS F 0.013 0.019 0.33 0.48
0.010 (0.250) PER SIDE. G 0.050 BSC 1.27 BSC
4. DIMENSIONING AND TOLERANCING PER H 0.026 0.032 0.66 0.81
ANSI Y14.5M, 1982. J 0.020 0.51
5. CONTROLLING DIMENSION: INCH. K 0.025 0.64
6. THE PACKAGE TOP MAY BE SMALLER THAN R 0.450 0.456 11.43 11.58
THE PACKAGE BOTTOM BY UP TO 0.012 U 0.450 0.456 11.43 11.58
(0.300). DIMENSIONS R AND U ARE
V 0.042 0.048 1.07 1.21
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY W 0.042 0.048 1.07 1.21
EXCLUSIVE OF MOLD FLASH, TIE BAR X 0.042 0.056 1.07 1.42
BURRS, GATE BURRS AND INTERLEAD Y 0.020 0.50
FLASH, BUT INCLUDING ANY MISMATCH Z 2_ 10_ 2_ 10_
BETWEEN THE TOP AND BOTTOM OF THE G1 0.410 0.430 10.42 10.92
PLASTIC BODY. K1 0.040 1.02
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037
(0.940). THE DAMBAR INTRUSION(S) SHALL
NOT CAUSE THE H DIMENSION TO BE
SMALLER THAN 0.025 (0.635).

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 MC10E131, MC100E131

ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights
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