Experiment: Vindhya Institute of Technology & Science
Experiment: Vindhya Institute of Technology & Science
EXPERIMENT: EI-01
AIM: - Study and verify Analog to Digital Conversion and its Technical Specification.
THEORY: -
The digital systems have been spreading considerably since they allow to realize complex functions
accurately, low cost and in a way comparatively simple to implement. Analog/digital converters are
the natural interface between the world of physical quantities that vary analogically i.e. in a
continuous way and that of the digital control systems which vary with finite increases. A/D
converters have numerous applications and consequently have a high diffusion. Just think for
example of the digital multimeters. Each one of this contains an A/D converter for converting the
analog quantity that has to be measured to corresponding numerical value.
The analog/digital conversion is a logical process that requires conceptually two-steps:
The quantizing and the coding. Quantization is the process that performs the transformation of a
continuous analog signal in a set of discrete levels. Soon afterwards we combine through the coding
each discrete levels with a digital word.
The figure 1 shows what just said.
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Vindhya Institute of Technology & Science
Department of Electrical & Electronics Number of Experiment Pg. No.
Electrical Instrumentation Group Code: EI No.01 Roll No.
Fig 1
The straight line is the continuous analog signal, while the staircase line is the quantized
corresponding signal. If we assume a binary code, the 8 quantized states are coded through a 3 bits
digital word and this corresponds to the output of a 3 bits A/D converter. The sequences of binary
numbers starting from "000" and reaching "111" are assigned to the 8 output states. Let us analyze
in detail a few aspects of the quantized signal. The first aspect is the "resolution", defined as the
number of output states that can be coded through a binary word of n bits; with n bits we can code
2n output states. In this case we have a 3 bits quantizer; therefore we code 8 output states whereas
with 12 bits we code 4096 of them. The diagram showed in figure 1 point out that in the quantized
signal there are 2 n - 1 = 7 threshold levels. These points are at 0.625 - 1.875 - 3.125 - 4.375 - 5.625
- 6.875 - 8.125 V.
The threshold points have to be set accurately to divide the range of the signal to quantize in correct
quantized signals. The voltages 1.25 - 2.5 - 3.75 - 5 - 6.25 - 7.5 - 8.75 V are the center points of
each output code word. The staircase quantization is the best possible approximation for a straight
line starting from the origin and reaching full scale. The range of the input voltage for which the
same output code is used is called "quantum". In figure 1, the quantum is 1.25 V. In general the
quantum is expressed by the relation:
Q = FSR / 2n = Full scale range / 2n
It is plain that the quantum is the lowest analog difference that can be discriminated at the output.
In case of a 12 bits quantizer, still with a full scale of 10V the quantum is:
Q = 10/2 12 = 10/4096 = .00244 V = 2.44 mV
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Vindhya Institute of Technology & Science
Department of Electrical & Electronics Number of Experiment Pg. No.
Electrical Instrumentation Group Code: EI No.01 Roll No.
connected to the comparator is in the logic state high ("1") or when the signal to convert is larger
than the D/A converter output.
Fig. 3
Let us suppose the signal to convert is 5.0V.
Fig. 4
Let us apply a reset control. The counter goes to "0000" and the converter gives zero voltage at the
output. The comparator results at high level at the output, the first pulse that leads the counter to
"0001" and the converter output to 0.625 is let go. The converter remains in the starting state. When
the new clock pulse passes the counter goes to "0010" and the DAC output to 1.25V. The process
continues until the counter receives the ninth pulse, its state then becomes "1001" and the converter
output goes to 5.625V and thus is larger than the voltage to converter. The comparator output
changes its state and so the clock pulses are not transmitted to the counter any more. The word
"1001" is then the digital conversion of 5.0V. The used converter allows the conversion of positive
signals included in the range from 0 to 5V and has a maximum resolution of 0.625V. The counter
converter is conceptually simple and its realization is of little difficulty and cheap. On the other
hand it is rather slow in the conversion. Moreover the conversion time is not constant but depends
upon the value to convert.
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Vindhya Institute of Technology & Science
Department of Electrical & Electronics Number of Experiment Pg. No.
Electrical Instrumentation Group Code: EI No.01 Roll No.
Fig. 5
The DAC performs the conversion in n steps where n is the converter settlement in bits. The
working principle of this converter is analogous to that of weighing an object on a laboratory
balance, using standard weights as reference, according to the binary sequence 1, 1/4, 1/8,
1/16 1/n kilograms. To perform accurately the measure, we have to start with the largest
standard weight and go on in decreasing order till the one of smallest weight. We place the largest
weight; if the balance doesn't tip we leave the weight and add the one from the others of largest
weight. If the balance doesn't tip we go on. If instead it does tip, we remove the largest weight
added and we replace it with the next one. After having tried n standard weights, the weighing
operation stops. The total of the standard weights remaining on the balance is the closest
approximation to the unknown.
Fig. 6
We start by setting the bit 3, thus "1000". The corresponding voltage is worth 5V and being lower
than the voltage to convert we leave it at "1". We set to "1" the bit 2 too. The word turns into
"1100" corresponding to 7.5 V which is larger than the voltage to convert. We put therefore at zero
the bit 2 and we proceed to the bit 1 and set it to "1". The corresponding word "1010" is worth 6.25
V still larger than 5.0V, we put than at zero the bit 1 and set to "1" the bit 0. The word turns into
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Vindhya Institute of Technology & Science
Department of Electrical & Electronics Number of Experiment Pg. No.
Electrical Instrumentation Group Code: EI No.01 Roll No.
"1001" and is worth 5.625V. This value is still larger than 5.0V and so the reading jams at "1000"
which is the digital conversion of the voltage 5.0V. We can see as in this case we have done only
four comparisons to perform the conversion. In the case of an n bits converter are required n
comparisons instead of the 2n foreseen, in the worst case, by the previous converter. We have to
make a precise statement : while the counter had converted 5.0V into the word "1001", the
successive approximation one converts into "1000". This is because whereas the counter converter
blocks the clock when the digital word goes over the value to convert and so approaches in excess
with the last significant bit, the successive approximation converter approaches in deficiency.
Fig. 7
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Vindhya Institute of Technology & Science
Department of Electrical & Electronics Number of Experiment Pg. No.
Electrical Instrumentation Group Code: EI No.01 Roll No.
Fig. 8
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