Hands On Electronics A Practical Introduction To Analog and Digital Circuits by Daniel M Kaplan and Christopher G White
Hands On Electronics A Practical Introduction To Analog and Digital Circuits by Daniel M Kaplan and Christopher G White
Hands On Electronics A Practical Introduction To Analog and Digital Circuits by Daniel M Kaplan and Christopher G White
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Hands-On Electronics
Packed full of real circuits to build and test, Hands-On Electronics is a unique introduction
to analog and digital electronics theory and practice. Ideal both as a college textbook and
for self-study, the friendly style, clear illustrations and construction details included in the
book encourage rapid and effective learning of analog and digital circuit design theory.
All the major topics for a typical one-semester course are covered, including RC circuits,
diodes, transistors, op amps, oscillators, digital logic, counters, D/A converters and more.
There are also chapters explaining how to use the equipment needed for the examples
(oscilloscope, multimeter and breadboard), together with pinout diagrams for all the key
components referred to in the book.
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Hands-On Electronics
A One-Semester Course for
Class Instruction or Self-Study
Daniel M. Kaplan
and
Christopher G. White
Illinois Institute of Technology
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Cambridge, New York, Melbourne, Madrid, Cape Town, Singapore, São Paulo
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Contents
1.1 Multimeter 1
1.2 Breadboard 2
1.2.1 Measuring voltage 4
1.2.2 Measuring current; resistance and Ohm’s law 5
1.2.3 Measuring resistance 8
1.3 Oscilloscope 8
1.3.1 Probes and probe test 10
1.3.2 Display 11
1.3.3 Vertical controls 11
1.3.4 Horizontal sweep 12
1.3.5 Triggering 12
1.3.6 Additional features 13
2 RC circuits 15
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vi Contents
3 Diodes 31
4 Bipolar transistors 47
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vii Contents
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viii Contents
7.2 Experiments 91
7.2.1 Testing open-loop gain 91
7.2.2 Inverting amplifier 92
7.2.3 Noninverting amplifier 93
7.2.4 Voltage follower 94
7.2.5 Difference amplifier 95
7.3 Additional experiments 97
7.3.1 Current source 97
7.3.2 Noninverting summing amp with difference amplifier 98
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ix Contents
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x Contents
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Figures
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xii List of figures
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xiii List of figures
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xiv List of figures
11.2 Simple RS latch made of two-input NANDs with state table. 146
11.3 7474 D-type flip-flop with state table. 147
11.4 Sample timing diagram for a (positive-edge-triggered) 7474 D-type
flip-flop. 147
11.5 Pinout of the 74112 JK flip-flop. 149
11.6 Pinout and power connections for the 74373 and input and output
connections for testing the tri-state output. 150
11.7 Divide-by-four ripple counter. 151
11.8 Synchronous divide-by-four counter. 152
11.9 Looking at contact bounce by driving a divide-by-four counter
from a switch. 153
12.1 Pinout of 7490 decade counter. 157
12.2 Pinout of TIL311 hex display. 158
12.3 Timing diagram for a gated clock signal. 160
12.4 Pinout of ’121 and ’123 one-shots with external RC timing network. 160
12.5 Substandard outputs resulting from gating clock signals. 161
12.6 Pinout of 74150 16-to-1 multiplexer. 163
12.7 Pinout of 7489 16×4 RAM. 163
13.1 Simple D/A converter and output waveform resulting from input
counting sequence. 168
13.2 Simple A/D converter. 171
13.3 Pinout for ADC080x series of A/D converters and the on-chip
self-clocking configuration. 172
13.4 Pinout for DAC080x series of D/A chips. 175
13.5 Method for producing a DC-shifted waveform. 176
13.6 Control logic for 8-bit successive-approximation ADC. 179
13.7 8-bit successive-approximation ADC. 180
C.1 Series RC circuit. 193
C.2 Right triangle to illustrate Eq. C.17. 193
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Tables
xv
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About the authors
Dr Daniel M. Kaplan received his Ph.D. in Physics in 1979 from the State
University of New York at Stony Brook. His thesis experiment discovered
the b quark, and he has devoted much of his career to experimentation
at the Fermi National Accelerator Laboratory on properties of particles
containing heavy quarks. He has taught electronics laboratory courses for
non-electrical-engineering majors over a fifteen-year period at Northern
Illinois University and at Illinois Institute of Technology, where he is cur-
rently Professor of Physics and Director of the Center for Accelerator
and Particle Physics. He also serves as Principal Investigator of the Illinois
Consortium for Accelerator Research. He has been interested in electronics
since high school, during the junior year of which he designed a computer
based on DTL integrated circuits. Over more than twenty-five years in
experimental particle physics he has often been responsible for much of
his experiments’ custom-built electronic equipment. He is the author or
co-author of over 150 scientific papers and one encyclopedia article, and
co-editor of three books on heavy-quark physics and related fields.
Dr Christopher G. White is Assistant Professor of Physics at Illinois
Institute of Technology. He received his Ph.D. in Physics from the
University of Minnesota in 1990. He has authored or co-authored over
100 scientific articles in the field of high-energy particle physics, and his
current research interests involve neutrinos and hyperons. Dr White is an
enthusiastic and dedicated teacher who enjoys helping students to over-
come their fear of electronics and to gain both confidence and competence.
xvi
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To the Reader
xvii
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Acknowledgments
We are grateful to Profs Carlo Segre and Tim Morrison for their contri-
butions and assistance, and especially to the IIT students without whom
this book would never have been possible. Finally, we thank our wives and
children for their support and patience. It is to them that we dedicate this
book.
xviii
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Introduction
This book started life as the laboratory manual for the course Physics 300,
‘Instrumentation Laboratory’, offered every semester at Illinois Institute of
Technology to a mix consisting mostly of physics, mechanical engineering,
and aeronautical engineering majors. Each experiment can be completed
in about four hours (with one or two additional hours of preparation).
This book differs from existing books of its type in that it is faster paced
and goes into a bit less depth, in order to accommodate the needs of a one-
semester course covering the elements of both analog and digital electron-
ics. In curricula that normally include one year of laboratory instruction in
electronics, it may be suitable for the first part of a two-semester sequence,
with the second part devoted to computers and computer interfacing – this
scheme has the virtue of separating the text for the more rapidly changing
computer material from the more stable analog and digital parts.
The book is also suitable for self-study by a person who has access to
the necessary equipment and wants a hands-on introduction to the subject.
We feel strongly, and experience at IIT has borne out, that to someone who
will be working with electronic instrumentation, a hands-on education in
the techniques of electronics is much more valuable than a blackboard-
and-lecture approach. Certainly it is a better learning process than simply
reading a book and working through problems.
The appendices suggest sources for equipment and supplies, provide
tables of abbreviations and symbols, and list recommendations for fur-
ther reading, which includes chapter-by-chapter correspondences to some
popular electronics texts written at similar or somewhat deeper levels to
ours: the two slim volumes by Dennis Barnaal, Analog Electronics for
Scientific Application and Digital Electronics for Scientific Application
(reissued by Waveland Press, 1989); Horowitz and Hill’s comprehensive
The Art of Electronics (Cambridge University Press, 1989); Diefenderfer
and Holton’s Principles of Electronic Instrumentation (Saunders, 1994);
xix
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xx Introduction
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xxi Introduction
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1 Equipment familiarization: multimeter,
breadboard, and oscilloscope
In this chapter you will become acquainted with the ‘workhorses’ of elec-
tronics testing and prototyping: multimeters, breadboards, and oscillo-
scopes. You will find these to be indispensable aids both in learning about
and in doing electronics.
Apparatus required
One dual-trace oscilloscope, one powered breadboard, one digital multi-
meter, two 10X attenuating scope probes, red and black banana leads, two
alligator clips.
1.1 Multimeter
You are probably already familiar with multimeters. They allow measure-
ment of voltage, current, and resistance. Just as with wristwatches and
clocks, in recent years digital meters (commonly abbreviated to DMM for
digital multimeter or DVM for digital voltmeter) have superseded the ana-
log meters that were used for the first century and a half or so of electrical
work. The multimeters we use have various input jacks that accept ‘banana’
plugs, and you can connect the meter to the circuit under test using two
banana-plug leads. The input jacks are described in Table 1.1. Depending
on how you configure the meter and its leads, it displays
r the voltage difference between the two leads,
r the current flowing through the meter from one lead to the other, or
r the resistance connected between the leads.
Multimeters usually have a selector knob that allows you to select what is
to be measured and to set the full-scale range of the display to handle inputs
of various size. Note: to obtain the highest measurement precision, set the
knob to the lowest setting for which the input does not cause overflow.
1
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2 Hands-on electronics
a
For the BK Model 2703B multimeters used in the authors’ labs.
To avoid damaging the meter, be sure to read the safety warnings in its
data sheet or instruction booklet.
1.2 Breadboard
‘Breadboard’ may seem a peculiar term! Its origins go back to the days
when electronics hobbyists built their circuits on wooden boards. The
breadboards we use represent a great step forward in convenience, since
they include not only sockets for plugging in components and connecting
them together, but also power supplies, a function generator, switches, logic
displays, etc.
The exercises that follow were designed using the Global Specialties
PB-503 Protoboard. If you do not have access to a PB-503, any suitable
breadboard will do, provided you have a function generator and two variable
power supplies. Additional components that you will need along the way
(that are built into the PB-503) include a 1 k and a 10 k potentiometer,
a small 8 speaker, two debounced push-button switches, several LED
logic indicators, and several on–off switches.
Fig. 1.1 displays many of the basic features of the PB-503. (For simplic-
ity, some PB-503 features that will be used in experiments in later chapters
have been omitted.) While the following description is specific to the
PB-503, many other breadboards share some, if not all, of these features.
The description will thus be of some use for users of other breadboard
models as well.
The breadboard’s sockets contain spring contacts: if a bare wire is pushed
into a socket, the contacts press against it, making an electrical connec-
tion. The PB-503’s sockets are designed for a maximum wire thickness of
22 AWG (‘American Wire Gauge’) – anything thicker (i.e., with smaller
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3 1 Equipment familiarization
Horizontal Row
(Group of 5)
Amplitude
Slider
Frequency
Slider
Function
Generator
Analog
Digital
8Ω
Speaker
Push Button
De-Bounced
Switches
Vertical Column
(Group of 25)
10 k pot 1 k pot
Fig. 1.1. Illustration showing many of the basic features of the PB-503 powered
Protoboard, with internal connections shown for clarity. Note that each vertical column is
broken into halves with no built-in connection between the top and bottom.
AWG number) may damage the socket so that it no longer works reliably
for thin wires. The PB-503 sockets are internally connected in groups of
five (horizontal rows) or twenty five (vertical columns; see Fig. 1.1).
Each power supply connects to a ‘banana’ jack and also to a row of
sockets running along the top edge of the unit. The three supplies, +5 V
(red jack), +15 V (yellow jack), and −15 V (blue jack), have a common
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4 Hands-on electronics
‘ground’ connection (black jack). The +15 V and −15 V supplies are
actually adjustable, using the knobs provided, from less than 5 volts to
greater than 15 volts.
Warning: This is not true for most AC-powered meters and oscilloscopes.
1 If you wonder what we mean by ‘within reason’, ask yourself what bad thing would happen if
you connected the DMM common to, say, twenty million volts – if you’re interested, see e.g.
H. C. Ohanian, Physics, 2nd edition, vol. 2, ‘Interlude VI’ (Norton, New York, 1988), esp.
pp. VI–8 for more information on this.
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5 1 Equipment familiarization
Multimeter
+
Power V
+
_
Supply A mA COM VΩ
Ground
(Common) 1 µF
Fig. 1.2. Measuring voltage. (a) An arbitrary circuit diagram is shown as an illustration of
how to use a voltmeter. Note that the meter measures the voltage drop across both the
resistor and capacitor (which have identical voltage drops since they are connected in
parallel). (b) A drawing of the same circuit showing how the leads for a DMM should be
connected when measuring voltage. Notice how the meter is connected in parallel with
the resistor.
DMM
+ Multimeter 0.011 A
A _
Power +
Supply
A mA COM VΩ
Ground
(Common)
Fig. 1.3. Measuring current. (a) Schematic diagram of series circuit consisting of power
supply, 10 k potentiometer, and multimeter. (Note that the center tap of the potentiometer
is left unconnected in this exercise – accidentally connecting it to power or ground could
lead to excessive current flow and burn out the pot.) (b) A drawing of the same circuit
showing how the DMM leads should be configured to measure current. Note that the
meter is connected in series with the resistor.
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6 Hands-on electronics
V = IR. (1.1)
2 Of course, the existence of other materials (namely semiconductors) for which the I –V relationship
is nonlinear makes electronics much more interesting and underlies the transformation of daily life
brought about by electronics during the twentieth century.
3 If you don’t have a PB-503 breadboard, find a 10 k pot on your breadboard if it has one; otherwise
you will have to purchase a separate 10 k pot.
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7 1 Equipment familiarization
Table 1.2. Color code for nonprecision resistors (5, 10, or 20% tolerance).
The resistance in ohms is the sum of the values in columns 1 and
2, multiplied by the value in column 3, plus or minus the tolerance
in column 4. For example, the color code for a 1 k resistor would
be ‘brown--black--red’, for 51 ‘green--brown--black’, for 330
‘orange--orange--brown’, etc.
Stripe: 1 2 3 4 (tolerance)
Black 0 0 100
Brown 10 1 101
Red 20 2 102
Orange 30 3 103
Yellow 40 4 104
Green 50 5 105
Blue 60 6 106
Violet 70 7 107
Gray 80 8 108
White 90 9 109
Gold 5%
Silver 10%
None 20%
Stripe 2
Stripe 3
Stripe 1
Tolerance Stripe
Use Ohm’s law to predict the current that will flow around the circuit
if you use the power supply that you set to its midpoint in the previous
exercise. What current should flow if the supply is set to its minimum
voltage? What is the current if the supply is set to its maximum voltage?
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8 Hands-on electronics
Now turn on the breadboard power, measure the currents for these three
voltages, and compare with your predictions. Make a graph of voltage vs.
current from these measurements. Is the relationship linear? How close
is the slope of voltage vs. current to 10 k?
1.3 Oscilloscope
With its many switches and knobs, a modern oscilloscope can easily in-
timidate the faint of heart, yet the scope is an essential tool for electronics
troubleshooting and you must become familiar with it. Accordingly, the
rest of this laboratory session will be devoted to becoming acquainted with
such an instrument and seeing some of the things it can do.
The oscilloscope we use is the Tektronix TDS210 (illustrated in Fig. 1.4).
If you don’t have a TDS210, any dual-trace oscilloscope, analog or digital,
can be used for these labs as long as the bandwidth is high enough – ideally,
30 MHz or higher. While the description below may not correspond exactly
to your scope, with careful study of its manual you should be able to figure
out how to use your scope to carry out these exercises.
The TDS210 is not entirely as it appears. In the past you may have
used an oscilloscope that displayed voltage as a function of time on a
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9 1 Equipment familiarization
60 MHz
TDS 210 1 GS/s
Trigger Info MENU
Menu
Options
Menu TRIGGER LEVEL
Options
Menu TRIGGER MENU
Volts per Options
Division Menu
Options
Menu
Options
Fig. 1.4. Illustration of the Tektronix TDS210 digital oscilloscope. The basic features to
be used in this tutorial are marked. Note and remember the location of the ‘autoset’
button – when all else fails, try autoset!
cathode-ray tube (CRT). While the TDS210 can perform a similar function,
it does not contain a CRT (part of the reason it is so light and compact).
Until the 1990s, most oscilloscopes were purely ‘analog’ devices: an
input voltage passed through an amplifier and was applied to the deflection
plates of a CRT to control the position of the electron beam. The position
of the beam was thus a direct analog of the input voltage. In the past few
years, analog scopes have been largely superseded by digital devices such
as the TDS210 (although low-end analog scopes are still in common use
for TV repair, etc.).
A digital scope operates on the same principle as a digital music recorder.
In a digital scope, the input signal is sampled, digitized, and stored in
memory. The digitized signal can then be displayed on a computer screen.
One of your first objectives will be to set up the scope to do some of
the things for which you may already have used simpler scopes. After
that, you can learn about multiple traces and triggering. In order to have
something to look at on the scope, you can use your breadboard’s built-in
function generator, a device capable of producing square waves, sinusoidal
waves, and triangular waves of adjustable amplitude and frequency. But
start by using the built-in ‘calibrator’ signal provided by the scope on a
metal contact labeled ‘probe comp’ (or something similar), often located
near the lower right-hand corner of the display screen.
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10 Hands-on electronics
Note that a leg folds down from the bottom of the scope near the front
face. This adjusts the viewing angle for greater comfort when you are seated
at a workbench, so we recommend that you use it.
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11 1 Equipment familiarization
Warning: A short circuit will occur if the probe’s reference lead is connected anywhere other
than ground.
1.3.2 Display
Your oscilloscope user’s manual will explain the information displayed
on the scope’s screen. Record the various settings: timebase calibration,
vertical scale factors, etc.
Explain briefly the various pieces of information displayed around the
edges of the screen.
The following exercises will give you practice in understanding the vari-
ous settings. For each, you should study the description in your oscilloscope
user’s manual. The description below is specific to the TDS210; if you have
a different model, your manual will explain the corresponding settings for
your scope.
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12 Hands-on electronics
channel on or off; they also select which control settings are programmed
by the push-buttons just to the right of the screen.
Display a waveform from the calibrator on channel 1. What happens
when you adjust the position knob? The volts/div knob?
1.3.5 Triggering
Triggering is probably the most complicated function performed by the
scope. To create a stable image of a repetitive waveform, the scope must
‘trigger’ its display at a particular voltage, known as the trigger ‘threshold’.
The display is synchronized whenever the input signal crosses that volt-
age, so that many images of the signal occurring one after another can be
superimposed in the same place on the screen. The level knob sets the
threshold voltage for triggering.
You can select whether triggering occurs when the threshold voltage is
crossed from below (‘rising-edge’ triggering) or from above (‘falling-edge’
triggering) using the trigger menu (or, for some scope models, using trigger
control knobs and switches). You can also select the signal source for the
triggering circuitry to be channel 1, channel 2, an external trigger signal,
or the 120 V AC power line, and control various other triggering features
as well.
Since setting up the trigger can be tricky, the TDS210 provides an
automatic setup feature (via the autoset button) which can lock in on
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13 1 Equipment familiarization
almost any repetitive signal presented at the input and adjust the voltage
sensitivity and offset, the time sensitivity, and the triggering to produce a
stable display.
After getting a stable display of the calibrator signal, adjust the level
knob in each direction until the scope just barely stops triggering. What
is the range of trigger level that gives stable triggering on the calibra-
tor signal? How does it compare with the amplitude of the calibrator
waveform? Does this make sense? Explain.
Next connect the scope probe to the breadboard’s function generator –
you can do this by inserting a wire into the appropriate breadboard socket
and grabbing the other end of the wire with the scope probe’s grabber. The
function generator’s amplitude and frequency are adjusted by means of
sliders and slide switches.
Look at each of the waveforms available from the function generator:
square, sine, and triangle. Try out the frequency and voltage controls
and explain how they work. Adjust the function generator’s frequency
to about 1 kHz.
Display both scope channels, with one channel looking at the output of
the function generator and the other looking at the scope’s calibrator
signal. Make sure the vertical sensitivity and offset are adjusted for each
channel so that the signal trace is visible.
What do you see on the screen if you trigger on channel 1? On channel 2?
What do you see if neither channel causes triggering (for example, if the
trigger threshold is set too high or too low)?
How does this depend on whether you select ‘normal’ or ‘auto’ trigger
mode? Why? (If you find this confusing, be sure to ask for help, or study
the oscilloscope manual more carefully.)
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14 Hands-on electronics
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2 RC circuits
Capacitors are not useful in DC circuits since they contain insulating gaps,
which are open circuits for DC. However, for voltages that change with time,
a simple series circuit with a capacitor and a resistor can output the time
derivative or integral of an input signal, or can filter out low-frequency or
high-frequency components of a signal. But before plunging into the world
of time-varying voltage and current (i.e., alternating-current circuits), we
explore the voltage-divider idea using direct current, since it gives us a
simple way to understand circuits containing more than one component in
series. Then we apply it to the analysis of RC circuits as filters. Note that
the series RC circuit can be analyzed in two different ways:
r via the exponential charging/discharging equation, and
r as an AC voltage divider.
Both approaches are valid – in fact, they are mathematically equivalent –
but the first is more useful when using capacitors as integrators or differ-
entiators, whereas the second is more useful when analyzing low-pass and
high-pass filters. The first is referred to as the time-domain approach, since
it considers the voltage across the capacitor as a function of time, and the
second as the frequency-domain approach, since it focuses on the filter
attenuation vs. frequency.
Apparatus required
Oscilloscope, digital multimeter, breadboard, 68 and 10 k resistors,
0.01 F ceramic capacitor.
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16 Hands-on electronics
Vacuum 1.0
Air (at STP) 1.00054
Paper 3.5
Mica 5.4
Ceramic ≈100
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17 2 RC circuits
Q = C V, (2.1)
T = 1/ f,
Vp–p = 2A.
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18 Hands-on electronics
V0
V p--p
V0
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19 2 RC circuits
where I0 is the amplitude of the current sine wave and X C ≡ 1/ωC is the
capacitive reactance of the capacitor. The reactance is thus the effective
resistance of the capacitor. Note that it is frequency-dependent, in keeping
with our intuition that for DC a capacitor should look like an open circuit
(infinite resistance), while at high frequency it should approach a short
circuit (zero resistance).
For completeness, we mention here the inductive reactance X L ≡ ωL, where L is the
inductance of an inductor. Inductors are coils of wire and satisfy the equation
dI
V =L . (2.10)
dt
Just as capacitors often employ a dielectric, inductors are often wound on a ferrite core
to increase their inductance. Note that the inductor equation relates the voltage across
an inductor to the derivative of the current through it, while the capacitor equation
(Eq. 2.1) relates the voltage across a capacitor to the integral of the current. Thus,
where the current through a capacitor leads the voltage across it, the current through
an inductor lags the voltage across it by 90◦ . With respect to its function in a circuit,
an inductor can thus be thought of as the opposite of a capacitor. Whereas capacitors are
relatively small, light, cheap, and have negligible resistance, inductors tend to be large,
heavy, expensive, and have appreciable resistance. Nevertheless, they find important
use in filtering applications, e.g. bandpass filters, crossover circuits for hi-fi speakers,
radio-frequency circuits, and so forth. In the interests of time we omit inductor exercises
from our course, but if you understand capacitors you will have very little difficulty in
applying inductors.
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20 Hands-on electronics
Some small capacitors are labeled like resistors, either with a color code
or with numbers that mean the same thing. The first digit of this capacitance
code is the tens, the second is the ones, the third is the power of 10, and
the units are picofarads. This is sometimes ambiguous – for example, a
capacitor that says ‘470’ could be 470 pF or 47 × 100 = 47 pF! Usually
the clue is the presence of a letter, following the capacitance code, that
indicates the tolerance – J for ±5%, K for ±10%, M for ±20%, etc. – so
that ‘470 K’ means 47 pF ± 10%, whereas just 470 means 470 pF! Note
that there is no ambiguity if it says 471 – since normal capacitors are not
manufactured with enough precision to warrant a third significant digit,
the ‘1’ must be the power of ten. When in doubt, you can always check it
out by putting it in an RC circuit with a known R value and measuring the
time constant (see below), or by plugging it into a capacitance meter, if you
have one.
1 volt = 1 joule/coulomb.
The potential energy (with respect to some reference point) is equal to the
voltage multiplied by the charge.
Current refers to the motion of charges. The current through a given
surface (e.g. the cross-section of a wire) is defined as the net charge passing
through that surface per unit time. The unit for current is the ampere:
1 ampere = 1 coulomb/second.
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21 2 RC circuits
moving through the element per unit time, then their product equals the
power released within the device! The power dissipated within any device is
given by
P = IV. (2.11)
P = IV = I 2 R = V 2 /R. (2.12)
The resistor in the following exercise will become very hot and may even
catch fire (briefly). Keep the body of the resistor well above the breadboard.
Do not touch the resistor with your fingers. Remove the destroyed resistor
using pliers or a similar tool.
Be sure that the power is turned off, and construct the circuit shown in
Fig. 2.2 using a 14 watt carbon-film resistor.
Turn on the power and observe the effect on the resistor. Be sure to
turn off the power as soon as the resistor begins to smoke. Record your
observations and comments.
+
68 Ω
15 V
1/4 watt
Resistor
Fig. 2.2. This circuit can be used to demonstrate destructive power loading. Note that the
resistor will heat up rapidly.
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22 Hands-on electronics
Calculate the power that was dissipated by the resistor before it burned
out. What is the minimum resistor value that can be safely used in this
circuit? (Assume that only 14 watt resistors are available.)
Calculate the current that flowed through the resistor (before it burned
out).
Note that even though the voltage was low and the current was well
under 1 A, damage was nevertheless done! Because your body’s resistance
is large, low voltages can’t give you a shock, but in the wrong circumstances
they can still cause trouble. The key to safe work in electronics is always
to estimate power dissipations in components before turning on the power,
and to make sure you are not exceeding the ratings.
Warning: You can easily burn out the pot in this exercise if you are not careful!
R1
V V V
R1
R2 ~ V ~ V
potentiometer
R2
Fig. 2.3. Three schematics representing a resistive voltage divider. In all cases you can
show using Ohm’s law that Vout = Vin R2 /(R1 + R2 ). Note that the far right
representation is implemented using a potentiometer. In this case, the output voltage is
variable and ranges between ground and Vin (depending on the position of the slider).
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23 2 RC circuits
the pot – briefly explain why this is true. (Hint: how much power can be
dissipated in the pot in such a situation?)
3. If you connect the multimeter on a current or resistance setting between
the slider and some other point in the circuit while the circuit is powered,
you can easily burn out the pot, since on these settings a meter can act
as a low impedance (short circuit).
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24 Hands-on electronics
R
Vin V
R
C ~
V
C
Fig. 2.4. The voltage-divider concept works perfectly well for RC circuits. This circuit is
also known as a low-pass filter, or as a voltage integrator.
2.4 RC circuit
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25 2 RC circuits
Now switch from a 50 kHz square wave to a 50 kHz sine wave. Since
Eq. 2.18 should still apply, the output waveform should be the integral of
a sine wave, i.e. a cosine wave.
What does this imply about the phase shift between input and output?
Measure the phase shift: 360◦ multiplied by the time t between the zero
crossing of the input signal and the zero crossing of the output signal,
divided by the period, or
t
φ = 360◦ . (2.19)
T
(The cursors are useful here.)
Is the measured phase shift consistent with your prediction? Does the
voltage across the capacitor lag or lead the current through it? Explain.
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26 Hands-on electronics
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27 2 RC circuits
Now interchange the capacitor and resistor so that the input signal is applied
at the capacitor (see Fig. 2.5). Drive the circuit with a 50 Hz square wave.
What waveform do you see at the output? What are the input and output
amplitudes?
You can think of the shape of the output in terms of the exponential RC
charging/discharging curve, with f
1/RC, or you can think of it as an
approximation to the derivative of the input signal. Mathematically, the
derivative of an ideal square wave would be infinite at the voltage steps and
zero in between, but of course an electrical signal can never be infinite! In
this circuit the voltage spikes are limited in size to twice the input amplitude.
Using Eq. 2.16,
Vout = IR (2.24)
dQ
=R (2.25)
dt
d(Vin − Vout )
= RC (2.26)
dt
dVin
≈ RC , (2.27)
dt
where the approximation is again valid when Vout
Vin . So, indeed, the
circuit puts out an approximation to the time derivative of the input signal.
You can see why the approximation of Eq. 2.27 breaks down in the case
of a square wave, since at the rising and falling edges of the square wave
Vout > Vin .
What does Eq. 2.27 imply if the input is a triangle wave? Try it out and
compare quantitatively with what you expect.
What does Eq. 2.27 imply if the input is a sine wave? Try it out and com-
pare quantitatively with what you expect. Sketch the output waveform.
V V C
C V
R
~
R
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28 Hands-on electronics
If you are surprised at all the wiggles on the output signal, you can
verify that they are real (as opposed to noise) using the signal-averaging
feature of the scope’s acquire menu. You’ve discovered a poorly kept
secret of function-generator design! The sine waveform is rather difficult
to generate, and most function generators actually use an approximation to
it that is piecewise-linear around the peaks and valleys. The derivative of a
piecewise-linear function is a series of steps and plateaus.
What attenuation and phase shift do you observe with a 50 Hz sine wave
as input?
What about with a 50 kHz sine wave?
Why do these phase shifts make sense?
Should the breakpoint frequency be any different in this configuration
than in the low-pass filter? Check it and make sure. Compare your mea-
surements with
R
Vout = Vin (2.28)
Z
R
= Vin (2.29)
R + XC
2 2
ω RC
= Vin . (2.30)
1 + (ω RC)2
Show that well below the breakpoint frequency, Eq. 2.30 predicts that
the output amplitude should increase linearly with frequency. Take a few
measurements to demonstrate that this prediction is correct.
For reference, here once again are the key equations describing high-pass
and low-pass RC-filter operation in the frequency domain.
High-pass:
Vout ω RC
= , (2.31)
Vin 1 + (ω RC)2
1
φ = arctan . (2.32)
ω RC
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29 2 RC circuits
Low-pass:
Vout 1
= , (2.33)
Vin 1 + (ω RC)2
φ = arctan ω RC. (2.34)
Fig. 2.6. Right triangles depicting the relationships among input voltages (always
represented by the hypoteneuse of the triangle) and capacitor and resistor voltages for (a)
high-pass and (b) low-pass RC filters. In each case, the center diagram shows the isosceles
triangle representing the case f = f 0 ; the triangles on the left are for a frequency well
below f 0 ; and those on the right for a frequency well above f 0 .
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30 Hands-on electronics
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3 Diodes
Apparatus required
Breadboard, oscilloscope, one or two multimeters, one 1N914 (or similar)
silicon signal diode, one 1N4001 (or similar) 1 A silicon rectifier diode, one
100 and one 10 k 14 W resistor, one 1 k 2 W resistor, power transformer
with 12.6 V r.m.s. output on each side of the center tap, one diode bridge
element, one 100 F electrolytic capacitor, and one 1000 F electrolytic
capacitor.
Current will flow through a material provided that there are charge carriers
free to move and an electric field to move them. Conductors (such as
copper) have lots of charge carriers (electrons) ready to move in response
to the slightest electric field. Insulators (such as diamond) possess very
few free charge carriers – all the electrons are tightly bound to the crystal
lattice, so that, even in the presence of a strong electric field, no current
31
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32 Hands-on electronics
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33 3 Diodes
Silicon, Germanium
Boron, Aluminum
Arsenic, Phosphorus
P-type N-type
Fig. 3.1. Representation of a junction between P-type and N-type semiconductor material.
Free electrons from the N-region will migrate into the P-region, combining with holes.
Free Electron
Electric Field Hole Electric Field
_ +
_
+
_ +
_ +
_ +
I _ + Is
P-type N-type P-type _ + N-type
Depletion Region
I + V R Is V + R
(see Fig. 3.2). New holes are created within the P-material as electrons
jump from the semiconductor to the metal contacts. At the junction, the
holes from the P-type material meet electrons from the N-type material and
combine. A PN junction thus allows current to flow easily in one direction
but blocks current flow in the reverse direction.
For such a diode the current I flowing through the device is given
approximately by
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34 Hands-on electronics
Forward
Current 8
(mA) Ge Si
Fig. 3.3. Typical current–voltage characteristics for germanium and silicon diodes; note
that the current scales in the forward and reverse directions differ by a factor of 10 000,
and that the voltage scale changes at large reverse voltage. If a large enough reverse
voltage is applied, the junction breaks down and allows a large reverse current to flow (the
‘Zener effect’).
When the P-type material is at a more positive voltage than the N-type
material, the diode is said to be ‘forward-biased’; this corresponds to V > 0
in Fig. 3.3. When the P-type material is more negative than the N-type
material, the diode is said to be ‘reverse-biased’; this corresponds to V < 0
in Fig. 3.3.
I ≈ −Is . (3.3)
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35 3 Diodes
Fig. 3.4. Representation of physical diodes along with the symbols used in circuit
diagrams.
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36 Hands-on electronics
Table 3.1. A diverse selection of diodes is commercially available, of which a tiny sampling is
given here.
Diodes are commonly rated by their switching speed, maximum power dissipation, maxi-
mum forward current, maximum forward voltage at a specified forward current, and reverse-
breakdown voltage. The junction capacitance is sometimes listed as well.
switch from forward to reverse bias or vice versa). A few examples are given
in Table 3.1.
3.3 Rectification
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37 3 Diodes
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38 Hands-on electronics
e
ln I ≈ ln Is + V. (3.9)
kT
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39 3 Diodes
1.2 mA
A mA COM VΩ
0.64 V
100 Ω
1 k pot
+
+5 V
A mA COM VΩ
(a)
Ammeter DMM or
Oscilloscope
100 Ω Rin
1 k pot mA
+ fuse
+5 V
Zin V
Ground
(Common) (b)
Fig. 3.5. (a) Measuring the forward characteristic of a diode. (b) When used to measure
current, the DMM is equivalent to an ideal ammeter in series with a small input
impedance. Most ammeters will also have a series fuse to protect the meter. When
measuring voltage, the DMM or oscilloscope looks like an ideal voltmeter in parallel
with a large input impedance.
If the reverse current seems to be much bigger than you expect, consider
that you have a voltage-measuring device (a scope or voltmeter) in parallel
with the diode (Fig. 3.5(b)).
Disconnect the scope or meter – now how much current do you observe?
Reconnect it and disconnect the diode – how much current flows with
the scope or meter alone? What do you infer to be the input resistance of
the scope or meter? Explain by applying Ohm’s law to relate the voltage
being measured to the current you observe.
Keep this experience in mind – it is often necessary to consider the effect
of your measuring device on the circuit being studied. Can you see why
an ideal voltmeter would have infinite resistance, while an ideal ammeter
would have zero resistance?
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40 Hands-on electronics
and the peak-to-peak voltage is, of course, twice this, or Vp−p = 340 V,
as you can easily verify from the definition of the root-mean-square by
integrating over the sine wave.)
Within most electronic equipment using the AC line, there is a power
transformer that steps down the 120 V AC to a more convenient voltage,
a rectifier that converts the alternating voltage from the transformer to a
DC voltage, and a regulator that maintains the output voltage at the desired
level.
Caution: In using a power transformer, bear in mind that an especially large transient current
sometimes flows when the line cord is first plugged in.
You will probably blow fewer fuses if you leave the power transformer
plugged in at all times. Attach banana-plug leads to the transformer’s sec-
ondary only after you are sure your circuit will not damage any of the
equipment. Do not permit powered lines to dangle loosely; when reconfig-
uring your circuit, it is safest to disconnect the leads at the transformer, not
at the breadboard.
Set up the circuit shown in Fig. 3.6(a) using a 10 k resistor as the load,
RL . Observe the sinusoidal voltage waveform across RL . Measure the
amplitude V0 and the r.m.s. voltage. Check the relation
√
2Vrms = V0 . (3.11)
You will probably find Vrms > 25 V. Since the windings of the transformer
have some ohmic resistance, the transformer’s output voltage depends on
1 In North America, the supply voltage from a standard wall socket is 120 V, and the supply frequency
is 60 Hz; the discussion is equally valid for other values, which may be substituted according to
your local supply voltage and frequency.
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41 3 Diodes
Transformer
fuse
120 Center RL
(a) VAC
Vout
Tap
V0
Vrms
(b) Vp--p
V0
Fig. 3.6. (a) Power transformer supplies Vout ≈ 25 V r.m.s.; (b) waveform produced by
the circuit in (a).
the current drawn, and its 25.2 V r.m.s. nominal output voltage is for sub-
stantially higher current than is drawn by the 10 k load.
Add a 1N4001 diode to give the half-wave rectifier of Fig. 3.7(a) with
RL = 10 k.
Observe and record the voltage waveform. Measure the amplitude V0
using the oscilloscope (due to the rectification it is now equal to the
peak-to-peak voltage).
Compare the amplitude of the half-rectified waveform with the amplitude
of the unrectified waveform measured above. By how much has the
amplitude decreased? Is this the amount you expect? Explain.
Measure the average voltage Vav across the load with a DC voltmeter.
Check that for a half-wave rectifier
V0
Vav = . (3.12)
π
Add a filter capacitor in parallel with the load as shown in Fig. 3.8(a).
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42 Hands-on electronics
Transformer
Rectifier Diode
fuse
120 RL
(a) VAC
Vout
V0 Vp--p
(b) Vav
Fig. 3.7. (a) Power transformer with half-wave rectification; (b) waveform produced by
circuit shown in (a).
Transformer
Rectifier Diode
fuse
+ 100 µF RL
(a) 120 Vout
VAC
Ripple Voltage
(b)
1 s
60
Ripple Voltage
(c)
1 s
60
Fig. 3.8. (a) Half-wave rectifier with filter capacitor; (b) waveform produced by circuit
shown in (a); (c) simple approximation to waveform produced by circuit shown in (a).
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43 3 Diodes
Diode Bridge
~ _
~ +
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44 Hands-on electronics
Transformer
Diode Bridge
+
fuse
120 RL
~ ~ Vout
VAC
Caution: A defective bridge element can blow the power transformer fuse -- check it be-
fore placing it in service. It should show essentially infinite resistance between the terminals
marked ‘∼’. When using an ohmmeter to check the resistance, remember to measure it for
both orientations of the terminals -- since you are dealing with diodes, the resistance could
be different in each direction.
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45 3 Diodes
Transformer
Bridge Rectifier
+
fuse
+ 1000 µF RL
(a) 120 Vout
VAC ~ ~
Ripple Voltage
(b)
1 s
120
Fig. 3.11. (a) Full-wave rectification with filter capacitor; (b) waveform produced by
circuit shown in (a).
Input and output impedance are key ideas that are used all the time in
analyzing circuits. You’ve already encountered the input impedance of the
scope or voltmeter in section 3.5.
A good way to think about the effect of an instrument on the circuit
to which it is connected is via the instrument’s Thévenin equivalent. The
Thévenin equivalent of the multimeter (when set to measure voltage) is a
large resistor in parallel with an ideal voltmeter (Fig. 3.5). In practice, an
input also has some small capacitance and inductance and hence is more
completely characterized by its impedance vs. frequency, which takes into
account both the resistance and the capacitive and inductive reactances.
Outputs can also be characterized by their impedance (see Fig. 3.12).
You’ve already taken data that determine the output impedance of your
filtered full-wave rectifier circuit.
From
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46 Hands-on electronics
Output
Impedance
+ Zout
Ideal
Voltage V0 RL Vout
Source I
and your data on Vout vs. RL , compute the circuit’s output impedance,
Z out , in ohms.
As another example, determine the output impedance of your bread-
board’s function generator, by measuring its sine-wave output amplitude,
first with no load, and then with a load resistance of 1 k to ground.
If the output impedance has negligible frequency dependence, it can be
approximated as a pure resistance, in which case the function generator’s
Thévenin-equivalent circuit consists of an ideal AC voltage source (one
having zero internal resistance) in series with a single resistor.
Check the function generator’s Z out both at low and high frequencies
(say 50 Hz and 50 kHz) – do you observe any appreciable frequency
dependence?
Sketch schematic diagrams (with component values labeled) of the
Thévenin-equivalent circuits of your voltmeter, full-wave-rectified power
supply, and function generator.
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4 Bipolar transistors
Invented in 1947, transistors (and integrated circuits made from them) have
been the basis for the explosive proliferation of electronic devices that
revolutionized so much of life in the latter half of the twentieth century.
Although discrete (i.e. individually packaged) transistors are now used
mainly in special situations (e.g. where high power or speed is required),
since transistors form the basis of a large class of integrated circuits, an
understanding of how they work remains valuable. This will be the subject
of the next few chapters. This chapter will introduce you to some basic
bipolar-junction-transistor circuits.
Apparatus required
Breadboard, oscilloscope, two multimeters, 2N3904 and 2N3906 transis-
tors, red light-emitting diode (LED), 1N914 (or similar) silicon signal
diode, two 330 , two 10 k, and one each of 100 , 1 k, 3.3 k, 22 k,
and 100 k 14 W resistors, 1 F capacitor.
Why and how transistors work is a bit subtle and can easily confuse the
beginning student, but it is something you must master. Study the following
description carefully, and compare it with the descriptions in other books.
You may also want to re-read both our description and others after you’ve
had some experience building and analyzing transistor circuits. (If you want
more of the background detail on semiconductor physics, good places to
look are Simpson’s Introductory Electronics for Scientists and Engineers,
or any textbook on modern physics.)
A bipolar junction transistor consists of two PN junctions sandwiched
very close together within a single crystal of semiconductor (Fig. 4.1(a)).
47
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48 Hands-on electronics
(a) E N P N C E P N P C
B B
E C E C
RE B RC RE B RC
(b)
Fig. 4.1. (a) Construction and (b) circuit symbols and biasing examples for NPN and PNP
junction transistors.
The region common to the two junctions, called the base, may be of either
N-type or P-type material. This thin region is surrounded by material of the
opposite type, in regions known as the emitter and collector. Wire leads
are attached to the three regions.
The circuit symbols for NPN and PNP junction transistors are shown in
Fig. 4.1(b). Note that, in the circuit symbol, the arrow on the emitter lead
points in the direction of positive current flow. You can tell whether a tran-
sistor in a schematic diagram is PNP or NPN by the direction of the arrow.
The simplest way to think of transistor action is as current amplifica-
tion: a small current flowing into the base controls a large current flowing
into the collector. Both the base and collector currents flow out from the
emitter. (This description assumes an NPN transistor. For PNP, the current
directions are opposite: a small current flowing out from the base controls
a large current flowing out from the collector, with both currents flowing in
through the emitter.) The ratio of collector current to base current is called
β (or hfe ) and is typically in the range 20 to 300.
More precisely, however, a transistor is a voltage-controlled current
source: small changes in the base voltage cause large changes in collec-
tor current. Such a device, in which an input voltage controls an output
current, is called a transconductance amplifier. The transconductance (gm )
for a given device is defined as the change in output current per change in
control voltage and has units of (ohm)−1 (otherwise known as a mho).
To understand the operation of an NPN transistor in more detail, it is con-
venient to consider the flow of electrons, since electrons are the ‘majority
carriers’ in the N-type regions. Note that the flow of electrons is of course
opposite in direction to the flow of conventional positive current. As above,
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49 4 Bipolar transistors
Free Electron
Electric Field Depletion
Electric Field Hole
Region
N-type P-type N-type
Collector Emitter
IC IE
(lightly doped) (heavily doped)
Base
IB
VCB VBE
+ +
Fig. 4.2. Schematic representation of how an NPN transistor operates. External bias
voltages create an electric field, which pulls electrons (emitted into the base by the
emitter) across the base and into the collector. This results (seemingly paradoxically) in a
large flow of electrons through the (reverse-biased) base–collector junction, a current that
is easily controlled by small changes in base voltage. The large hollow arrow represents
the flow of electrons from the emitter to the collector.
the following description applies also to PNP transistors, but with the
current carriers and directions reversed.
In normal transistor operation, the base–emitter diode is forward-biased
and the base–collector diode is reverse-biased (Fig. 4.2). The depletion
region between the base and the collector extends essentially throughout
the thin base region (creating an electric field as shown in Fig. 4.2) and
blocks the flow of majority current carriers – holes flowing from base to
collector and electrons flowing through the collector to the base. At the
same time, the emitter lead injects electrons into the emitter, which flow
across the (forward-biased) base–emitter junction. While (as just stated)
the base–collector bias inhibits the flow of holes from the base into the
collector, the electrons with which the base is now filled are drawn by the
electric field through the junction and into the collector. They do this even
though the base–collector junction is reverse-biased. This is the essence
of transistor action. Essentially, the construction of the transistor results
in large numbers of the ‘wrong’ current carrier entering the base and then
continuing ‘downhill’ into the collector.
Typically, ≈99% of electrons entering the base from the emitter continue
into the collector, and only ≈1% emerge as base current. The base current
results from the small fraction of electrons entering the base that combine
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50 Hands-on electronics
Table 4.1. A diverse selection of bipolar transistors is commercially available, of which a small
sampling is given here.
Transistors are commonly rated by their speed (e.g. toggle frequency f T ), voltage capability,
maximum
. current, typical hfe , and power capability
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51 4 Bipolar transistors
For an NPN transistor in its normal operating mode, all the above potential
differences are positive.
r IC = current flowing into collector,
r IE = current flowing out of emitter,
r IB = current flowing into base,
r associated identity (from Kirchhoff’s current law):
IE = IC + IB . (4.2)
For an NPN transistor in its normal operating mode, all the above currents
are positive.
The relationships between these voltages and currents are usually ex-
pressed in terms of characteristic curves. Fig. 4.3 displays sets of represen-
tative curves for an arbitrary bipolar transistor. Study their shapes carefully
and refer to them as you perform the following exercises.
Breakdown
Saturation Linear Linear Breakdown
IC Region Region IC Region
40 IB = 350 µA (mA)
40
(mA)
IE = 35 mA
30 IB = 250 µA 30
IE = 25 mA
20 IB = 150 µA 20 IE = 15 mA
IB = 90 µA IE = 9 mA
10 10
IB = 30 µA IE = 3 mA
0
5 10 15 20 VCE 5 10 15 20 VCB
(Volts) 0 (Volts)
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52 Hands-on electronics
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53 4 Bipolar transistors
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54 Hands-on electronics
RE that is in series with the emitter, i.e. the apparent resistance seen at
the base is β(re + RE ) = rBE + β RE , which is typically tens to hundreds
of kilohms.
We saw in the case of the silicon diode that a crude approximation in
which the forward diode drop is taken to be approximately constant at
600 mV is adequate for most applications. As mentioned above, in many
practical transistor applications (including the circuits you will build in
this chapter) a simple approximation is sufficient: treat the base–emitter
voltage difference VBE as constant at about 700 mV and re as constant at
a few ohms. This reflects the fact that the order of magnitude for IC in a
typical small-signal-transistor circuit is several milliamperes. Often re is
much smaller than RE and can be neglected.
4.2 Experiments
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55 4 Bipolar transistors
(a) (b)
E C E C 2N 2N
4 TO-92 6
390 390
case
B B
NPN PNP
C C
B B
E E
Fig. 4.4. Transistor as back-to-back diodes; TO-92 pinout.
−15 V
Fig. 4.5. (a) Emitter follower. (b) Emitter-follower model used for input-impedance
measurements. The value for Z in is found using the voltage-divider equation.
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56 Hands-on electronics
Emitter
330 Follower
Vin 2N3904
Zout
Vout Vout
1.0 µF 330 330
3.3 k
RL ~ RL
−15 V
Fig. 4.6. (a) Emitter follower with optional load circuit for measurement of Z out .
(b) Emitter follower modeled as an ideal voltage source in series with an output
impedance.
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57 4 Bipolar transistors
Explain what would happen to the DC bias voltage of the emitter if the
capacitor were omitted.
When using the blocking capacitor, be sure to use a small signal am-
plitude (about 1 V) so as not to apply too large a reverse voltage to the
capacitor, and use a high enough frequency so that the capacitor causes
negligible attenuation – about 10 kHz. Note that polarized capacitors can
be safely reverse-voltaged by a volt or two r.m.s., but typically not by more
than 15% of their voltage rating.
How do your measured impedances compare with what you expect?
The input impedance should equal β times the emitter resistor, and the
output impedance should equal the dynamic resistance of the emitter (as
described in section 4.1.3).
VCC = +15 V
R1 = 100 k
R2 = 10 k
R1 RC
RC = 10 k
1 µF
Vout RE = 1 k
Vin 2N3904
R2 RE
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58 Hands-on electronics
2. Then apply Ohm’s law to the emitter resistor to determine the emitter
current, taking into account the transistor’s expected VBE drop: IE =
(VB − VBE )/RE .
3. Then apply Ohm’s law to the collector resistor to determine the quiescent
collector voltage: Vout = VCC − IC RC . You know the collector current
well enough since it equals the emitter current to a good approximation.
Compared to your measurements, by what percentages are your voltage
predictions wrong? Is this as expected given the resistor tolerances and
uncertainties in β and VBE ?
Using the measured voltages, predict the collector, emitter, and base
currents.
Calculate the change in quiescent base voltage if you take the base current
into account. Assume that the base current flows through the Thévenin
equivalent of the base-bias voltage divider (i.e., the input impedance of
the base is in parallel with R2 ).
You can understand how the circuit amplifies by applying Ohm’s law
to the emitter and collector resistors. Since the emitter follows the base, a
voltage change at the base causes a larger voltage change at the collector:
Vout = −IC · RC = −IE · RC
IE = VE /RE = VB /RE = Vin /RE , (4.10)
Therefore,
Measure the voltage gain (Vout /Vin ) and compare with what you
expect.
So as not to exceed the available output-voltage range of the circuit, be
careful to keep the input amplitude less than about 700 mV. (You can
check what happens to the output waveform as you exceed this amplitude,
but be sure not to exceed the 1 V reverse-voltage capability of the input
capacitor.) Also, use a high enough frequency that the input high-pass filter
does not attenuate the signal too much – it is a little tricky to estimate the
breakpoint frequency of the filter because three resistances in parallel need
to be taken into account: those of the base-bias voltage divider as well as
the input impedance of the base.
Is the amplifier inverting?
Look at the signal at the emitter and explain what you see.
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59 4 Bipolar transistors
+15
mA
330
+5 2N3904
1k
Try a triangle-wave input – can you see any distortion in the output
waveform? There should be some due to the variation of re with col-
lector current, but the effect is small since re is in series with the 1 k
emitter resistor. How big should the effect be according to the Ebers–
Moll model?
In the grounded-emitter amplifier, i.e., for RE = 0, the voltage gain is
greater, but so is the distortion, since re alone appears between the emitter
and ground.
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60 Hands-on electronics
+5
Red
LED
330
10 k
ground
2N3904
or +5
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61 4 Bipolar transistors
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62 Hands-on electronics
+15
10 k Q1
Q2 Q1 = Q2 = 2N3904
Vin
RB
Vout
3.3 k
RE
−15
Fig. 4.10. Darlington pair.
The input impedance should be so big that you can’t measure any de-
crease in signal amplitude across the 10 k resistor – check this assumption.
What minimum value does this imply for the input impedance? What
input impedance do you expect, and why?
Darlington pairs are available encapsulated in three-lead packages, for
example the 2N6426 with combined β value of about 100 000. The Darling-
ton connection is particularly useful for power transistors, to compensate
for their low β (β ≈ 20 is not uncommon). For example, the TIP110 50 W
power Darlington has a minimum combined β value of 500.
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63 4 Bipolar transistors
+5
2N3904
Vin
2N3906 Speaker
−5
Fig. 4.11. Driving loudspeaker with push–pull buffer.
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64 Hands-on electronics
+15
10 k 10 k
Vout
2N3904
Vin
100
22 k
−15
Fig. 4.12. Common-base amplifier.
Connect a small sine-wave input and determine the voltage gain. Note
that, in contrast to the common-emitter amplifier, the input and output
currents are almost equal, and the amplifier is noninverting.
What do you predict for the input and output impedances? You can
measure the input impedance easily using the 400 output impedance
of the function generator: how much smaller does the function-generator
output become when you connect it to the amplifier input? What input
impedance does this imply for the amplifier? Explain.
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5 Transistors II: FETs
Apparatus required
Breadboard, oscilloscope, multimeter, two 2N5485 JFETs, one 1N4733
Zener diode, two 1 k, one 3.3 k, two 10 k, one 100 k, and one 1 M 14 W re-
sistors, 0.1 F ceramic capacitor, 1.0 F and 100 F electrolytic capacitors.
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66 Hands-on electronics
G G
N-Channel P-Channel
P N
D S D S
N N P P
P N
G G
D S D S
G G
N-Channel P-Channel
JFET JFET
Fig. 5.1. Construction and circuit symbols of JFETs (note that other variants of these
symbols are also used).
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67 5 Transistors II: FETs
VGS
+
Drain Gate Source
(a)
Gate
VGS
VDS +
VGS
+
(b)
Gate
VGS
VDS +
Fig. 5.2. Schematic representation of JFET operation: (a) gate–channel diode slightly
reverse-biased; (b) gate–channel diode highly reverse-biased (VGS ≥ VP so that channel is
pinched off).
ID Saturation Region
(mA)
VGS = 0 V
IDSS
20
Linear
Region
15 VGS = −1 V
10
VGS = −2 V
5
VGS = −3 V
0 5 10 15 20 VDS
(Volts)
practical purposes the drain and source currents are equal (ID = IS ). The
voltage-controlled current-source behavior occurs as long as the drain–
source voltage VDS is sufficiently high. This is called the saturation region
of the FET characteristic (see Fig. 5.3).
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68 Hands-on electronics
For VDS smaller than a volt or two, a JFET behaves like a voltage-
controlled resistor rather than a current source, i.e. the slope of the I –V
characteristic is controlled by the gate–source voltage. This is the linear
region of the FET characteristic, useful for automatic gain control (AGC)
and modulation applications.
Don’t confuse FET saturation with bipolar-transistor saturation – they
are entirely different phenomena! For example, recall that bipolar-transistor
saturation occurs at small VCE , whereas FET saturation occurs at large VDS .
VGS 2
ID = IDSS 1 − , (5.1)
VP
where VP is the pinch-off voltage and IDSS is the saturation drain current
for VGS = 0 (i.e. gate shorted to source). Thus, the transconductance is
√
proportional to ID :
gm = ID /VGS . (5.2)
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69 5 Transistors II: FETs
5.2 Exercises
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70 Hands-on electronics
(a) (b)
0–15 V
85 A
54
2N T
E
JF D
G
−5 to 0 V
G S
S
D
voltage and the other to adjust the drain voltage. Use the scope probes to
measure the drain and gate voltages while using a meter to measure the
drain current.
Using the pot, adjust VGS to be 0.5 V more positive than VP (keep
in mind that VP is negative!). Slowly increase the drain voltage from
zero to 15 V while measuring the drain current. Record and plot your
measurements.
For VDS less than a few volts, the current should increase linearly with
drain voltage. This is the ‘linear region’, in which the JFET acts as a voltage-
controlled variable resistor. As you further increase VDS , the current should
then ‘saturate’ at an approximately constant value.
JFET saturation occurs because the increasing drain voltage creates an
increasing depletion region between the gate and drain. Since VGS > VP ,
the channel will never be pinched off completely, with an equilibrium (of
sorts) created. The size of the depletion region (and thus the resistance of
the channel) increases approximately linearly with drain–source voltage
difference, resulting in approximately constant current.
Repeat your measurement procedure for several VGS values between VP
and zero. Plot the data on a single graph and clearly label each curve,
indicating the linear region, the saturation region, and IDSS .
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71 5 Transistors II: FETs
open
+15 10 k
pot
2N5485
1k
RS
You can compute VGS from ID and the known resistance of RS . You should
see the drain current start to vary substantially as you make the transition
from the saturation region to the linear region.
What is the compliance?
Within the saturation region, how constant is the current?
Calculate the approximate output impedance in the saturation region
(see Eq. 3.13).
Compare the performance of this current source with that of the bare
JFET and of the bipolar current source that you built in section 4.2.4.
Even though VGS is not exactly constant as VDS is varied, this circuit
actually works better (has larger output impedance) than one in which VGS
is held constant. This is because negative feedback is at work. For example,
suppose ID increases; then, so does the drop across RS , increasing the mag-
nitude of VGS and moving the FET closer to pinch-off, thus decreasing ID .
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72 Hands-on electronics
+15
0.1 µF
2N5485
Vin Vout
1 MΩ 1k
RS
Thus, Vout follows the source. When Vin decreases, the channel closes and
Vout drops.
What is the DC offset at the output?
Measure the voltage gain.
You should see that the voltage gain is less than unity, since the dynamic
resistance of the source (= 1/gm ) forms a voltage divider with RS . (This
effect was also present for the bipolar transistor, but was much smaller
due to the bipolar transistor’s larger value of gm .) Draw a diagram of this
voltage divider.
From your observed attenuation, derive a value for gm and compare with
that of a bipolar transistor at the same current.
You can improve the source follower by providing it with much higher
load resistance. Since an ideal current source would have infinite resistance,
a current-source load is often used; it can be constructed by adding another
FET, as in the clever circuit of Fig. 5.7. (Since we are using N-channel
JFETs, it is actually a current sink.) Try it out.
Measure the voltage gain and the DC offset from input to output.
Note that if the two 2N5485s approximately match in their character-
istics, not only is the voltage gain unity, but the DC offset is small: the
constant current due to Q 2 creates a constant voltage drop across R1 . Fur-
thermore, since the gate of Q 2 is at the same voltage as the bottom of R2 ,
to the extent that the two FETs (and the two resistors) match, this should
also be true for Q 1 and R1 . Thus the output voltage must follow the source
voltage of Q 1 .
Explain the operation of this circuit in your own words.
What are ID , VGS1 , and VGS2 ?
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73 5 Transistors II: FETs
+15
0.1 µF
Q1 2N5485
Vin
1 MΩ R1 1k
Vout
Q2 2N5485
R2 1k
−15
Fig. 5.7. Source follower with current-source load.
+15
3.3 k RD
Vout
0.1 µF
Vin
+
1 MΩ 1k 1.0 µF
RS
The offset can be much improved by using a matched FET pair, e.g. the
2N3958 dual JFET. Such a circuit is often used in the input stage of an
oscilloscope.
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74 Hands-on electronics
amplifier. Power the amplifier and compare the measured values with
your predictions.
How much power is dissipated by the FET?
What is the input impedance?
Is this an inverting or noninverting amp? Explain why.
The voltage gain (A) is defined as the ratio of the output amplitude to the
input amplitude. If the source voltage remains fixed, then
VG = VGS .
As discussed previously,
gm = ID /VGS ,
and since
VD = ID · RD ,
A = gm · RD .
What is the predicted voltage gain for this amplifier? Using a 1 kHz
small-amplitude sine-wave input, measure the voltage gain and compare
with the expected gain.
The source capacitor is used to ‘fix’ the source voltage even as the drain
current fluctuates due to the AC input. (This trick can also be used to in-
crease the voltage gain of the bipolar-transistor common-emitter amplifier.)
This implies that the gain will be frequency-dependent.
Switch the input to a triangle wave and adjust the frequency widely. Ex-
plain what you see. Replace the source capacitor with a 100 F capacitor.
How does this change things?
Try several different 2N5485s and record the voltage gain and quiescent
drain current and output voltage. How reproducible are the results?
Comment on the design and operation of simple transistor and JFET
circuits. For example, when would you choose a bipolar transistor over
a JFET or vice versa? Feel free to include any general comments you
have on the experience you’ve gained from the last few chapters.
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6 Transistors III: differential amplifier
Apparatus required
Breadboard, oscilloscope, multimeter, three 2N3904 and three 2N3906
transistors, one 5.1 V Zener diode, three 100 , five 10 k, two 22 k one
each of 560 , 2.2 k, and 100 k 14 W resistors.
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76 Hands-on electronics
+15
(a) (b)
10 k RL RL 10 k
R1 10 k
−15
Fig. 6.1. (a) Differential amplifier; (b) function generator with 100-to-1 attenuator.
Since the emitter voltages follow the base voltages, a similar voltage
change occurs between the two emitters. This causes a current I to flow
across the two emitter resistors. Since these are in series with the dynamic
emitter resistances of the two transistors (each of which has an approxi-
mate value re = 1/gm = 25 mV/IC according to the Ebers–Moll model),
we have
I = V /(RE + re ). (6.2)
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77 6 Transistors III: differential amplifier
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78 Hands-on electronics
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79 6 Transistors III: differential amplifier
~ 2 mA
560
2N3904
1N4733
5.1 V 2.2 k
−15
Fig. 6.2. Current sink for differential amplifier.
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80 Hands-on electronics
+15
2N3906
Q4 Q5
Iout
R
Iprog
10 k
10 k pot load
1k
Since the bases are connected together, both transistors have the same value
of VBE , and thus their collector currents will match if they have matching
values of Is and β and are at the same temperature.
In practice, there will always be a slight current mismatch since the
programming current includes the base currents of Q 4 and Q 5 and the
output current does not. Also, since β increases with VCE , and VBE at a
given collector current depends slightly on VCE (called the ‘Early effect’),
the current mismatch will depend on the output voltage.
You can explore this using a variable load, as shown in Fig. 6.3. Monitor
the collector voltage as you adjust the load resistance.
How does the output current vary with collector voltage? What is the
approximate dynamic resistance of the output? Is this a better or a worse
current source than the ones you built in previous chapters?
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81 6 Transistors III: differential amplifier
+15
2N3906
Q4 Q5
Vout
2N3904
Q1 Q2
Vin(+) Vin(−)
offset
adjust
560 Q3 −15 +15
22 k 1 k pot 22 k
1N4733
2.2 k
5.1 V
−15
Fig. 6.4. Differential amplifier with current-mirror load.
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82 Hands-on electronics
+15
VBE
Q4 Q5
VBE
Q6
Vout
Q1 Q2
Vin(+) Vin(−)
offset
adjust
560 Q3
2 mA
−15 +15
22 k 1 k pot 22 k
1N4733
2.2 k
5.1 V
−15
Fig. 6.5. Differential amplifier with Wilson-current-mirror load.
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83 6 Transistors III: differential amplifier
IC op amps have even higher gain than this, of course, as well as higher
input impedance. Higher input impedance can be achieved by using
Darlington transistor pairs in place of the input transistors, or by using
FET inputs instead of bipolar transistors. The gain can be increased fur-
ther by adding a second stage of amplification after the differential pair.
To achieve low output impedance, the output is usually buffered with an
additional transistor stage.
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7 Introduction to operational amplifiers
Apparatus required
Breadboard, oscilloscope, multimeter, two 741 op amps, one further 741
(optional), one 100 , three 10 k, two 100 k, one 1 M 14 W resistors, and
four more 10 k resistors (optional).
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86 Hands-on electronics
noninverting
3 + 6 output
input
V− 4 5 offset null
Fig. 7.1. Diagram of eight-pin DIP 741 package showing ‘pinout’. Often, in addition to
(or instead of) the notch at the ‘pin 1’ end of the package, there is a dot next to pin 1.
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87 7 Introduction to op amps
The 741C is rated for maximum supply voltages of ±18 V, and the
recommended range is ±(≤15) V. To be on the safe side, before you begin
to build your circuit, turn on the breadboard power and adjust the power
supplies to +15 V and −15 V.
Next, turn off the power and insert the op amp into the breadboard,
straddling the central groove of a socket block, with pins 1–4 toward the
left and 5–8 toward the right. Note that the pins are delicate and are easily
bent or broken. If they are too bent to plug into the sockets, straighten them
carefully, preferably using needle-nose pliers. Run wire jumpers from the
V+ pin to the +15 V bus and from the V− pin to the −15 V bus. Any point
of your circuit that is to be ‘grounded’ should be attached to the common
(or ground) bus.
Note: In the circuits shown below, the pin numbers have been omitted. It is good practice
for you to write in the pin numbers yourself before hooking up the circuits, to reduce
the possibility of confusion. Trying to work out pin numbers ‘on the fly’ and keeping
them in your head instead of writing them down is a common cause of errors in hooking
up circuits.
Also note: Even though the power connections are usually not shown on schematic
diagrams of op amp circuits, the positive and negative supplies must always be con-
nected, or the op amp won’t do anything!
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88 Hands-on electronics
R2
I2
R1
−
I1 op amp Vout
Vin ~ +
Fig. 7.2. Op amp inverting-amplifier circuit. Note the negative feedback resulting from
the resistor that connects the output to the inverting input. Op amps are almost always
used with negative feedback.
We shall see next that these approximations lead to a very simple way
of analyzing op amp circuits.
Vin
⇒ I1 = − (7.2)
R1
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89 7 Introduction to op amps
R2
⇒ Vout = − Vin . (7.4)
R1
Thus, the closed-loop voltage gain (i.e. the gain with feedback) of this
circuit is
Vout R2
Av = =− . (7.5)
Vin R1
In a nutshell, since all of the current due to the input signal flows around
the op amp, the output voltage is determined entirely by Ohm’s law applied
to R1 and R2 . Thus, if R1 = 10 k, a gain of −10 can be achieved by choosing
R2 = 100 k, and a gain of −1 results from choosing R2 = 10 k.
Fig. 7.3 shows an op amp configured as a noninverting amplifier. Again,
neglecting the tiny input currents of the op amp and assuming infinite open-
loop gain, application of Ohm’s law shows that the closed-loop voltage gain
of this circuit is
I 1 R1 + I2 R2 R2
Av = =1+ . (7.6)
I1 R1 R1
As above, Eq. 7.6 follows from the assumptions that all of the current flows
around the op amp and that feedback forces the inverting input to follow
the signal applied to the noninverting input. So if R1 = 10 k, a gain of
11 can be achieved by choosing R2 = 100 k, while a gain of 2 results from
choosing R2 = 10 k.
R1 R2
I1 I2
−
op amp Vout
+
Vin ~
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90 Hands-on electronics
Slew rate
The output voltage of a real op amp cannot change instantaneously. The
maximum rate at which the output can change is called the slew rate, and
is typically in the range of volts per microsecond. The slew rate can be
a serious limitation at large output amplitudes and high frequencies. The
741 slew rate is typically 0.5 V/s. High-speed op amps are available with
slew rates of 2000 V/s.
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91 7 Introduction to op amps
7.2 Experiments
+15
10 k
_
100 k
−15 Vout
+
100
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92 Hands-on electronics
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93 7 Introduction to op amps
+15
V0 R2 10 k R3 10 k
10 k
pot I2 I1+I2
−15 R1 10 k
−
I1
Vout
Vin ~ +
Fig. 7.5. Circuit for demonstrating a summing junction. Since the inverting input is held
near ground due to feedback, Vout = (I1 + I2 ) · R3 , where I1 = Vin /R1 and I2 = V0 /R2 .
If R1 = R2 = R3 , Vout = Vin + V0 .
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94 Hands-on electronics
scope probe! You can get around it by looking only at the output, with and
without the 1 M input resistor.
What value do you get for Z in this way?
Again you are seeing the effect of negative feedback: even though the open-
loop input impedance of the noninverting input is only of order megohms,
it is, in principle, multiplied by the ratio of the open-loop gain to the closed-
loop gain, here a factor of order 105 . (In practice, Z in is limited by other
effects, such as the capacitance to ground at the noninverting input.)
Be careful not to be confused by the DC shift in the output produced by
the 1 M input resistor! Explain how this shift results from the op amp’s
input bias current. What value for the input bias current is implied by
the observed DC shift?
The output impedance should of course be the same as for the inverting
amplifier, since, as far as output impedance is concerned, it is the same
circuit!
Explain this last statement. (Hint: what was the only thing you had to
change to make the noninverting amp from the inverting amp?)
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95 7 Introduction to op amps
−
Vout
Vin +
(a)
100 k
− 10 k
−
Vin + Vout
+
1 MΩ
(b)
Fig. 7.6. (a) Op amp voltage follower; (b) voltage follower as the input stage to an
inverting-op-amp circuit.
You can reproduce this effect more simply by touching the probe tip
with your finger. 60 Hz noise is pervasive throughout North America
(50 Hz in Europe) and is often the dominant background noise in elec-
tronic equipment.
Try amplifying this low-power signal using the inverting-amplifier
circuit previously constructed. Sketch the output and record your
observations.
Now, instead of driving the amplifier directly, insert a voltage follower as
shown in Fig. 7.6(b). Record the follower output as well as the amplifier
output. If the amplifier output saturates, choose a smaller feedback re-
sistor to reduce the gain of the inverting amp. Explain your observations.
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96 Hands-on electronics
R2
100 k
R1
Vin_ −
10 k Vout
Vin+ +
10 k pot R3
R4
Fig. 7.7. Difference amplifier. The parts of the pot on either side of the slider serve as R3
and R4 .
Difference amplifiers are often used in the life sciences where signals are
small and exist within a noisy environment, e.g. in the electrocardiograph
(ECG). Any background noise common to both inputs (common-mode
noise) is rejected, while the signal of interest (present at only one of the
inputs) is amplified and appears at the output. A potentiometer is often
used (as in Fig. 7.7) to tune the gain and common-mode rejection of the
amplifier.
The quality of the amplifier is measured (in part) by the common-mode
rejection ratio (CMRR), based on the ratio of the differential voltage gain
and common-mode voltage gain:
CMRR = 20 log (Adiff /ACM ). (7.7)
It is customary to give the CMRR in decibels, as shown in Eq. 7.7. The
741 general-purpose op amp is a differential amplifier with a CMRR value
specified to be at least 70 dB. Precision op amps are commercially available
with CMRR values as high as 140 dB or more.
Build the circuit shown in Fig. 7.7. As always, be careful not to short
the potentiometer’s center tap to ground or power. You can estimate the
common-mode rejection ratio by measuring both the common-mode volt-
age gain and the differential voltage gain.
The common-mode voltage gain is determined by applying identical sig-
nals to both inputs and observing the output voltage: ACM = VoutCM /VinCM .
Using a 1 kHz sine wave at maximum amplitude as your input, tune your dif-
ference amp to minimize the output amplitude (i.e. adjust the potentiometer
until the output amplitude is as small as possible). The best estimate for
the common-mode gain can be made using the averaging feature from the
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97 7 Introduction to op amps
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98 Hands-on electronics
V
0--10 k
10 k A
+15 −
Vout
+
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99 7 Introduction to op amps
R2 R1
function −
generator R1 2 Summing
~ + Output
R3
R2
R1 R3
−
− 3 Vout
1 +
Vin +
Fig. 7.9. Fancy summing circuit. Amp 1 is a voltage follower used to buffer the 60 Hz
pickup on a wire wrapped around an AC power cord. Amp 2 is a noninverting summing
amplifier with unity gain. Amp 3 is a difference amplifier with an adjustment to maximize
the CMRR.
amplifier output. Be sure to switch your trigger source back to the appro-
priate input channel. Try changing the input frequency. Replace the 60 Hz
AC-line signal at the noninverting input of the difference amp with the
output from the function generator. Observe how the output changes.
Explain how this circuit works using diagrams and equations as needed.
Explain why the summing amp isn’t inverting and why it has unity gain.
Sketch the inputs and output of the summing amp for a function gener-
ator frequency near 60 Hz. Why doesn’t the output have a well defined
amplitude?
Sketch the inputs and output of the difference amplifier. How does the
output change when the inputs are switched?
Is the output inverted with respect to the original inputs? If so, why?
If so, what could you change to make the output of the difference amp
noninverted with respect to the original inputs?
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8 More op amp applications
Apparatus required
Breadboard, dual-trace oscilloscope with two attenuating probes, one 741C
and one LF411 operational amplifier, one 1 k, two 10 k, and one 100 k 14 W
resistor, 0.0047 F and 0.033 F capacitors, two 1N914 (or similar) silicon
signal diodes, 2N3904 and 2N3906 transistors.
Recall that for an inverting amplifier made from an op amp, with input
resistor Ri and feedback resistor Rf , the gain is −Rf /Ri (neglecting the
input offset voltage and offset and bias currents and taking the op amp
open-loop gain to be infinite). We can generalize this result for devices
other than resistors, as illustrated in Fig. 8.1.
Zf
Av = − . (8.1)
Zi
Eq. 8.1 is useful if we are analyzing circuit performance in the frequency-
domain for a sine-wave input, but often we are concerned with the response
101
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102 Hands-on electronics
Zf
_
Vin
Zi Vout
+
Rf
C
Vin
_
Vout
+
8.1.1 Differentiator
As shown in the circuit of Fig. 8.2, the basic op amp differentiator (not to
be confused with the difference amplifier) is similar to the basic inverting
amplifier studied in Chapter 7, except that the input element is a capacitor
rather than a resistor. Using the assumption that the output does whatever
necessary to maintain the two inputs at equal voltages, it is easy to show
that the output voltage is given by
dQ dVin
Vout = −I Rf = − Rf = −Rf C , (8.2)
dt dt
since Q = C Vin , where Q is the charge stored on the capacitor.
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103 8 More op amp applications
Rf
C
Rs
_
One problem with the basic circuit is that the capacitor’s reactance,
1
XC = , (8.3)
2π f C
decreases with increasing frequency. Since here Z i = X C , Eq. 8.1 shows
that the output voltage of the basic differentiator increases with frequency,
making the circuit susceptible to high-frequency noise and prone to
oscillation.
A more practical differentiator circuit is shown in Fig. 8.3, with a resistor
placed in series with the input capacitor to limit the high-frequency gain to
the ratio Rf /Rs . The output voltage as a function of time is still given by
Eq. 8.2, as long as the input frequency is small compared with
1
f = . (8.4)
2π Rs C
For input frequencies greater than this, the performance of the circuit
approaches that of an inverting amplifier with voltage gain
Rf
Av = − . (8.5)
Rs
8.1.2 Integrator
By interchanging the resistor and capacitor in the differentiator circuit of
Fig. 8.2, we obtain an op amp integrator. As shown in Fig. 8.4, the resistor
Ri is the input element and the capacitor C is the feedback element. The
output voltage, as a function of time, is given by
1
Vout = − Vin dt, (8.6)
Ri C
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104 Hands-on electronics
Ri
Vin _
Vout
+
Rs
Ri
_
+
R2
which is proportional to the time integral (area under the curve) of the input
waveform vs. time.
As in the case of the differentiator, a more practical integrator circuit
is shown in Fig. 8.5. The resistor Rs across the feedback capacitor, called
a ‘shunt resistor’, is used to limit the low-frequency gain of the circuit.
If the low-frequency gain were not limited, the input DC offset, although
small, would be integrated over the integration period, possibly saturating
the op amp.
To minimize the DC offset voltage resulting from the input bias current,
the resistor R2 should equal the parallel combination of the input and shunt
resistors:
Ri Rs
R2 = . (8.7)
Ri + Rs
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105 8 More op amp applications
Since the shunt resistor limits the circuit’s low-frequency gain, Eq. 8.6
is valid for input frequencies greater than
1
f = . (8.8)
2π Rs C
For input frequencies less than f , the performance of the circuit approaches
that of an inverting amplifier with voltage gain
Rs
Av = − . (8.9)
Ri
If
Ri
_
Ii
Rf
Vin _
Vout
+
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106 Hands-on electronics
The current If through the feedback element equals the input current Ii ,
which is determined by the input voltage Vin :
Vin
If = Ii = . (8.10)
Ri
We can relate this to the output voltage Vout using the exponential diode
current–voltage law:
If = Is e−eVout /nkT − 1 . (8.11)
The minus sign in the exponential reflects the fact that the anode of
the diode is connected to virtual ground; thus, for If positive, Vout is neg-
ative. The constant n has been introduced since (as we saw in Chapter 3)
the slope of the exponential for a silicon diode is not quite as steep as e/kT ;
one finds experimentally that n ≈ 2 for silicon diodes and n ≈ 1 for
germanium. Thus the output voltage is
nkT Ii
Vout ≈ − ln (8.12)
e Is
nkT
≈− (ln Vin − ln Is Ri ). (8.13)
e
In practice, one should add additional components to compensate for
the temperature dependences in Eq. 8.13 (both the explicit kT factor and
the temperature dependence of Is ). Often, a transistor is used in place of
a diode, since experimentally one finds that a transistor gives an accurate
exponential characteristic over a wider range of current.
8.2 Experiments
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107 8 More op amp applications
Measure carefully the peak-to-peak voltage Vp–p and period T of the input
signal, and from them compute the slope of the input voltage vs. time,
dVin 2Vp–p
= . (8.14)
dt T
Now look at the function-generator output on channel 1 of the scope and
the op amp output on channel 2, while triggering on channel 1. You should
see that the op amp output signal is a square wave that is 90◦ out of phase
with the input, i.e., the output signal is a representation of the negative of
the time derivative of the input.
Measure the step height in volts of the square-wave output of the
op amp.
The theoretical prediction is
dVin
step height = 2Rf C . (8.15)
dt
Now change the input frequency from 500 Hz to 10 kHz. Be sure to
reduce the input amplitude to avoid saturating the output voltage. Record
the appearance of the output signal at this frequency. Measure the peak-to-
peak output voltage and determine the voltage gain.
Sketch the input and output waveforms at 500 Hz and 10 kHz and com-
ment on your results.
Compare your data with Eq. 8.15 and compare the measured gain at
10 kHz with the theoretical expectation.
At what approximate frequency does this circuit cease to act as a differ-
entiator (i.e. approach the operation of an inverting amplifier)?
Integrator
Set up the circuit shown in Fig. 8.5, with Ri = R2 = 10 k, Rs = 100 k, and
C = 0.0047 F. Adjust the peak-to-peak voltage of the square-wave input
to 1 V and the frequency to 10 kHz. You should see an output signal that
is a triangle wave 90◦ out of phase with the input square wave.
Derive Eq. 8.6.
Measure the peak-to-peak voltage of the triangle wave and compare with
the value you would expect theoretically.
Now change the input frequency to 100 Hz.
Record, describe, and explain the appearance of the output signal at this
frequency.
Measure the peak-to-peak output voltage and determine the voltage gain,
comparing with what you would expect theoretically.
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108 Hands-on electronics
Sketch the input and output waveforms at 10 kHz and 100 Hz, and
comment on your results. At what approximate frequency will this circuit
cease to act as an integrator (i.e. approach the operation of an inverting
amplifier)?
Compare the output amplitudes with the theoretical expectation.
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109 8 More op amp applications
(a) (b) R
Vout
Vout
R R
_ Vin _
Vin + +
Fig. 8.8. (a) Simple op amp half-wave rectifier; (b) improved version.
or switching diode like the 1N914 – while switching diodes are designed
for high frequencies, rectifier diodes (e.g., the 1N4001) tend to have large
junction capacitance and thus have poor performance at high frequency.
The circuit of Fig. 8.8(b) overcomes the slew rate limitation.
Build it, try it out, and figure out why it has much better response at high
frequency. Explain how each circuit works (use diagrams if necessary)
and explain why one is better than the other.
Sketch Vin , Vout , and the op amp output for both half-wave rectifier
circuits at 100 Hz and at 10 kHz.
How is this active rectifier better than a simple diode rectifier? (For
example, what would be the response of a simple rectifier to an input
signal of amplitude less than 0.7 V? How does this circuit respond to
such a signal?)
Comment on the performance of the LF411 as compared with that of
the 741.
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110 Hands-on electronics
(a) +5
+5 2N3904
_
Vin +
−5 2N3906 Speaker
−5
(b)
+5
+5 2N3904
_
Vin +
−5 2N3906 Speaker
−5
Fig. 8.9. Op amp follower with push–pull output-buffer power driver with two feedback
arrangements: (a) feedback before and (b) feedback after power driver.
op amp to compare the output signal with the input signal and correct the
drive signal to the push–pull stage to compensate for the 2VBE gap.
First hook up the circuit of Fig. 8.9(a) to see crossover distortion in
action. This circuit is susceptible to noise, so be neat and orderly and
keep the leads as short as possible. Use an audio-frequency sine wave,
in the vicinity of 1 kHz.
Record the input and output waveforms – how do they differ, and why?
Rearrange the feedback loop to include the push–pull driver inside it
(Fig. 8.9(b)), and compare the input and output waveforms again. What
does the signal at the op amp output look like, and why?
How much power is dissipated in the speaker assuming a sine wave of
amplitude 4 V? How does the peak current through the speaker compare
with the 741’s maximum output current?
Sketch the op amp input, the op amp output, and the waveform at the
speaker for both circuits and explain how the op amp eliminates crossover
distortion.
Estimate the total power consumed by this circuit.
What is the maximum input amplitude that can be accurately reproduced
at the speaker (without clipping)?
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111 8 More op amp applications
A
Vout = V in
Fig. 8.10. Block diagram showing how to build an ‘exponentiator’: a circuit that creates
an output voltage equal to the input voltage raised to any desired power.
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9 Comparators and oscillators
Apparatus required
Breadboard, dual-trace oscilloscope with two attenuating probes, two 741
and one LF411 op amp, 311 comparator, 555 timer, one 100 , one 820 ,
two 1 k, two 3.3 k, three 10 k, one 100 k, one 1 M, and one 10 M 14 W
resistor, three 0.033 F, one 0.01 F, and one 1 F capacitor, one red LED,
and two 3.3 V Zener diodes.
9.1 Experiments
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114 Hands-on electronics
V+
(a) (b)
+15 +15
1k
7 8
2 _ 3 _ 7
6
3 2
+ + 1
4 4
V–
–15 –15
Fig. 9.1. (a) Poor comparator: 741 op amp used in open-loop mode; (b) 311 comparator.
Pinouts shown for eight-pin mini-DIP package.
Now raise the input frquency to 100 kHz. Notice that the output ‘square
wave’ is not very square. Try an LF411 op amp in place of the 741.
For each case studied, sketch the output waveform and measure the
output amplitude and DC offset. Explain your measurements.
Contrast the performance of the LF411 and 741 when configured as com-
parators. What op amp limitation is responsible for the poor comparator
performance at high frequency?
Now substitute a 311 comparator for the op amp. (The pinouts are NOT
the same; see Fig. 9.1(b).) Whereas op amps are intended to be used with
negative feedback, the 311 is specifically designed for operation in open-
loop mode or with positive feedback.
The 311’s output stage differs from that of an op amp: to enhance flexi-
bility, it has both a positive output (pin 7) and a negative output (pin 1). We
shall be using the positive output. In this configuration, a ‘pull-up’ resistor
to a positive supply is required, in order to determine the output-voltage
level, and the negative output is generally connected to ground.
Note that the positive output is the collector of an NPN bipolar transistor.
As such, it cannot source current, but it can sink current. When the output
transistor is off (i.e., its base voltage is less than or equal to its emitter
voltage), the collector is pulled up to V+ by the external pull-up resistor.
Conversely, when the base voltage is raised 0.7 V above the emitter voltage,
the transistor saturates and the output pin is pulled down close to the emitter
voltage. This output configuration gives the 311 maximum flexibility to
provide the various signal voltages used by digital logic chips, including
TTL, CMOS, and ECL logic levels.1
Start by choosing convenient values for V+ and V− . Use an input fre-
quency of 100 kHz and observe the output.
1 Logic levels are discussed in section 10.1.1.
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115 9 Comparators and oscillators
~ 2
+ 1 Low
4
–15
Fig. 9.2. 311 comparator with 10 k series input resistor. The capacitor shown connecting
the input and output represents the stray capacitance associated with the breadboard. (Do
not add a discrete capacitor!)
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116 Hands-on electronics
scope probes, to suppress pickup of the large transient pulse due to the
15 V swing of the 311’s output. You’ll want to look at a low-to-high or
high-to-low transition and ‘zoom in’ by increasing the time sensitivity to
look for the rapid multiple transitions that indicate oscillation.
Starting with an input frequency near 100 kHz and an amplitude of
several volts, gradually reduce the input amplitude and frequency until
oscillations are observed. To be able to see the rapid transitions of the
output, be sure the time scale on your oscilloscope is about 500 ns per
division or less.
Sketch the observed oscillations. What is the time scale of the oscill-
ations – i.e., what is the period t for one cycle of the oscillation
waveform?
How small an input slope does it take to cause oscillation?
What causes the oscillations to stop?
Why is a 741 configured as a comparator less likely to oscillate than
the 311?
+15
+15
8
1k
3 _
7
2
+ 1
—15
1k 10k R1
R2
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117 9 Comparators and oscillators
R2
Vin+ = Vout . (9.1)
R1 + R2
There are two cases to consider, since the output might be at +15 V or it
might be at ground – i.e., since Vout has two possible states, Vin+ has two
possible states.
Build the circuit and apply a signal with an amplitude of at least 1.5 volts.
Try to create output oscillations. Notice the rapid and clean transitions
at the output, independent of the input waveform or frequency.
Sketch the output waveform. Is the output symmetric? If not, why not?
To see exactly what is happening, use the two-channel oscilloscope to
display the voltages at both comparator input terminals simultaneously. Be
sure to use DC coupling for both channels, and set them to the same voltage
sensitivity and the same zero offset.
Carefully sketch both input waveforms on the same graph and explain
how the circuit works. How does the hysteresis prevent oscillations?
Based on the component values used, what do you predict for the com-
parator thresholds? What is the predicted amount of hysteresis in volts?
How do these compare with your observations?
Record what you see as you vary the input amplitude. Below some input
amplitude the output stops switching. At what amplitude does this occur,
and why?
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118 Hands-on electronics
R 10 k
+15
+15
8 1k
3 _
7
0.01 µF C Vout
2
+ 1
4
–15
–15
R1
10 k
R2
3.3 k
Sketch the output waveform and explain how this circuit works. (Hint: it
operates by repeatedly charging and discharging the capacitor between
the two threshold voltages of the Schmitt trigger.)
What are the threshold voltages?
Why does the circuit oscillate spontaneously?
Derive Eq. 9.2 and compare with the observed frequency.
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119 9 Comparators and oscillators
_ Flip-Flop
Reset
Control R Q
Voltage
Set Discharge
+
Trigger _
R
Reset
is high, and the 555 can change states within 100 ns. Refer to a 555 data
sheet for additional details.
To see how the 555 works, first examine the connections associated with
the two comparators. The top comparator output is high when the threshold
input is greater than 23 VCC , and low otherwise. The bottom comparator
output is high when the trigger input is less than 13 VCC , and low otherwise.
In general, trigger and threshold should be configured such that only
one of the comparators is high at any given moment. The outputs connect
to a flip-flop (described in detail in Chapter 11). A positive signal at set
causes Q to be near ground, while a positive signal at reset causes Q to
be high. A high value for Q turns on the transistor switch, which drives
the discharge pin toward ground. The output stage is an inverting buffer,
so set causes the output to go high, while reset causes the output to
go low.
Begin by connecting a 555 as shown in Fig. 9.6(a) and observe the
output. When the output is high, the capacitor is charging through RA and
RB . When the capacitor voltage VC exceeds 23 VCC , the discharge pin is
driven toward ground and the capacitor discharges across RB . The cycle
repeats once VC falls below 13 VCC . The frequency is predicted as
1
f = . (9.3)
0.7(RA + 2RB )C
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120 Hands-on electronics
+15 +15
8 4 8 4
10 k RA 10 MΩ RA
Vcc Reset Vcc Reset
7 7
Discharge Discharge
+15
10 k RB 3 3
Out 6 Out
6 100 k Threshold
Threshold
820
2 2
Trigger Trigger
0.01 µF C 1 1 µF C 1
Red LED
(a) (b)
Fig. 9.6. (a) 555 timer IC used as an oscillator; (b) 555 timer IC used as a one-shot or
timer.
Sketch the output waveform and briefly explain the operation of this
circuit. Is the output symmetric? If not, why not?
Derive Eq. 9.3 and compare the measured output frequency with the
predicted oscillation frequency.
Examine the voltage VC across the capacitor. Record its minimum and
maximum values. Do they make sense?
Try replacing RB with a short circuit – what happens? Explain why. Put
RB back for the next part.
Try changing V+ to 5 V and observe how the output changes. To what
extent does the output frequency depend on supply voltage?
Now connect a 555 as shown in Fig. 9.6(b). The output should be a
‘one-shot’ pulse of duration
t = 1.1RA C. (9.4)
The output pulse is triggered by the push-button switch, which causes the
trigger input to go to ground. (Note: the output will remain high indef-
initely if the trigger input is held at ground, so one should ensure that
the trigger pulse is shorter than the desired output pulse!) Time the output
pulse by observing the LED.
Briefly explain the operation of this circuit. What prevents this circuit
from oscillating?
Measure the output-pulse duration for several values of RA and C. Tab-
ulate your results.
Derive Eq. 9.4. Are your data consistent with this expression? If not,
why not?
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121 9 Comparators and oscillators
9.2.1 Alarm!
You can configure the 555 to sound an alarm when prompted by an external
signal. The alarm is simply a 555 oscillator with the output connected to a
speaker. To prevent the alarm from sounding continuously, ground is ap-
plied to the reset input pin, which overrides the trigger and threshold
pins and forces the output near ground. When used in this way, the reset
line is said to ‘enable’ the 555, enabling oscillation when high while dis-
abling oscillation when low.
Build the circuit as shown in Fig. 9.7. Use a long wire, which simulates
a security loop. Cut or unplug the wire and hear the alarm!
The alarm can also be configured to sound for a specified duration using
two 555s by combining the timer from Fig. 9.6(b) with the alarm circuit.
Connect the alarm’s reset input to the timer’s output line. Trigger the timer
and the alarm will sound for the duration of the timer’s output signal.
+15
8 4
10 k RA Vcc Reset
7
Discharge
10 k RB 100
3
6 Out
Threshold
1 k pot
2 Trigger (volume control)
0.01 µF C 1
Speaker
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122 Hands-on electronics
You can also make a pulsing alarm by using two oscillators. The first
should oscillate with a period of a few seconds. The output of this oscillator
is then connected to the reset line of the second oscillator. The second
oscillator’s output is connected to the speaker and can oscillate with any
audio frequency of your choice.
sine
3.3 V 3.3 V
0.033 µF
C 0.033 µF
_ C
10 k
_
10 k
+ R cosine
R1
+
10 k
R
C 0.033 µF
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123 9 Comparators and oscillators
0.033 µF
C 100 k
R2
0.033 µF
3.3 k
Vin _
R1 C op amp Vout
3.3 k
R1
+
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124 Hands-on electronics
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10 Combinational logic
In this chapter you will be introduced to digital logic. You will build some
logic circuits out of discrete components and some out of integrated cir-
cuits, and familiarize yourself with the 7400 series of CMOS (comple-
mentary metal-oxide-semiconductor) and TTL (transistor–transistor logic)
integrated circuits and their basic operation.
Note
The kinds of things one thinks about in digital logic are almost completely
different from those in analog electronics.
Apparatus required
Breadboard, oscilloscope, multimeter, 100 , 330 , 1 k, 2.2 k, and 3.3 k
1
4
W resistors, two VP0610L and two VN0610L MOSFET transistors,
three 2N3904 transistors, three diodes, one LED, one red LED (optional),
74HC00, 7432, 7485, 7486 TTL or TTL-compatible logic chips, logic
switches, and logic displays.
In this section we introduce the 7400 series of CMOS and TTL digital-
logic chips. Unlike the analog ICs you’ve used up to now, which can output
any voltage within some range determined by the power-supply voltages,
digital-logic ICs employ only two ranges of output voltages, referred to as
logic levels, about which more below. These levels can be used to represent
true or false logical conditions or the zero and one of binary arithmetic.
The 7400 series is not the only logic series, nor are CMOS and TTL
the only types of logic circuitry; however, they are the most commonly
used. Other logic families include the CMOS 4000 series and the ECL
125
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126 Hands-on electronics
(emitter-coupled logic) 10 000 and 100 000 series. Each logic family has
its own logic levels, speed, and recommended supply voltages.
The integrated circuits you will be using now are much more specialized
than the general-purpose 741 op amp and 555 timer. They feature much
higher bandwidth, with typical transition speeds of order volts/nanosecond
(in contrast to the volts/microsecond slew rate of the 741). While greater
complexity often means higher cost, the basic chips in the 7400 families
(such as the 74HC00, 74LS00, and 74ACT00) cost less than $0.50 each
in small quantities, with the more complex chips ranging toward several
dollars.
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127 10 Combinational logic
Volts 5
VCC VCC
VIH
VCC
3
VIH
2 VIH
VIL
1 VIL
VIL
0
CMOS: CMOS & TTL: Low-Voltage CMOS:
C, HC, AC, and HCT, ACT, AHCT, LVC and ALVC
AHC Series S, F, LS, AS, and Series
ALS Series
Fig. 10.1. Logic levels for various 7400-family lines. VCC is the most positive voltage; VIL
and VIH are the maximum input low and minimum input high voltages.
which can be assigned either of two ways. The more common convention
is positive logic: high=1=true, low=0=false. But there are occasionally
situations in which it is more convenient to employ negative logic, in which
high=0=false and low=1=true. (Another way to think about logic circuits
is in terms of assertion-level logic, which is a hybrid of positive and negative
logic that we will introduce in the next chapter.)
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128 Hands-on electronics
refer to chips from any of these families. Unless otherwise specified, the
chip families you actually use will depend on what happens to be on hand
in the laboratory or (if you are working through this book on your own) on
what you happen to find available.
Part numbers
The original TTL chips were the 7400 series and the corresponding ‘Mil
Spec’ (military specification) 5400 series; these became popular in the
1970s. TTL chips are labeled with part numbers that begin with a letter
code (such as ‘SN’) that is typically different for each manufacturer (see
Fig. 10.2); then comes the ‘74’ that identifies the device as belonging to the
7400 series; then there may be a letter code that identifies the family; then
the number that identifies the particular device (e.g. 00 for a quad NAND
gate, 01 for quad NAND with open-collector outputs, 02 for quad NOR
gate, 74 for dual D-type flip-flop, etc.); and finally there may be letters that
indicate package style, reliability, degree of testing by the manufacturer,
etc. (For example, the MC74LS00ND is a Motorola LS-TTL quad NAND
gate in the plastic dual-in-line package with 160 hour ‘burn-in’ testing.)
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129 10 Combinational logic
1B 4B
1Y 4A
SN 74 LS 00 N 2A 4Y
2B 3B
2Y 3A
pinout for a 74HC00 quad NAND IC is the same as the pinout for the
74LS00 quad NAND IC. It is always a good idea to review the data sheet
before using any logic chip.
Another consistency is in the pin numbering scheme. If you orient the
chip so that the pins are bending away from you and the end that has a
notch or a dot is pointing to the left, pin 1 is the one at the lower left of
the package. The numbering then proceeds sequentially around the chip in
a counterclockwise direction, such that the highest-numbered pin is at the
upper left. Almost always, when you orient the chip this way, the writing
on the top will be right-side-up (see Fig. 10.2).
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130 Hands-on electronics
INVERTER
(NOT)
AND OR XOR
A Out
L H
H L
After the inverter, the NAND is the simplest logic gate to construct from
discrete components, and historically it was the most commonly used gate.
NAND is a ‘universal’ logic function, in that the other logic functions can
all be created using NAND gates. For example, connecting together the two
inputs of a NAND creates a one-input gate – an inverter. Thus, if the output
of a NAND is connected to both inputs of a second NAND, the result is
equivalent to an AND gate.
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131 10 Combinational logic
A B AB . A B A+B A B A+B A B AB .
L L H H H H L L H H H H
L H H H L H L H L H L L
H L H L H H H L L L H L
H H L L L L H H L L L L
= =
Fig. 10.4. DeMorgan’s theorems expressed symbolically.
A · B = A + B. (10.1)
and
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132 Hands-on electronics
+5
3.3 k
+5
Q2 330
Q1 LED
A
T
B Q3
1k
Fig. 10.6. Diode–transistor NAND gate using 2N3904s. This resembles the circuitry
actually used inside the 7400, except that in the 7400 a two-emitter transistor substitutes
for the input diodes. The resistor values are approximate and vary with TTL family. Also
shown is a simple LED logic-level indicator being driven by the NAND gate’s output.
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133 10 Combinational logic
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134 Hands-on electronics
Metal
Oxide
VGS Semiconductor
+
Gate
Source Drain
N-type N-type
P-type
N-type
Substrate
Fig. 10.7. Schematic representation of an ‘enhancement-mode’ N-channel MOSFET.
gate–source voltage attracts current carriers into the channel between the
drain and source, allowing current to flow. A gate–source voltage near
zero (or negative) closes the channel and prevents current flow between
drain and source. When the channel is open, the drain–source resistance
is quite small (≈10–100 ), while the drain–source resistance is large (of
order megohms) when the channel is closed. The MOSFET thus acts like
a switch.
Notice that to turn on an N-channel MOSFET, the gate voltage is brought
positive with respect to the source. For a JFET, this would result in a
large current flowing through the gate to the source since the gate–source
junction would act as a forward-biased diode. This does not occur in
MOSFETs since the gate and channel are separated by a layer of insu-
lating oxide. The oxide layer allows the electric field to penetrate without
allowing current to pass. The input impedance for MOSFETs is conse-
quently even greater than for JFETs! Also notice that, unlike JFET opera-
tion, the drain–source channel is normally closed. A positive gate voltage
of a few to several volts is required to open the channel and allow current
to flow.
For P-channel MOSFETs, the voltage relationships are reversed: the
channel is open when the gate–source voltage is negative and closed when
the gate–source voltage is near zero (or positive).
Combining an N-channel and P-channel MOSFET gives a comple-
mentary pair of switches that open and close opposite each other. Two
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135 10 Combinational logic
S
G
MOSFET
P-channel Switch 1
MOSFET
D
D
G N-channel
MOSFET MOSFET
Switch 2
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136 Hands-on electronics
Vcc Vcc
A B C
P-channel L L H
MOSFET S
S L H H
G G
H L H
P-channel H H L
MOSFET
D D
C
A D
G N-channel 330
MOSFET
S
B D
G N-channel LED
MOSFET
Fig. 10.9. Schematic representation of a CMOS NAND gate with LED logic-level
indicator.
through the oxide layer, destroying the MOSFET. You’ve probably heard
of static-sensitive electronics such as computer memory cards. These cards
are constructed using MOSFETs.
To minimize the accidental destruction of components, we’ve chosen
medium-power MOSFETS for this lab – these are much more robust (and
less sensitive to static) than the tiny, high-speed MOSFETS used inside
high-density chips.
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137 10 Combinational logic
Be careful! Note that TTL and CMOS ICs are guaranteed to be destroyed if by mistake
you power them backwards! They may also be destroyed if you apply a voltage higher
than 7 V to any pin (5.5 V for the original 7400 TTL family).
10.3 Experiments
+5 +5
1--100 k SPDT
TTL or CMOS Switch
LOGIC LEVEL
SPST
Switch
TTL or CMOS
LOGIC LEVEL
Fig. 10.10. Logic-level switch using either an SPST or SPDT switch and a pull-up resistor
as shown.
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138 Hands-on electronics
switches instead of logic switches. (If your breadboard doesn’t have logic
switches, refer to Fig. 10.10 for details on how to use the SPST switch bank
as logic-level switches.)
Figure out how to use the logic-level switches to turn an LED indicator
on and off. Explain how the indicator works.
CMOS inputs require well defined input voltages; therefore, a CMOS
input must always be connected either to power or ground or to a CMOS
(or in some cases TTL) output. Unpredictable behavior (as well as exces-
sive current flow from the power supply to ground) will result otherwise.
TTL is more forgiving, and SPST switches can easily be used as TTL
level switches, even without a pull-up resistor. As we will explore in more
detail later, an unconnected TTL input usually behaves as if connected
to a logic high: you assert a TTL low logic level at an input by con-
necting it to ground, whereas an open input acts like a high logic level.
With one end of the SPST switch connected to ground, you can thus
set the switch ‘on’ to assert a TTL low input level, or ‘off’ to assert a
TTL high.
10.3.2 MOSFETs
To demonstrate MOSFET behavior, construct the circuits shown in
Fig. 10.11.
For both N- and P-channel MOSFETs, vary the gate voltage between 0
and 5 V and measure the channel resistance as a function of gate voltage.
Note: if you try to measure the resistance directly with the meter, you
Vcc (5 V) Vcc (5 V)
S 1 kΩ
G P-channel
Vin MOSFET Vout
PV D D NV
L 0L
0 610 Vout 061
G N-channel
Vin MOSFET
S
D 1 kΩ D
G G
S S
Fig. 10.11. Circuits for measuring the channel resistance as a function of gate voltage.
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139 10 Combinational logic
will fail, since the quiescent current flowing in the channel will confuse
the ohmmeter! Measure the output voltage and infer the resistance using
the voltage-divider equation.
On a single graph, plot the channel resistance for both the N- and
P-channel MOSFETs vs. gate voltage. Comment on your results.
As discussed above, the complementary nature of P- and N-channel
MOSFETs which you’ve just demonstrated can be used to create logic
gates.
Build the gate shown in Fig. 10.8 and determine its function.
You can easily display the output using an LED indicator. If you use
discrete components, don’t forget the current-limiting resistor (about
330 ) – connect the LED and resistor in series between the CMOS output
and ground. In either case, if the LED is on the output is high, and if the
LED is off the output is low.
Apply CMOS logic levels to the input and note the output. Make a truth
table and verify that the gate inverts the logic level of the input.
The TTL output of the function generator puts out a square waveform
whose low voltage level is near zero volts and whose high is near +5 V.
Use it to apply a signal to the input, and measure the output slew rate
(i.e., the transition speed from high to low and from low to high). How
does the output transition speed compare with the transition speed of the
input square wave?
Measure the input and output impedances and compare your results with
your expectations. The output impedance should be measured for both
high and low output logic states, using a pull-up resistor to +5 V or a
pull-down resistor to ground as appropriate (try a 330 resistor). (If
you used a discrete-component LED indicator, you should disconnect it
to avoid confusion, or else figure out how to take it into account.)
The inverter can be converted to a NAND gate with the addition of two
more MOSFETs. Do so as shown in Fig. 10.9. Connect the output to a logic
indicator.
Using logic switches, verify the truth table.
Tie one input to +5 V and the other to a TTL square wave. Measure the
transition speed of the output.
Measure the output impedance with both inputs high as well as with
both inputs low. Compare these results with the values measured for the
inverter. Does the output impedance depend on the output logic level?
How does the output voltage level depend on the output load?
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140 Hands-on electronics
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141 10 Combinational logic
is true of NOR and XOR). In the early days of logic chips, only NAND
was available, since AND and OR functions require more transistors to
implement.
Construct the following two-input logic circuits using only NAND gates:
AND, OR, NOR.
To figure out the necessary logic, you can make use of DeMorgan’s the-
orems (Eqs. 10.1 and 10.2). Recall that you can use a NAND gate as an
inverter if needed – just connect the two inputs together, or tie one input
high.
Write down your schematic diagram for each circuit, indicating pin num-
bers next to each input and output that you use. These should be logic
diagrams, i.e., gate symbols arranged in a logical order according to their
function (like the schematics in the following chapters), not chip-level
diagrams (such as in Fig. 10.2).
Drive each circuit using two switches on your breadboard and verify
that it gives the desired output for each of the four possible input states.
Record the truth table for each logic circuit.
Sometimes it is useful to have a gate that outputs a true if one or the
other input is true, but not both. Such a gate is called an exclusive-OR
(XOR) gate. In Boolean algebra the exclusive-OR of A and B is denoted
by A ⊕ B. As we shall see below, an XOR can be used to test two numbers
for equality; it also can be used to produce the sum bit for a 1-bit binary
addition.
Construct an XOR circuit out of NANDs. It should turn on an LED
indicator when either input is high but not when both are.
It is easy to see how to do this with five gates; it can also be done with
only four. Be sure to show, both using Boolean algebra and using truth
tables for the intermediate signals in your circuit, that indeed you have
implemented an exclusive-OR.
Show how to use an XOR to test two signals for equality. Try it out
and show that it works, displaying the XOR output with an LED logic
indicator. Does the LED light for equality or for inequality? Why?
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142 Hands-on electronics
Using all four XOR gates on the 7486, plus whatever additional gates
you need, design a circuit whose output indicates whether the two halves
of the 8-bit level switch are set equal (LED on if they are equal, off if
they are different).
You will find that this is quite cumbersome using NAND gates, since equal-
ity corresponds to all four 7486 outputs being low. But it becomes much
simpler if you use OR gates such as the 7432.
Record your schematic including pin numbers, build your circuit, and try
it out. Allow one or more inputs to float by leaving them unconnected.
Is your observation consistent with the general property of 7400-series
TTL chips that floating input lines default to a high state?
This is a handy feature when testing circuits on a breadboard, but it is good
design practice not to rely on it – to be certain of reliable operation and
be maximally insensitive to noise, if you are using a gate in a circuit, you
should connect all of its inputs either to high or low or to outputs of other
gates.
Display the output with a logic indicator and verify that your circuit
works for a few representative cases. Record the input and output in
each case.
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11 Flip-flops: saving a logic state
Apparatus required
The ideas explored in the following exercises apply equally whether CMOS
or TTL gates are used – use whichever is most convenient. You will need a
quad NAND (7400), a dual D-type flip-flop (7474), and a dual JK flip-flop
(74112). In addition, you will need a 74373, a breadboard, two 1 k 14 W
resistors, and a two-channel oscilloscope with two attenuating probes. (If
possible, avoid unnecessary complications by not mixing CMOS and TTL
chips within a single circuit.)
143
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144 Hands-on electronics
11.1.1 Schematics
For each of the following exercises be sure to write down a complete
schematic diagram of each circuit you build, including pin numbers (but
power and ground connections need not be shown). Often when one wires
up a circuit off the top of one’s head, it fails to work. Writing down the
schematic showing all pin numbers is a powerful debugging tool, since it
makes incorrect connections much more obvious.
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145 11 Flip-flops
tH : hold time
OUT tPW
tSU : setup time
tTLH tTHL
tH
tPD tPW : pulse width
IN
tPD : propagation delay
tSU
tTLH : transition time (low--high)
CLK
tTHL : transition time (high--low)
Fig. 11.1. Timing diagram with timing definitions for a rising-edge-triggered flip-flop.
Note that the rising edge of the clock signal causes the output to change while the falling
edge of the clock signal has no effect on the flip-flop.
are shown as either high or low – we tend not to worry in timing dia-
grams about analog details such as the exact voltage to which high and low
correspond.
Fig. 11.1 defines several important terms. The time between a clock edge
and the resulting changing edge of the output is defined as the propagation
delay (tPD ). Note how the time is measured from the midpoint between logic
low and high. The setup time (tSU ) is the minimum time that an input signal
must be stable preceding a clock edge. The hold time (tH ) specifies the
minimum time that the input signal must be stable following a clock edge.
The transition time measures the time required for a signal to transition
from logic low to high (tTLH ) or from logic high to low (tTHL ).
These timing parameters are specified in the data sheets. Manufacturers
guarantee that the IC will perform correctly if the user satisfies the specified
minimum values. The specs are usually worst-case values. For example,
the measured propagation delay is almost always less than the maximum
value specified by the manufacturer. Although manufacturers often specify
the typical propagation delay as well, it is not guaranteed – safe designers
heed the minima and maxima, not the ‘typicals’.
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146 Hands-on electronics
S 1 S 1
4 7400 Q 4 7400 Q
1 1
4 7400 Q 4 7400 Q * but note that the state after LL input
R R condition is removed depends on which
input signal goes high first; if both go
high “simultaneously,” state is undefined
Fig. 11.2. Simple RS latch made of two-input NANDs with state table.
NORs). R and S refer to reset and set (reset is also known as clear).
set turns Q on while reset (clear) turns Q off. Q is the opposite of Q,
except when both S and R are asserted.
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147 11 Flip-flops
4 10
S S
2 5 12 9
D Q D Q
1 1
2 7474 2 7474
3 6 11 8
clk Q clk Q
R R
1 Vcc = pin 14 13
X = Don’t Care
* but note that the state after LL input
Gnd = pin 7 condition is removed depends on which
input signal goes high first; if both go
high “simultaneously,” state is undefined
output is stable
OUT output state
between rising
is not specified
clock edges unpredictable output
preceding the first
rising clock edge due to changing input
coincident with clock edge
IN
minimum setup time
not satisfied
CLK
Fig. 11.4. Sample timing diagram for a (positive-edge-triggered) 7474 D-type flip-flop.
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148 Hands-on electronics
the Q and Q outputs using logic indicators. When using the debounced
push-buttons on the PB-503, be sure to add a pull-up resistor (as you did
for the logic-level switches; see Fig. 10.10).
Show that information presented on the D input is ignored except during
clock transitions by changing the state of D while the clock is low or
high. What happens?
Now check whether the set and reset inputs take precedence over the
clock and D inputs: for example, try asserting reset (i.e. apply a low
level to it) and see whether you can clock in a high level applied at D.
Disconnect the D input from the logic switch and connect the Q output
to the D input to make a toggling flip-flop. (Be sure to deassert set and
reset.) What happens now when you apply clocks?
Try clocking the toggling flip-flop using a digital square wave from the
function generator, and use the scope to look at the input and output si-
multaneously. This is sometimes called a divide-by-two circuit – explain
what this means.
Measure the flip-flop’s propagation delay, i.e., the time from the clock
transition to the change of output voltage – what is it? Is it about what
you would expect for chips of this family? How does it compare with
the manufacturer’s specifications? Be sure to trigger the scope on Q, not
the clock signal.
As mentioned above, a good technique for precise timing of digital signals
is to set both scope channels to 1 or 2 V/division and use the scope’s vertical-
position knobs to overlay both grounds below the center of the graticule;
then, you can easily measure the time at which each signal crosses the
midpoint between logic low and logic high (1.5 V for TTL and 2.5 V for
standard CMOS).
11.3 JK flip-flop
The JK flip-flop (Fig. 11.5) is slightly more complicated than the D flip-
flop; it can do everything a D can do plus more. The following exercises
use a negative-edge-triggered JK flip-flop with set and reset. Various
chips are available (e.g., the 74HC112 or the 74LS76) – which you use will
depend on what you have to hand; however, for the following exercises we
recommend using the 74112 JK flip-flop. Be sure to review the data sheet
to ensure that you have the correct pinout.
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149 11 Flip-flops
4 10
3 S 11 S
J 5 J 9
Q Q
1 1 13 1
clk 2 74112 clk 2 74112
6 7
2 Q 12 Q
K K
R R
15 Vcc = pin 16 14
Gnd = pin 8
Tie set and reset high and explore the JK’s clocked operation. (Note
that the 74112 senses its J and K inputs only at downward transitions of
the clock; hence, it is referred to as negative-edge-triggered.)
Driving the clock from a debounced push-button and J and K from logic
switches, check the four possible input states, and write down the JK
state table. As in the case of the RS latch above, you need to try each
input state for both possible internal states.
Now add an inverter (made from a NAND if you like) from the J to the K
input to make a D flip-flop. Drive J from a level switch and write down
the state table to verify that the circuit acts like a D flip-flop.
Next remove the inverter and connect J and K together. Try it out and
write down the state table. What does this circuit do? How is it different
from the toggling D flip-flop?
The ICs that we have used so far have two, and only two, valid output
states: high and low. Nowadays, it is common for some logic ICs to have
three output states.
There are situations in which the designer wishes the output to be neither
high nor low! Rather, in such situations, one wants to turn off the output
completely, i.e., the output should become a high impedance. The third
state is thus referred to as the ‘high-Z ’ state. This feature allows multiple
outputs to be connected in parallel, as long as all but one of them are in
the high-Z state. A common example of the use of tri-state outputs is the
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150 Hands-on electronics
(a) (b)
+5 V
+5 V
+5 V
VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q LE 1 kΩ
74373
D Q 10 k pot
OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND
1 kΩ
Fig. 11.6. (a) Pinout and power connections for the 74373. (b) Input and output
connections for testing the tri-state output. Unlabeled resistors merely need to be large
enough to prevent excessive current flow from +5 V to ground (e.g. 1 k or larger).
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151 11 Flip-flops
Set LE high and OE high. Observe the output voltage as you vary
the potentiometer. Explain your observations. Does the output behave
differently for input high and input low?
Now set the input either high or low, record the input state, then set
LE low.
Set OE low. The input state at the moment that LE was set low should
have been latched internally, independent of the state of OE. Does the
’373 remember the last input state correctly?
In your own words and based on your observations, explain the operation
and features of the 74373.
+5
S S
J J
Q0 Q1
clk
Q Q
K K
R R
+5
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152 Hands-on electronics
+5
S S
J Q0 J Q1
clk
Q Q
K K
R R
+5
timing diagram and label the states with their numeric values (0 through
3), interpreting Q0 as the low-order bit and Q1 as the high-order bit of a
2-bit binary number.
Turn the scope’s sweep rate up until you can see the ‘ripple’: Q0 and Q1
don’t change at the same time. Explain why not. (Be sure to look at both
edges of Q1 .)
Synchronous counter
Now configure the circuit in its synchronous form (Fig. 11.8).
Use the scope to confirm that the ripple is gone, and make a timing
diagram showing this. You can see that, unlike D flip-flops, JK flip-flops
are natural for building synchronous counters – explain.
Keep your synchronous counter (and RS latch) for the next exercise.
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153 11 Flip-flops
(a) (b) +5
+5
1
4 7400 ÷4
÷4
1
4 7400
+5
Fig. 11.9. (a) Looking at contact bounce by driving a divide-by-four counter from a
switch. (b) A NAND latch is used as a debouncer.
to see if you can discern the bounces. Make a sketch of the observed
waveform.
Next, clock your two-bit counter from the switch and see what happens.
Write down some typical sequences of states. How is the contact bounce
affecting the sequence?
RS latch as debouncer
Now use the RS latch from the first exercise as a switch debouncer
(Fig. 11.9(b)). (Although D and JK flip-flops are used for most flip-flop
applications, switch debouncing is one area in which RS latches continue
to hold their own.)
Connect the switch to the latch as shown, and use the output from the latch
to clock the counter. Verify that the counting sequence is now correct.
Explain why this works. (The PB-503’s momentary-contact switches are
already debounced by RS latches built into the unit.)
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154 Hands-on electronics
frequency to about 10 Hz. Operate the switch and observe the output. You
can assign the LED ‘on’ to be heads and ‘off’ to be tails.
Write down the circuit diagram with pin numbers and explain how this
circuit works.
Record a sequence of ten coin tosses. Is the sequence random? Repeat
another sequence of ten. How many tosses are required to determine if
the system is truly random? If you were an unscrupulous game designer,
how could you skew the ratio of heads to tails?
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12 Monostables, counters, multiplexers,
and RAM
Apparatus required
Breadboard, oscilloscope, 7400 NAND, two 7490 and one 7493 counter,
74121 (or similar) one-shot, 74150 multiplexer, 7489, 74189, or 74219
RAM chip, two TIL311 displays, assorted resistors and capacitors.
Note
The circuits in this lab are rather involved, and many of the details of their
design are left for you to work out. You will need to work them out in
advance if you are to have any hope of completing the exercises in a timely
fashion!
155
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156 Hands-on electronics
12.1 Multivibrators
12.2 Counters
In the last lab you wired up a divide-by-four circuit. That was of course
a 2-bit binary counter. Counters are so useful that IC manufacturers pro-
vide 4-bit (and more) counters as a single chip, with carry-in and carry-
out connections that allow them to be ‘cascaded’ in multiple stages for
8-bit, 12-bit, or greater range. Cascading means connecting multiple chips
together (as in the multiple digits of a car’s odometer) so that each chip
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157 12 Monostables, counters, multiplexers, and RAM
counts when the preceding one ‘rolls over’ from its maximum count back
to zero. Counters are available in both binary and decimal versions and
in synchronous and asynchronous (‘ripple-through’) configurations, with
various arrangements of set, reset, and clock inputs.
Four-bit binary counters count from 0–15 and then ‘roll over’ to 0 again,
possibly issuing a carry-out signal to the next stage. (More specifically,
synchronous counters issue a carry-out, while for negative-edge-triggered
asynchronous counters, the high-order output bit from the preceding stage
serves to clock the next stage.)
Decimal counters work basically in the same way as binary counters,
except that they roll over (and possibly issue carry-out) at 9 rather than at
15; this makes them useful for driving decimal displays, which are easier
for humans to interpret than binary. Note that decimal counters are also
referred to as decade or BCD (‘binary-coded decimal’) counters. Some
are actually bi-quinary counters, i.e., a divide-by-five stage coupled to a
divide-by-two.
12.3 Experiments
6
7
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158 Hands-on electronics
1 +5 +5 14
2 D1 D2 13
3 D0 D3 12
4 DPL
5 LE DPR 10
TIL 311
7 GND BI 8
Fig. 12.2. Pinout of TIL311 hex display: D0–D3 are data inputs, DPL and DPR connect to
LEDs for left and right decimal points, LE = high latches the input data, and BI = high
blanks the display.
which the high-order bit is a square wave at one-tenth the frequency of the
input clock.
First figure out how to configure a 7490 as a divide-by-ten, clock it with
a digital square wave, and verify that the output is indeed a symmetrical
(i.e. high half the time and low half the time) square wave at one-tenth
the input frequency. Write down the state table and sketch the timing
diagram for the four output bits with respect to the clock input. (Also,
don’t forget to write down your complete schematic with pin numbers.)
Next configure your 7490 as a decimal counter, so that as successive
clock pulses are applied it sequences through the states 0–9 in order
(0000, 0001, 0010, . . . , 1001).
Display the state of the counter with a TIL311 hexadecimal LED display
(Fig. 12.2), as explained in the following paragraphs.
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159 12 Monostables, counters, multiplexers, and RAM
will display correctly the output of a CMOS chip, since CMOS logic levels
satisfy the TTL input criteria.2
To display a 4-bit hexadecimal number, connect the digital signals for
the four bits to the pins labeled D0, D1, D2, D3, with D3 being the high-
order (23 ) bit. Ground BI (blanking input – when high the display is blank)
and LE (latch enable – latches input when high). Since you don’t want
to display a decimal point, leave the DPL (decimal place left) and DPR
(decimal place right) pins open. If you wish to experiment with the decimal
place LEDs, be sure to use a current-limiting resistor in series with the input
pins. See the TIL311 data sheet for additional information concerning these
features.
Clock your counter from a debounced switch and confirm that it and the
display both work. What are the state table and timing diagram for the
four outputs?
Try out the R0 and R9 inputs – what do they do?
Add a second 7490 and TIL311 so that you can count from 0–99. Clock
your circuit from a digital square wave at several hertz and verify that it
works. Save it for use in the following sections.
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160 Hands-on electronics
Gated Clock
Gate tW
Clock
Fig. 12.3. Timing diagram for a gated clock signal. Notice how the gated clock signal is
simply the logical NAND of the gate and clock signals.
Trigger
5V 5V
Q tW
Rext Rext
Cext Cext
11 10 15 14
1
6 A 13
3 Q B
2 Trigger Q
A1 4
A2 5 Trigger
B 1 3 4
Q Clear Q
74121 74123
Fig. 12.4. Pinout of ’121 and ’123 one-shots with external RC timing network (see the
data sheets for details).
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161 12 Monostables, counters, multiplexers, and RAM
the counter does not go past 99, but high enough that the width of the
one-shot pulse can be measured accurately.
Build the gated counter as described above. Include a push-button reset
that zeros the counter. Record the complete circuit diagram including all
pin numbers.
Reset the counter and trigger the monostable. What pulse width is im-
plied by the value of the counter, and why? What clock frequency did
you choose, and why?
Repeat the measurement about ten times over a period of five minutes in
order to determine the reproducibility and stability of the output pulse
width. Plot your results as a histogram and compute the mean and r.m.s.
(root-mean-square) duration.
(Save your two-digit counter for use in the next section.)
substandard
clock pulses
Gated Clock
Gate
Clock
Fig. 12.5. Substandard outputs can result when gating clock signals.
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162 Hands-on electronics
The 74123 ICs have several additional features that we haven’t explored
here. For example, the ’123 is a retriggerable monostable equipped with
a clear input. The retrigger feature allows the output to persist longer
than the time specified by Eq. 12.1 through the application of additional
trigger edges while the output pulse is in progress. clear allows the
output to be prematurely terminated. See the data sheets for details and
operating rules.
12.3.3 Multiplexer and finite-state machine
A multiplexer (or ‘mux’) is a device that connects one of n inputs to a
single output, under control of an input number in the range 0 to n − 1. It
can thus be used to select among n different input signals. It can also be
used to implement logic functions. For example, by connecting each of the
n inputs to low or high in a desired pattern, any desired 1-bit logic function
of the input number can be produced.
You can also use a mux plus a counter to generate an arbitrary timing-
pulse sequence: on each clock cycle, a different input will be selected, and
the output will be either high or low depending on the state of the corre-
sponding input. This is an example of a finite-state machine – it repeatedly
goes through a cycle of n internal states. Finite-state machines are often
useful in control applications (e.g., in deciding when to open the hot-water
valve in a washing machine).
Hook up the select inputs (A–D) of a ’150 16-to-1 multiplexer (Fig. 12.6)
to the outputs of the low-order counter chip from the previous exercise
(leave them connected to the hex display also). Note that the ’150 has an
enable input that needs to be held low. Since the ’150 is an inverting mux,
if you want its output to be high during counter state i, ground data input i.
Which select input is high-order and which is low-order? What experi-
ment can you do to find out? Do it and find out.
As an example of an arbitrary logic function, configure the ’150 to
identify which of the numbers from 0–9 are prime. Hard-wire the inputs
appropriately and connect the ’150 output to a logic indicator. Clock the
counter from a debounced push-button, and see if you are right – if not,
fix it. Record the truth table for this function.
12.3.4 RAM
A random-access memory (RAM) is a chip containing a large number of
flip-flops, each designated by a unique numeric address. Each flip-flop can
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163 12 Monostables, counters, multiplexers, and RAM
9
16 Enable
D15
17
D14 10
18 W
D13
19
D12
20
D11
21
D10
22
D9
23
D8 74150
1
D7
2
D6
3
D5
4 +5: pin24
D4 GND: pin12
5
D3
6
D2
7
D1
8
D0
A B C D
15 14 13 11
12 11
D I4 DO4
10 9
D I3 DO3
6 7
D I2 DO2
4 5
D I1 7489 DO1
3
WE
2 +5: pin 16
ME GND: pin 8
A B C D
1 15 14 13
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164 Hands-on electronics
Open-collector outputs
RAM chips are designed for easy multiplexing with a minimum of addi-
tional components, since to increase the total amount of memory available
in a circuit one often wants to connect the outputs of multiple RAM chips
together. In the case of the TTL version of the 7489, this is accomplished
by making the data outputs open-collector (rather than the standard TTL
‘totem-pole’ output circuit). This means that the output transistors will not
operate properly unless a pull-up resistor to +5 is provided for each one.
Since we are not worrying about speed here, any convenient resistor in the
range of a few hundred ohms to 10 k is suitable. More modern memory
chips use three-state outputs, thus eliminating the need for pull-up resistors
and also improving the rise time when driving high capacitance.
The ‘master enable’ (me) signal is provided for use when the outputs of
multiple chips are connected together, to allow turning off the outputs of
all but one chip. The chip accepts input data and puts out output data only
when me = low. Therefore, be sure to ground me.
Hook up the counter’s outputs to the address lines of the RAM and display
the output data with your second TIL311. Connect the data inputs and
we to level switches.
Use the address counter and the write-enable switch to program your
memory to any desired sequence of hex digits (be sure to record what
sequence you choose). If you apply some ingenuity, you can spell out
messages using the letters A–F plus I (1) and O (0) (e.g., FEED B0B
A D10DE). Then clock the address counter with a digital clock at a
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165 12 Monostables, counters, multiplexers, and RAM
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13 Digital↔analog conversion
In this chapter we will study simple techniques for generating and read-
ing voltage or current levels, i.e., converting between analog (voltage or
current) and digital (binary-number) information. The availability of high-
speed, easy-to-use, inexpensive digital⇒analog and analog⇒digital con-
verter chips has dramatically changed the way audio and video information
are recorded and processed, as well as how computers are used in laboratory
research and process control. The process of converting digital information
into voltages or currents whose magnitudes are proportional to the digitally
encoded numbers is called digital-to-analog (D/A) conversion. The reverse
process is called analog-to-digital (A/D) conversion. The devices that carry
out these conversions are called DACs and ADCs, respectively.
In this chapter, after building a simple DAC from a digital counter and an
op amp, you will continue your exploration of analog/digital conversion by
building a 4-bit tracking ADC. Having learned the basic operating princi-
ples, you’ll use an ADC080x 8-bit successive-approximation A/D chip to
digitize (i.e., convert to digital) an arbitrary AC signal. The original signal
will then be re-created from the digitized data using a DAC080x D/A chip.
This exercise will also allow you to explore the limitations of ADC and
DAC operations.
Please be sure to work through these circuits in advance, otherwise it
is highly unlikely that you will successfully complete the exercises in a
timely fashion! Carefully study the manufacturer’s data sheets which pro-
vide extensive details on operation and performance. As always, complete
schematic diagrams significantly improve debugging efficiency.
Apparatus required
Breadboard, oscilloscope, 74191, TIL311, 311 comparator, 741 op amp,
resistors, capacitors, DAC0806 (or similar), ADC0804 (or similar), 7400,
7432, four 7474, 74112, 74138.
167
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168 Hands-on electronics
8R
D0
4R
D1 0 Volts (0000)
R1
2R
D2 R = R1 VH = 5 V
R VL = 0 V
_
D3
op amp Analog Out
+
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169 13 Digital↔analog conversion
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170 Hands-on electronics
To measure an analog signal you need to invert the process of D/A conver-
sion. There are various ways of doing this, but, just as division is harder and
slower than multiplication, and taking the square-root harder and slower
than squaring, analog-to-digital conversion is harder and often slower than
digital-to-analog.
Given a DAC, a counter, and a comparator, a simple approach is to
increment the counter (starting from zero) until the DAC output crosses the
analog input. Using the comparator to compare the analog input to the DAC
output, you stop counting when the comparator output switches states. At
that point, the counter holds a digital approximation to the magnitude of
the input.
A simple variant of this circuit will follow (or ‘track’) changes in the
input voltage. You can turn your 4-bit counter/DAC into such a tracking
ADC by driving u/d from a comparator that compares the DAC output with
the analog input voltage.
Use a potentiometer to make the analog input voltage: connect one end
to ground and the other to −15 V. The slider controls the input volt-
age, which you can vary between 0 V and −15 V. To stabilize the op-
eration of the circuit, use some hysteresis by connecting a series 10 k
resistor between the input voltage and the comparator noninverting in-
put and 1 M between the comparator output and the noninverting input
(see Fig. 13.2).
Clock the counter at a few hertz and observe its state with the TIL311
as you vary the input voltage. What do you observe?
How should the comparator inputs be configured: which signal should
go to the inverting and which to the noninverting input? Is the output
number ‘homing in’ on the expected value? If not, did you perhaps
connect the comparator backwards? Explain, and if you did it wrong the
first time, fix it.
Record the output numbers for a few different input voltages.
Why is the output number never stable? How (if at all) does this affect
the precision of the voltage measurement?
Note that the tracking ADC is slow at following large input-voltage changes,
since it has to count through all the intermediate values, but it has good
performance if the input voltage changes gradually.
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171 13 Digital↔analog conversion
U/D 22 kΩ
QA
Clk
10 kΩ +5
QB 3.3 kΩ
+5 Load
QC 1 kΩ
Enable 4.7 kΩ
_
QD
74191 2.2 kΩ op amp
+ comp
Analog In
10 kΩ
1 MΩ
Fig. 13.2. Simple A/D converter. (The polarity of the comparator inputs is left as an
exercise for the reader.)
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172 Hands-on electronics
ADC080x
The ADC080x series of chips are inexpensive 8-bit successive-
approximation A/D converters. The logic inputs and outputs are compat-
ible with both TTL and CMOS, and the outputs have tri-state capability.
The chips are general-purpose ADCs that can be used as stand-alone
converters or interfaced with a computer or other logic system. They accept
differential inputs for increased common-mode-noise rejection capability.
The digitized output thus measures the voltage difference Vin+ − Vin− .
The successive-approximation algorithm used in these chips requires
sixty-four clock cycles to complete a conversion. A few additional clock
cycles are used during startup and after the conversion to latch the data on
the output lines. The clock can originate from either an external or internal
(‘self-clocking’) source. The self-clocking option uses an on-chip oscillator
(with Schmitt-trigger timing input), in combination with an external resistor
and capacitor that determine the period, as shown in Fig. 13.3.
All of the input and output control signals are active-low. There are three
input control lines, labeled cs, rd, and wr. An A/D conversion is started
(a) (b)
+5 V
CLK R
CS VCC 19
WR D0 (LSB)
CLK IN
CLK IN D1 4
A GND D5
Vref /2 D6
D GND D7 (MSB)
ADC080X
Fig. 13.3. (a) Pinout for the ADC080x series of A/D converters. (b) The on-chip
self-clocking configuration. Note the locations of the most significant bit (MSB) and the
least significant bit (LSB). The ‘x’ in ADC080x means that multiple versions of this IC
exist (e.g. ADC0804).
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174 Hands-on electronics
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175 13 Digital↔analog conversion
−15V
C = 0.1 µF
N.C. COMP
4.7 kΩ
4.7 kΩ GND Vref(−)
VEE Vref(+)
_ Output 4.7 kΩ
IQ VCC
Vout Op Amp +5 V
+ (MSB) A0 A7 (LSB)
A1 A6
Inputs Inputs
A2 A5
A3 A4
DAC0806
Fig. 13.4. Pinout for the DAC080x series of D/A chips (with an output op amp added).
Note that the bit order is the reverse of that used for the ADC080x, such that A0 is the
MSB and A7 the LSB.
also has eight resistors, but their tolerances are not as good, such that the
DAC0806 is not guaranteed to put out 256 distinguishable voltage levels,
but only sixty-four.
These chips also contain circuitry to buffer the input signals and stan-
dardize their voltage levels, to avoid inaccuracies due to voltage variations
in logic levels on different input lines. Consult the manufacturer’s data
sheet to see what else your D/A converter chip contains.
Wire up a DAC080x chip as shown in Fig. 13.4. This configuration will
give an output voltage between 0 and +5 V. Connect the outputs of the
ADC you built above to the inputs of the DAC.
What is the output voltage that corresponds to the DAC digital input
00000001? What is the output voltage that corresponds to the digital
input 11111110? Take a few more data points and plot output voltage
versus digital input. Comment on your results.
Measure the precision of your DAC. Does it match the specified
precision?
Be sure to write down a complete circuit diagram with pin numbers.
Explain in your own words how this circuit works. Comment on your
observations and measurements.
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176 Hands-on electronics
+5 V
R = 100 kΩ
C = 100 µF R
C _
+ Op Amp
Vin + To A/D input
V R V
t
Fig. 13.5. Method for producing a DC-shifted waveform.
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177 13 Digital↔analog conversion
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178 Hands-on electronics
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179 13 Digital↔analog conversion
7 6 5 4 3 2 1 0
E3
E2 74138
E1
A2 A1 A0
R R Q3 Q2 Q1 Q0
J Q J
Q LD
Start Convert 74191 U/D
+5
P 3 P2 P 1 P 0 E
K K Q
clk
Done
triggered: can the clock signal to the ’191 glitch (i.e. have a pulse of sub-
standard width – see discussion in section 12.3.2)? Why, or why not?
Begin by building and debugging the control logic by itself – but be
sure to leave room for the additional chips! (If you prefer, you may choose
to build and analyze the simpler control logic described below.) Try to
arrange the chips and connecting wires neatly, so that it is easy to see
where each wire goes – some color-coding could be helpful. In case a chip
needs to be replaced, try to avoid overly tight wiring across the top of
any chip.
Clock your control circuit with a digital square wave from the function
generator, and provide the ‘start convert’ signal with a debounced
push-button. You should be able to see the full timing sequence on the
oscilloscope. Trigger the scope on the output of the second flip-flop and
observe each of the other signals as you repeatedly issue ‘start convert.’
Verify that your timing diagram is correct.
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180 Hands-on electronics
A0 A1 A2 A3 A4 A5 A6 A7
74112 74112
reset
How good is your ADC? Is it linear? What is its zero offset (the number
it puts out for Vin = 0), and what is its slope constant (volts per output
count)? What is its least count (the voltage change corresponding to one
ADC count)? What is its full-scale voltage?
Try raising the clock frequency. At what frequency does it stop working?
Does this make sense? What do you think limits the conversion speed of
this circuit? (Illustrate your answer with the relevant timing diagram.)
Will this ADC always work correctly the first time after power is turned
on? Why, or why not?
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181 13 Digital↔analog conversion
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Further reading
Key:
D. & H.: A. James Diefenderfer and Brian E. Holton, Principles of Electronic Instrumen-
tation (Saunders, 1994);
Barnaal: Dennis Barnaal, Analog Electronics for Scientific Application and Digital
Electronics for Scientific Application (reissued by Waveland Press, 1989);
H. & H.: Paul Horowitz and Winfield Hill, The Art of Electronics (2nd edition, Cambridge
University Press, 1989);
Simpson: Robert E. Simpson, Introductory Electronics for Scientists and Engineers
(2nd edition, Prentice-Hall, 1987).
183
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Appendix A
Equipment and supplies
Analog components
1
Resistors, 4
W Number required Capacitors Number required
33 1 50 pF 1
68 1 100 pF 1
100 3 300 pF 1
330 2 0.0047 F 1
560 1 0.01 F 1
820 1 0.033 F 3
1 k 2 0.1 F 1
2.2 k 1 0.47 F 1
3.3 k 3 1 F 1
4.7 k 3 100 Fb 1
10 k 7 1000 Fb 1
22 k 2
100 k 2
330 k 1
1 M 1
10 M 1
1 ka 1
a
2 W resistor.
b
50 V capacitor.
185
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186 Hands-on electronics
Miscellaneous
four alligator clips;
two fat-pin adapter sockets.
Digital components
7400 1
7404 1
7432 1
7474 4
7485 1
7486 1
7489 1
7490 2
7493 1
74112 1
74121 1
74138 1
74150 1
74191 1
74373 1
DAC0806 1
ADC0804 1
TIL311 2
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187 Appendix A. Equipment and supplies
Suppliers of parts
There are numerous companies selling electronic components and supplies. Most allow
customers to purchase small quantities directly over the web. Prices are reasonable and
service is excellent. Several (e.g., Digi-Key Corp) even have links to product data sheets as
part of their online catalog. Product information, availability, and pricing are easily found
through a few quick web searches. We’ve included a few URLs to help get you started.1 At
the time of going to press, the parts and supplies needed to complete the exercises within
this book could be purchased from the companies below. Pricing and availability may vary,
so shop around!
RadioShack
http://www.radioshack.com/
Digi-Key Corp
http://www.digikey.com/
Newark Electronics
http://www.newark.com/
Tequipment
http://www.tequipment.net/
Electronix Express
http://www.elexp.com/
Arrow Electronics
http://www.arrow.com/
Jensen
http://www.jensentools.com/
1 The publisher has used its best endeavors to ensure that all URLs referred to in this book are correct
and active at the time of going to press. However, the publisher has no responsibility for the websites
and can make no guarantee that a site will remain live or that the content is or will remain appropriate.
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Appendix B
Common abbreviations and circuit symbols
Order-of-magnitude prefixes
m = milli = 10−3
= micro = 10−6
n = nano = 10−9
p = pico = 10−12
f = femto = 10−15
k = kilo = 103 (or kilohm = 103 )
M = mega = 106 (or megohm = 106 )
G = giga = 109
T = tera = 1012
Mathematical symbols
∼ of order
≈ approximately equal to
≡ equals by definition
change in
⇒ implies
Electrical terms
β = h FE = transistor current gain
ω = angular frequency
= ohm
A = ampere
AC = alternating current
C = coulomb
C = capacitance
dB = decibel
DC = direct current
F = farad
188
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189 Appendix B. Common abbreviations and circuit symbols
f = frequency
gm = transconductance
H = henry
Hz = hertz
I = current
L = inductance
P = power
Q = quality factor (of a bandpass filter)
R = resistance
V = volt
VCC = most positive voltage in a circuit (positive supply voltage)
VEE = most negative voltage in a circuit (negative supply voltage)
X = reactance
Z = impedance
Electrical devices
ADC analog to digital converter
C symbol used in schematics for a capacitor
CMOS complementary-MOSFET integrated-circuit family
CRT cathode-ray tube
DAC digital to analog converter
ECL emitter-coupled-logic integrated-circuit family
FET field-effect transistor
JFET junction FET
L symbol used in schematics for an inductor
MOSFET metal-oxide-semiconductor FET
op amp operational amplifier
Q symbol used in schematics for a transistor; can also refer to the latched output
of a flip-flop or register
R symbol used in schematics for a resistor
SPDT single-pole-double-throw switch
SPST single-pole-single-throw switch
TTL transistor–transistor-logic integrated-circuit family
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190 Hands-on electronics
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Appendix C
RC circuits: frequency-domain analysis
V = VR + VC . (C.4)
Now, by Ohm’s law, VR = I R, and we also have VC = Q/C = (1/C) I dt. Substituting
these relations into Eq. C.4,
1 t
V = IR+ I dt (C.5)
C t0
1 t
= I0 R sin (ωt + φ) + I0 sin (ωt + φ) dt, (C.6)
C t0
where we have made use of Eq. C.3.
191
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192 Hands-on electronics
We can easily carry out the integration in Eq. C.6 using the substitution u = ωt + φ,
giving
ωt+φ
I0
V = I0 R sin (ωt + φ) + sin u du (C.7)
ωC ωt0 +φ
I0
= I0 R sin (ωt + φ) − [cos (ωt + φ) − cos (ωt0 + φ)]. (C.8)
ωC
The constant of integration, cos (ωt0 + φ), can be determined by the condition V (0) = 0,
which we assumed in writing Eq. C.2:
I0
V (0) = 0 = I0 R sin φ − [cos φ − cos (ωt0 + φ)], (C.9)
ωC
giving
thus
I0
V = I0 R sin (ωt + φ) − [cos (ωt + φ) − (cos φ − ω RC sin φ)] (C.11)
ωC
I0
= I0 R[sin (ωt + φ) − sin φ] − [cos (ωt + φ) − cos φ], (C.12)
ωC
which clearly satisfies V (0) = 0.
Eq. C.12 can be simplified using the trigonometric identities for sines and cosines of
sums:
1
φ = tan−1 . (C.16)
ω RC
Eq. C.14 can be simplified as
I0
V0 = I0 R cos φ + sin φ. (C.17)
ωC
1 Otherwise we could divide through by the constant to obtain cos ωt = 1, which clearly does not
describe the behavior of the circuit.
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193 Appendix C. RC circuits: frequency-domain analysis
I0
I0 R
φ ωC
φ V0
I0
I0 R cos φ sin φ
ωC
Fig. C.2. Right triangle represented by Eq. C.17, illustrating that V0 = I0 R cos φ +
I0
ωC
sin φ.
This describes a right triangle with hypoteneuse of length V0 and sides of length I0 R
and I0 /ωC (Fig. C.2), which is a useful way of visualizing the relationship among the
amplitudes of the source voltage, resistor voltage, and capacitor voltage. The relationship
is Pythagorean:
I0 2
V02 = (I0 R)2 + . (C.18)
ωC
We thus have
V0
I0 = 1 2 . (C.19)
R + ωC
2
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Appendix D
Pinouts
V+ V+
7 1 GND V+ 8
8
85 2 _ 3 _
2N 2N 54 0L
2N T 061 ET 2 Trigger Discharge 7
3 90
4
390
6
JF
E SF 741 or 411 6 311 7
MO
op amp comparator
3 2 1 3 Out Threshold 6
+ +
4 4
B C B C S G S G
D 4 Reset Control 5
E E D V- V-
555 TIMER
1 +5 14 1 +5 14 1 +5 14 1 +5 14 1 +5 14
2 13 2 13 2 13 2 13 2 13
3 12 3 12 3 12 3 12 3 12
4 11 4 11 4 11 4 11 4 11
5 10 5 10 5 10 5 10 5 10
6 9 6 9 6 9 6 9 6 9
7400 Quad NAND 7408 Quad AND 7404 Hex INVERTER 7432 Quad OR 7486 Quad XOR
7489 16 x 4 RAM
74191 Four-Bit Counter 74121
1 +5 +5 14
Monostable
7 6 2 3 Rext 12 11
2 D1 D2 13 +5: pin 14 D I4 DO4
5 QD QC QB QA Cext
GND: pin 7 10 9
U/D 13 11 10 D I3 DO3
3 D0 D3 12 4 RC
6 7
Enable 12 D I2 DO2
Max/Min 6
4 DPL 14 3 Q 4 5
CLK A1 D I1 DO1
A2 Trigger
4 B 5 1 3
5 LE DPR 10 Q WE +5: pin 16
Load DD DC DB DA
2 GND: pin 8
TIL 311 11 9 10 1 15 ME
+5: pin 16 A B C D
7 GND BI 8 GND: pin 8 1 15 14 13
194
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195 Appendix D. Pinouts
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Glossary of basic electrical and
electronic terms
197
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198 Hands-on electronics
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Index
β, 48–50 differential, 86
h FE , 48–50 exponential, 105
Q, 124 grounded-emitter, 59
rBE , 53, 57 inverting, 168
re , 52, 57 op amp, 88
VBE , 50, 52 logarithmic, 105
VCB , 50 noninverting, 89
VCE , 51 op amp, 89
operational, 79, 85
−3 dB point, 26 amplitude, 13, 17, 18
2N3904 pinout, 54 analog, 167
2N3906 pinout, 54 analog information, 167
2N5485 pinout, 69 analog-to-digital conversion, 167
311 comparator, 114 analog-to-digital converter, 167
311 pinout, 114 anode, 35, 54
555 timer, 118, 156 arithmetic, binary, 125, 126, 141
7400 IC series, 125 assertion-level logic, 127, 146
741 op amp, 85 assertion-level logic notation, 146
741 pinout, 86 astable multivibrator, 120, 156
74121 monostable, 156, 159 asynchronous counter, 151, 157
74121 pinout, 159 attenuating probe, 10
74138 decoder, 178 attenuation, 10, 26, 77
74150 mux, 162 attenuator, 76, 77, 91
74150 pinout, 162
74191 counter, 168 bandpass filter, 123
7489 RAM, 163 bandwidth, 87
7489 pinout, 163 base, 48
BCD counter, 157
AC coupling, 43 bi-quinary counter, 157
acceptor, 32 bias current, 94
active bandpass filter, 123 binary addition, 141
active differentiator, 102, 106 binary arithmetic, 125, 126, 141
active filter, 123 binary counter, 156, 157
active integrator, 103, 107 binary search algorithm, 171
active rectifier, 108 binary-coded decimal, 157
ADC, 167 bipolar junction transistor, 47
successive-approximation, bistable multivibrator, 143, 156
171 blocking capacitor, 56
tracking, 170 Boolean algebra, 126, 140, 141
addition, binary, 141 bounce, contact, 152
algebra, Boolean, 126, 140, 141 breadboard, 2
alternating current, 15 breadboard LED indicators, 137
ammeter, ideal, 39 breadboard level switches, 137, 138
amplifier, 50 breakpoint, 26
common-emitter, 57 buffer, 55
difference, 95 push–pull, 62
199
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200 Index
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201 Index
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202 Index
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203 Index
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204 Index
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