Powerex, Inc.

, 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

4.0 Using IGBT Modules 4.1 Structure and Operation A brief comparison between the
of IGBT Module structures of the IGBT, MOSFET
Powerex IGBT modules are and npn Bipolar Junction
designed to be rugged, low loss The IGBT, Insulated Gate Bipolar Transistor (BJT) is depicted in
and easy to use. Use of advanced Transistor, is a switching transistor Figure 4.1. The npn BJT is a three
processing technologies gives low that is controlled by voltage junction device that requires a
on-state saturation voltages while applied to the gate terminal. continuous current flowing into the
maintaining the high switching Device operation and structure are base region to supply enough
speed needed for 20kHz operation. similar to those of an Insulated charges to allow the junctions to
The information presented in this Gate Field Effect Transistor, more conduct current. Because the
section is intended to help users of commonly known as a MOSFET. MOSFET and the IGBT are
Powerex IGBT modules apply the The principal difference between voltage controlled devices, they
devices effectively and reliably. the two device types is that the only require voltage on the gate to
IGBT uses conductivity modulation maintain conduction through the
to reduce on-state conduction device. The IGBT has one junction
losses. more than the MOSFET, and this

Figure 4.1 Three Major Device Technologies

npn POWER BIPOLAR n-CHANNEL POWER MOSFET n-CHANNEL POWER IGBT

B E G S G E

SiO2 SiO2
n+
n+ n+
p
p p

n– n– n–

n+

n+ n+ p+

C D C

E S E

G G
B

C D C

Low on-state drop conductivity modulation High on-state drop for majority carrier Medium on-state drop for conductivity
condition modulation
Current control device, large drive power
Voltage control drive, small drive power Voltage control drive, small drive power
Medium fast switching
Very fast switching Fast switching

Advantage Disadvantage

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Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

junction allows higher blocking collector bulk region (n+ buffer lifetime control techniques are used
voltage and conductivity layer and collector “n” region). The to reduce the gain of the “pnp”
modulation, as described below, charges reduce the collector bulk bipolar element and minimize
during conduction. This additional region resistance and thus lateral RBE values, thus precluding
junction in the IGBT does limit collector to emitter voltage drop is latch-up. Therefore, the equivalent
switching frequency however. reduced (relative to VDS(on) of circuit model of a Powerex IGBT
MOSFET). is reduced to the schematic in
4.1.1 Silicon Structure Figure 4.3B.
When a positive gate voltage is first
The IGBT silicon structure is as applied, a gate current flows until 4.1.3 Wafer Processing
shown in Figure 4.2. A positive the gate capacitance is charged
voltage on the gate attracts and the gate voltage rises to the IGBT wafer processing is similar to
electrons from the “p” gate region “on” level. When the gate voltage is FET processing. The silicon
towards the silicon surface under removed, the charges injected into material is a dual epitaxial
the gate. These electrons invert the collector bulk region must be structure, and gate and emitter
the “p” directly under the gate to removed before high voltage can regions are diffused and/or ion
form an “n” region, thus creating a be blocked. implanted into the emitter side.
path for charge flow between the Selective doping, electronic
“n” collector region and the “n” The IGBT surface emitter pattern is irradiation, and other processing
emitter region. A zero or negative striped geometrically, in contrast to techniques are used during
voltage (depends on the device) the FET cell-based geometry. The emitter-side processing.
on the gate maintains the off-bias. IGBT uses the same small feature
size advantages of the MOSFET, Many of the same processing
4.1.2 Device Operation but the striped geometry offers techniques used to fabricate FET
more ruggedness and immunity devices are employed in IGBT
When the device is on, the from latch-up of the parasitic manufacture. The high di/dt and
collector is at a higher voltage than thyristor shown in Figure 4.3A. dv/dt capabilities of the FETs
the emitter, and therefore minority result from the control of minority
carriers are injected from the A circuit model of a typical IGBT is carriers near the gate “p” region
collector p+ region into the illustrated in Figure 4.3A. Powerex and collector “n” region interface.
IGBTs use optimized buffer layer, The same techniques plus
Figure 4.2 IGBT Cross Section
p± well doping and alignments, additional steps to control carrier
and Silicon Structure
gate structure, and surface pattern lifetime near the collector N+ buffer
E designs. Minority carrier region help to generate immunity
LG from latch-up and to enhance the

G
Figure 4.3 IGBT Internal Parasitics
n+ e e n+ A. MODEL OF CONVENTIONAL TYPE B. MODEL OF POWEREX RUGGED IGBT
p+ p p p+
C C
Rb
RMOD RMOD

n–
n+

p+ G RBE G RBE

C C
C E E
HOLES
e ELECTRONS VCE(sat) = VBE + IMOS • RMOD + IMOS • rDS(ON)

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 Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

Figure 4.4 Structure of Powerex IGBT Module and Module Base Plate Construction
(A) EMITTER COLLECTOR (B)
COMMON (C2E1) (E2) (C1)
GATE AND IGBT, FWD CHIP
CASE EMITTER COPPER NEW
(EPOXY RESIN) (G1, E1, G2, E2) INSULATING
PLATE

BASE H-SERIES
INSULATION MATERIAL
IGBT MODULE
COPPER SEMICONDUCTOR CHIP
TERMINAL COLLECTOR PLATE
EPOXY
RESIN ALUMINUM BASEPLATE CONVENTIONAL
WIRE BASE INSULATION PLATE POWER MODULE
SILICONE NEW INSULATING BASE
GEL SILICON CHIP (ALN ISOLATOR)

Figure 4.5 Cross Section of U-Package IGBT Module 4.1.5 Features of U-Package
MAIN TERMINAL ELECTRODE COVER
IGBT Modules
SILICONE GEL INSERT MOLDED CASE
A new IGBT module package
called “U-Package” was developed
by Mitsubishi Electric in alliance
with Powerex in 1996. The new
package technology achieves a
significant reduction in internal
inductance and improved reliability
over older designs. The time
AL BOND WIRES CU BASE PLATE POWER CHIPS AIN SUBSTRATE
required to assemble the new
module was substantially reduced
switching ruggedness of Powerex minimizing thermal impedance. by using a special case that has
IGBTs. Ultra clean facilities and Powerex IGBT modules use the power electrodes molded into
in-line wafer testing promote materials with similar thermal its sides rather than inserted after
consistent processing, thus coefficients of expansion so that the case is molded. Figure 4.5 is a
ensuring chips of the highest thermal stress is limited. Thus cross section drawing of the new
quality and reliability. these IGBT modules can be IGBT module package. The main
expected to provide improved electrodes are connected directly
4.1.4 Module Packaging thermal cycle life over existing to the power chips using large
Construction and Layout power transistor modules. diameter aluminum bonding wires.
In order to help simplify power
IGBT modules consist of Free-wheeling diodes are also circuit and snubber designs or
multiple IGBT chips mounted on mounted in the module for ease possibly eliminate the need for
an isolated substrate, which is of system assembly and to allow snubbers altogether an effort was
itself mounted on a heatsinking minimum lead inductance, both made to minimize the inductance of
copper base plate as shown in inside and outside the module. the new U-Package. A variety of
Figure 4.4A. Interconnection inside the modules techniques were used to reduce
is accomplished with rigid bussing each component of the package
Powerex IGBT modules use an to ease assembly. Rigid bussing inductance. One of the most
isolating ceramic substrate with also offers symmetric layout of significant improvements was
copper patterns metallurgicly internal components so the made possible by the new insert
bonded to the top and bottom parasitic inductance is reduced molded case design. Wide
surfaces. (Figure 4.4B). This and module ruggedness is electrodes are molded into the side
mounting method allows highly enhanced. of the case to form parallel plate
automated module assembly while

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structures that have considerably the conventional module the chip to stress during manufacturing and
less inductance than conventional substrate and substrate to base improved power cycle reliability.
electrodes. In addition, the strain plate soldering is done first with
relieving “S” bends that were high temperature solder. Then the 4.2 IGBT Module Ratings
needed in the electrodes of case is attached to the base plate and Characteristics
conventional modules are not and a second low temperature
needed in the U-Package because soldering step is used to connect The ratings as shown in
the aluminum bond wires perform the power electrodes. In the new Section 4.2 are most important
the strain relieving function. module the second step is not for IGBT's operation and
Elimination of these “S” bends needed because the connections environment. A maximum rating
helped to further reduce the to the power electrodes are made is a value which establishes either
electrode inductance. Overall, as a using the aluminum bond wires. a limiting capability or limiting
result of these inductance reducing The soldering temperature of the condition (either maximum or
features the U-Package modules chip and substrate attachment can minimum). It is determined for a
typically have about one third the be reduced. The lower soldering specified value of environment
inductance of conventional temperature minimizes the effects and operation. Therefore, you
modules. A further reduction in of the mismatched coefficients of cannot use the IGBT module
assembly time was achieved by expansion between the base plate beyond its maximum or minimum
reducing the number of soldering and the AlN DBC substrate. The rating's value.
steps during manufacturing. With result is a reduction in thermal

4.2.1 Absolute Maximum Ratings

Symbol Parameter Definition
VCES Collector-Emitter Blocking Voltage Maximum off-state collector-emitter voltage with gate-emitter shorted
VGES Gate-Emitter Voltage Maximum gate-emitter voltage with collector-emitter shorted
IC Continuous Collector Current Maximum collector current
ICM Peak Collector Current Repetitive Peak collector current, Tj ≤ 150°C
IE Continuous Diode Current Maximum diode current
IEM Peak Diode Current Repetitive Diode peak current, Tj ≤ 150°C
PD Power Dissipation Maximum power dissipation, per device, TC = 25°C
Tj Junction Temperature Allowable range of IGBT junction temperature during operation
VISO Isolation Voltage Minimum RMS isolation voltage capability applied electric terminal to base plate,
1 minute duration
Mounting Torque Allowable tightening torque for terminal and mounting screws

4.2.2 Electrical Characteristics

Symbol Parameter Definition

Static
ICES Collector-Emitter Leakage Current IC at VCE = VCES, VGE = 0, gate-emitter shorted, Tj = 25°C
IGES Gate-Emitter Leakage Current IG at VGE = VGES, VCE = 0, collector-emitter shorted, Tj = 25°C
VGE(th) Gate-Emitter Threshold Voltage VGE at IC = specified mA, VCE = 10V
VCE(sat) Collector-Emitter Saturation Voltage VCE at IC = rated IC and VGE = 15V
QG Total Gate Charge Charge on gate at VCC - 0.5~0.6VCES, rated, IC = rated IC, VGE = 15V
VFM Diode Forward Voltage Diode voltage at IC = -rated IC, VGS = 0V

Dynamic
Cies Input Capacitance Gate-emitter capacitance with the collector shorted to the emitter
Coes Output Capacitance Collector-emitter capacitance with the gate shorted to the emitter
Cres Reverse Transfer Capacitance Gate-collector capacitance with the emitter connected to the guard terminal of
the impedance analyzer

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4.2.2 Electrical Characteristics (Continued)

Symbol Parameter Definition

Dynamic (Continued)
Itd(on) Turn-on Delay Time Time from VGE = 0V to IC = 10% of final value
tr Rise Time Time from IC = 10% of final value to IC = 90% of final value
td(off) Turn-off Delay Time Time from VGE = 90% of initial value to IC = 90% of initial value
tf Fall Time Time from IC = 90% of initial value to IC = 10% of initial value
trr Diode Reverse Recovery Time Time from IC = 0A to projection of zero IC from Irr and 0.5 Irr points with
IC = -rated IC and at specified di/dt (Refer to Figure 4.6)
Qrr Diode Reverse Recovery Charge Area under Irr curve from IC = 0A to projection of zero IC from Irr and
0.5x Irr points with IC = rated IC and at specified di/dt (Refer to Figure 4.6)

4.2.3 Thermal Characteristics

Symbol Parameter Definition
Rth(j-c) Thermal Resistance, Junction to Case (Tj - TC)/(IC-X VCE), IC conducting to establish thermal equilibrium
Rth(c-f) Thermal Resistance, Case to fin (TC - Tf)/(IC X VCE), IC conducting to establish thermal equilibrium lubricated

Figure 4.6 Reverse Recovery Measurement Circuit and Waveform Figure 4.7 VCE (SAT) Test

trr C
CURRENT
MONITOR RG
IF
VCE V IC
D.U.T.

L Irr
E
0.5 Irr
Qrr = 1/2 Irr trr
IF
VCC Figure 4.8 VCE Test
IF
t
Irr C

IC
V IC

4.2.4 Test Circuits and as low duty factor pulsed tests. Figure 4.9 Resistive Load
Conditions (See Figures 4.7 and 4.8) Switching Test Circuit

The following test circuits are used 2. Resistive Load Switching Test lC

to evaluate IGBT characteristics. Circuit. (See Figure 4.9)

1. VCE(SAT) and VEC 3. Half-Bridge Switching Test RLOAD

To ensure specified junction Circuit (See Figure 4.10)

temperature, Tj, VCC
measurements of VCE (SAT) RG
+VGE1
and VEC must be performed

-VGE2

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Figure 4.10 Switching Time Figure 4.11 Half-bridge Switching Test Circuit
Waveform

VGE
90%

0 t
SHORT

lE VCC
lC
90%

+VGE1 RG

10% lC
0 -VGE2
t
td(off)
td(on) tr tf

4.3 Safe Operation Area MOSFET channel window gets the Powerex IGBTs by careful
blocked and injection of electrons optimization of the device
Protecting IGBTs against cease. Removal of the stored geometry.
disturbance caused by over minority carriers (holes) in the
currents or over voltage is an “n” base region starts, and during The switching SOA curve is the
important design topic in most this interval, the parasitic wide locus of points defining the
switching applications. In the case base pnp transistor operated by maximum allowable simultaneous
of all hard switching applications, virtue of its current gain occurrence of collector current and
such as inverter or chopper circuits characteristics causing the collector to emitter voltage during
for motor controls and transformer collector current to continue turn-off. Figure 4.14 shows that
loads, the turn-off switching SOA flowing. Thus, the later part of the Powerex IGBTs offer square
and short circuit capability are the IGBT turn-off fall current, is mainly switching SOA for 600V and
two most important ratings of due to the hole current. Some of 1200V devices at 2X rated current.
IGBTs today. the holes in the “n” base region
continues to cross through the The curves show that independent
4.3.1 The Turn-off Switching C-B junction of the parasitic npn of VCE, the device current must
SOA of IGBT transistor and travel horizontally be kept below 200% rated
below the “n” emitter layer as current. This limit is due to the
The turn-off switching SOA is shown in Figure 4.13. designed current density of the
similar to RB SOA (Reverse Bias chips and internal connections in
SOA) of Darlington transistors. This flow of holes causes a the module.
The switching operation for a potential drop across the “p” body
typical inverter bridge circuit resistance, RD, and tends to 4.3.2 Short Circuit SOA
as shown in Figure 4.11, will activate the npn transistor. A
generate the current and voltage turn on of the npn transistor, Most power conversion
waveform illustrated in Figure 4.12. while the pnp transistor is still applications require that the
In turning off an inductive load active, can lead to pnp thyristor applied switch should survive
current, the voltage rise precedes latch-up, which means loss of a short circuit on the system
the current fall. As the gate gate control and, eventually, output without any damage.
voltage reduces below its destruction of the device. This When considering short circuit
threshold value, the intrastructural problem has been eliminated in withstand capability of IGBT

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Figure 4.12 Switching Waveforms (Half-bridge Mode) modules, two distinguishing

RG=3.9 ohm cases are generally reviewed:
TURN-ON TURN-OFF
50A/div 50A/div Case-1 – Switching on of an
100V/div 100V/div
50nS/div T 50nS/div IGBT into a short circuit,

VCE IC
T Case-2 – Load or groundfault
short circuit across a
T switched on IGBT.
IC T VCE
O
Figure 4.15 shows the circuitry
and waveforms for each case.

In Case-1, as the IGBT turns

Figure 4.13 High Injection On-state Electron and Hole Currents on, initial rate of rise of IC is
within an IGBT Structure determined by the wiring
EMITTER GATE inductance, L. Also, the voltage,
VCE, drops to some value below
VCC as the L discharges. Soon
after this, VCE switches back to
almost full VCC level. The dv/dt at
this switch back is coupled to the
N°
gate through the reverse transfer
P RB
capacitance thus causing a
momentary rise of gate
HOLE
N° e voltage.This extra gate voltage
mobilizes more electron and hole
N° plasma within the IGBT module
P° structure. The effect of this
translates to a higher peak
collector current within a couple of
microseconds. The circuit design
COLLECTOR
(e.g. layout, bias condition,
selection of Rg, maximum supply
Figure 4.14 Turn-off Switching SOA
voltage, etc.) is important to
LIMIT FOR LIMIT FOR LIMIT FOR LIMIT FOR
limit the short circuit current
250V 600V 1200V 1400V
CLASS CLASS CLASS CLASS
LIMIT FOR
1700V
magnitude in this high injection
(-5F) (-12F, (-24F, (-28H)
-12H) -24H) CLASS
(-34H)
state. Due to high current density
COLLECTOR CURRENT, IC, (NORMALIZED TO MODULE RATING)

2X within the silicon, the internal

temperature rises and it causes the
CONDITIONS: high short circuit peak current to
Tj = 25∼125°C
VGE = ±15V reduce to a lower value which
RG = SEE TABLE 4.2
RECOMMENDED RANGE
corresponds to what is called a
VCC ≤ 150V (5F) saturation current. To protect the
1X 400V (12F, 12H)
800V (24F, 24H) device from destruction, the
1000V(28H)
1100V (34H)
current has to be cut off within a
specified period, which is normally
specified by the input gate pulse
width, tw. At turn-off, a sharp fall of
0 collector current in the presence of
0 200 400 600 800 1000 1200 1400 1600
COLLECTOR-EMITTER VOLTAGE (VOLTS)
the wiring inductance, L1, causes

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VCE to shoot up by an amount Case-1 and is coupled back Cautions:

equivalent to: through the reverse transfer 1. SCSOA is valid for gate pulse
capacitance, which is now higher at width, tW, ≤ 10µs
∆VCE ≈ L1 X diC/dt. the low on-state voltage, and may 2. SCSOA is a non-repetitive
result in a higher momentary rise of capability. Powerex IGBT
The instantaneous value of gate voltage. As a result the modules can survive up to 100
collector-emitter voltage, VCE, magnitude of the short circuit in short circuit events on a
including this surge peak value Case-2 can reach significantly non-repetitive basis over the
must not be allowed to go beyond higher values than in Case-1. life of the equipment.
the specified voltage limit given by
SCSOA as shown in Figures 4.16, In Figures 4.16, 4.17, 4.18, 4.19,
4.17, 4.18, 4.19, and 4.20. and 4.20, the short circuit self
limitation in Case-1 is shown as
In Case-2 short circuit an external the dark area. Careful precautions
short circuit occurs while the IGBT must be considered in Case-2 to
is already in the on state. as shown prevent the short circuit current
in Figure 4.15B) The increasing magnitude going beyond a
short circuit forces the IGBT chip to magnitude of ten times the rated
desaturate causing the collector- current as an absolute limit
emitter voltage to rise from (shaded area in Figures 4.16, 4.17,
VCE(SAT) to almost full VCC. The 4.18, 4.19, and 4.20).
dv/dt during IGBT desaturation
may be higher compared to

Figure 4.15 Cases of Short-circuit

L11

(A) (B)
LI lC
CASE-1 CASE-2
Q1 (on) C
SHORT-CIRCUIT lC (OFF) SHORT-CIRCUIT
G
C
RG VCC
G
VCE VCC
VGE E
L12

(OFF)
Q4 (on)
SHORT
VCE
∆VCE
dv/dt VCE
IC VCE(pk)
VCE(pk)

ICP
IC
VGE
VCC VCC
IC(off)
ICP dv/dt
IC(off)

t tw
Q1 ON
tw STATE LOAD SHORTED

IGBT TURN-ON

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Figure 4.16 Short Circuit SOA Figure 4.17 Short Circuit SOA
for Modules 600V for Modules 1200V
Class Class
600V CLASS 1200V CLASS

10X 10X

9X 9X

8X 8X
COLLECTOR CURRENT, IC, (NORMALIZED)

CONDITIONS: CONDITIONS:
7X VCC ≤ 400V 7X VCC ≤ 800V
Tj = 25∼125°C Tj = 25∼125°C
VGE = ±15V VGE = ±15V
6X tw = 10µS 6X tw = 10µS

5X RG = SEE TABLE 4.2 5X RG = SEE TABLE 4.2

RECOMMENDED RECOMMENDED
RANGE RANGE
4X 4X

3X 3X

2X 2X

1X 1X

0 0
0 100 200 300 400 500 600 0 200 400 600 800 1000 1200
COLLECTOR-EMITTER VOLTAGE, VCE, (VOLTS) COLLECTOR-EMITTER VOLTAGE, VCE, (VOLTS)

Figure 4.18 Short Circuit SOA Figure 4.19 Short Circuit SOA Figure 4.20 Short Circuit SOA
for 1400V Modules for 1700V Modules for 250V Modules
1400V CLASS IGBT MODULE SCSOA IGBT MODULE SCSOA
1700V CLASS 250V CLASS
10X 10X 10X

9X 9X 9X

8X 8X 8X
X 100 (%)

X 100 (%)
X 100(%)

CONDITIONS: CONDITIONS: CONDITIONS:

7X VCC ≤ 1000V 7X VCC ≤ 1100V 7X VCC ≤ 100V
Tj = 25∼125°C Tj = 25∼125°C Tj = 25∼125°C
VGE = ±15V
IC(SHORT)
IC(RATED)

VGE = ±15V VGE ≤ ±10V

IC (SHORT)
C (RATED)

IC (SHORT)
C (RATED)

6X 6X tw ≤ 10µS 6X
tw ≤ 10µS tw = 10µS
RG = SEE TABLE 4.2 RG = RECOMMENDED RECOMMENDED
RG = R
COLLECTOR CURRENT I
COLLECTOR CURRENT

RANGE
COLLECTOR CURRENT I

5X RECOMMENDED 5X 5X RANGE
RANGE

4X 4X 4X

3X 3X 3X

2X 2X 2X

1X 1X 1X

0 0 0
0 200 400 600 800 1000 1200 1400 0 500 1000 1500 0 50 100 150 200 250
COLLECTOR-EMITTER VOLTAGE, VCE, (VOLTS) COLLECTOR-EMITTER VOLTAGE, VCE, (VOLTS) COLLECTOR-EMITTER VOLTAGE, VCE, (VOLTS)

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4.3.3 RTC Circuit During a short circuit, the high 4.4.1 Output Characteristics
current from the current mirror
The F-Series trench gate IGBT activates the RTC which reduces The output characteristics, as
chip by itself, has very limited short the gate driving voltage on the shown in Figure 4.22, define the
ciruit withstanding capability due to IGBT, thereby clamping the short value of VCE that the IGBT will
its extremely high short circuit circuit current to a safe level. The have when conducting a given IC
saturation current. To reduce this RTC circuit restores the short for a given value of VGE. The IGBT
current, the trench IGBT chip is withstanding capability of the is intended for switching operation
fabricated with a current mirror F-Series IGBT module. only and the range for practical
emitter. The current mirror is use is limited to the range of VCE
connected to an RTC (Real Time 4.4 Performance Curves within the saturation area.
Control) circuit to provide active
clamping of short circuit current. The characteristic curves show 4.4.2 Collector-Emitter
The RTC and trench gate IGBT typical electrical characteristics and Saturation Voltage
chip are shown in Figure 4.21. maximum transient thermal
The RTC circuit is activated by the impedance characteristics of the VCE(SAT) is a function of junction
current from the current mirror IGBT and FWDi. temperature, collector current, and
emitter on the trench IGBT chip. gate-emitter voltage. Typically, the
VCE(SAT) of Powerex IGBTs
decreases at low IC with increasing
Figure 4.21 Trench Gate IGBT Chip and RTC temperature, that is, it has a
negative temperature coefficient,
whereas, after exceeding the
crossover point the temperature
coefficient becomes positive.

Figures 4.23 and 4.24 show

MAIN EMITTER AREA
typical collector-emitter saturation
voltage characteristics, VCE(sat)
versus IC, and VCE(sat) versus VGE
respectively.
CURRENT MIRROR
OR EMITTER

GATE

Figure 4.22
OUTPUT CHARACTERISTICS
(TYPICAL)

200
10 9
Tj = 25°C
COLLECTOR CURRENT, IC, (AMPERES)

160 VGE = 20V 12

15

8
120
TRENCH GATE IGBT C

7
80

G 6
40

5
0
RTC 0 2 4 6 8 10
CIRCUIT COLLECTOR-EMITTER VOLTAGE, VCE, (VOLTS)

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4.4.3 Device Capacitance diffusion capacitance portion of and prevents the increase of VGE
the gate-collector capacitance as it draws more charge. When
As the IGBT is a MOS gate causes them to increase VCE stabilizes, the input
device, it has three characteristic dramatically during low collector- capacitance also stabilizes and the
capacitances Cies, Coes, and emitter states. (Figure 4.26) Input additional charge increases the
Cres. These capacitances are capacitance curves are drawn for VGE voltage up to the full on level.
specified in the data sheet VGE = 0V. At turn off the same charge
because they are the most readily quantity must be extracted.
measured. They can be used Table 4.1
to determine the IGBT junction Cies = CGE + CGC (in parallel) 4.4.5 Switching
and diffusion physical (measured C-E shorted) Characteristics
capacitance, CGE, CGC, and Coes = CCE + CGC
CCE, by the formula given in (measured G-E shorted) While the switching times given on
Table 4.1 All three specified Cres = CGC the data sheets as electrical
capacitances are small during characteristics are for resistive
device off state, but the large 4.4.4 Gate Charge load switching, the performance
curves are for half-bridge inductive
Figure 4.23 Since input capacitance varies load. (See Figure 4.29) This
COLLECTOR-EMITTER
with VCE voltage, another reflects the fact that inductive
SATURATION VOLTAGE CHARACTERISTICS
(TYPICAL)
parameter is used to better specify loads are the most prevalent
5 the energy required to turn on and application for IGBTs. The
VGE = 15V
off the IGBT, the gate charge, QG switching times are defined in
SATURATION VOLTAGE, VCE(sat), (VOLTS)

4
Tj = 25°C characteristic. The “QG vs. VGE” Figure 4.28B with ton = td(on) + tr
Tj = 125°C
curve shows the charge necessary and toff = td(off) + tf. The turn-on
COLLECTOR-EMITTER

3 to switch the IGBT. The first slope delay time, td(on), is the time
corresponds to the charging of the required to attract excess
2 input capacitance while VCE equals electrons to the region just
VCC. When the VGE(th) is achieved, underneath the gate. The rise
1 the collector current, IC, causes the time, tr, is the time required for
VCE to decrease towards collector current to increase from
0 VCE(SAT). During the VCE fall the 10% of its final value to 90% of its
0 160 320 480 640 800 CGC capacitance increases rapidly final value. Rise time is basically
COLLECTOR-CURRENT, IC, (AMPERES)

Figure 4.24 Figure 4.25 IGBT Device Figure 4.26 Typical IGBT
Capacitances Capacitances
E
COLLECTOR-EMITTER CAPACITANCE VS. VCE
SATURATION VOLTAGE CHARACTERISTICS LG (TYPICAL)
(TYPICAL)
105
10 Cies
G
Tj = 25°C
CAPACITANCE, Cies, Coes, Cres, (pF)
SATURATION VOLTAGE, VCE(sat), (VOLTS)

8 n+ e e n+ Coes
p+ p p p+
104
COLLECTOR-EMITTER

RB
6 IC = 800A

4 n– 103 Cres
IC = 400A
n+
2 IC =160A
p+
102
0 10-1 100 101 102
0 4 8 12 16 20 COLLECTOR-EMITTER VOLTAGE, VCE, (VOLTS)
GATE-EMITTER VOLTAGE, VGE, (VOLTS)
C

A-38
Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

Figure 4.27 Typical Gate limited by gate impedance includes the time necessary for
Charge characteristics, which are partially recombination of excess charges
a function of the gate contact stored in the n-bulk (tail period).
GATE CHARGE, VGE geometry and partially a function of
20 the input capacitances discussed 4.4.6 FWDi Characteristics
IC = 400A
previously. The turn-off delay time,
GATE-EMITTER VOLTAGE, VGE, (VOLTS)

16 td(off) is due to gate capacitance Characteristics of the diode part

VCC = 200V limiting charges from leaving the are shown in Figures 4.30 and
12 under-gate area. Since charges are 4.31. The diode part means the
VCC = 300V not required to leave the actual free-wheeling diode (FWDi)
8 silicon crystal, as is the case with anti-parallel to the IGBT.
bipolar devices, turn-off delay time
4 of an IGBT is considerably shorter Figure 4.30 shows the voltage
than the storage time of bipolar drop between anode and cathode
0
0 500 1000 1500 2000 2500
devices. The fall time, tf, is not when a forward current is supplied
GATE CHARGE, QG, (nC) limited by device capacitance. It to the FWDi.

Figure 4.28 Measurement Circuit and Waveforms of Switching Time Typical reverse recovery
characteristics of the FWDi are
(A) RESISTIVE LOAD (B) SWITCHING TEST TIME shown in Figure 4.31. These
SWITCHING WAVEFORMS measurements are made using a
TEST CIRCUIT VGE
circuit which operates as a
lC 90%
half-bridge with inductive load as
0 t shown in Figure 4.29A. The low
RLOAD values of trr and Irr and their
relative independence of forward
VCC
lC current are a unique feature of the
90% FWDi used in Powerex IGBT
RG
+VGE1 modules.

-VGE2
10% 4.4.7 Transient Thermal
0 t
td(off)
Impedance
td(on) tr tf

The transient thermal impedance,

Figure 4.29 Half-bridge Switching Test (Inductive Load) Zth(j-c) gives the rise of junction
temperature over case
(A) HALF-BRIDGE SWITCHING (B) temperature per unit of power
HALF-BRIDGE
TEST CIRCUIT SWITCHING CHARACTERISTICS applied for a given time period as
(TYPICAL)
103 shown in Figures 4.32 and 4.33.
td(off) The value of Zth(j-c) is obtained by
tf
L multiplying the value of Rth(j-c) by
Short td(on)
the normalized factor taken from
SWITCHING TIME, (ns)

lE the curve at the time of interest.

VCC
102 tr The steady state thermal
resistance, Rth(j-c) is the saturated
+VGE1 RG VCC = 600V
value of Zth(j-c). If this value is
VGE = ±15V smaller, the maximum allowable
RG = 1.6Ω
lC Tj = 125°C power loss, PC, of a device
-VGE2
101 becomes larger:
101 102 103
COLLECTOR CURRENT, IC, (AMPERES)
Tj(max) – TC
PC =
Rth(j-c)
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 Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

4.4.8 Switching Energy 4.5 IGBT Selection requirement for the inverter. The
Characteristics second criterion is that the IGBT
Proper selection of an IGBT operating junction temperature
Switching energy curves are involves two key points. Both are must always be kept below Tj(max)
provided in order to simplify related to keeping the IGBT (150°C) in all normal operation
estimation of switching losses. within its maximum ratings during including expected motor overload.
Use of these curves is described operation. The first criterion is that Power dissipation and thermal
in more detail in Section 3.4.1 of the peak collector current during design considerations are
this application data. Figures 4.34 operation including any required discussed in detail in Section 3.4.
through 4.44 show turn-on and overload current must be within the Modules selected for listing in
turn-off switching energy as a SWSOA (this means < 2 x Irated or Sections 2.3, 2.4, and 2.5 will
function of collector current for 2 x nameplate current). The meet these requirements with
Powerex 250V, 600V, 1200V, suggested IGBT selections in normal environmental and
1700V H-Series and U-Series and Sections 2.3, 2.4, and 2.5 are heatsink considerations. It may
F-Series IGBT modules. Figures based on a 200% overload be possible (or required) to use a
4.45 and 4.48 show switching loss requirement and allow 20% for lower (higher) current rated if
versus series gate resistance for U- ripple current factors in more (or less) efficient cooling
Series and F-Series IGBT determining the peak IGBT current is employed.
modules.
4.6 IGBT Module Gate Drive
Figure 4.30 Figure 4.31
FREE-WHEEL DIODE
FORWARD CHARACTERISTICS REVERSE RECOVERY CHARACTERISTICS IGBTs require gate voltage to
(TYPICAL) (TYPICAL)
establish collector to emitter
103 103 102
conduction. This gate voltage can
NEGATIVE COLLECTOR-CURRENT, -IC, (AMPERES)

REVERSE RECOVERY CURRENT, Irr, (AMPERES)

di/dt = -800A/µsec
Tj = 25°C be applied by a variety of drive
REVERSE RECOVERY TIME, t rr, (ns)

circuits. The parameters to be

considered in selecting a drive
Irr
circuit include device off biasing
102 102 101
t rr requirements, gate charge
requirements, ruggedness
requirements and power supply
availability.
101 101 100
0.8 1.2 1.6 2.0 2.4 2.8 101 102 103 A recommended drive circuit
EMITTER-COLLECTOR VOLTAGE, VEC, (VOLTS) EMITTER CURRENT, IE, (AMPERES)
includes substantial on biasing
and off biasing. Such a circuit is
Figure 4.32 Figure 4.33
shown in Figure 4.49. The IGBT
TRANSIENT THERMAL TRANSIENT THERMAL
gate-emitter impedance is large
IMPEDANCE CHARACTERISTICS
(IGBT)
IMPEDANCE CHARACTERISTICS
(FWDi)
enough that turn-on can be
10-3 10-2 10-1 100 101 10-3 10-2 10-1 100 101 accomplished with MOSFET drive
NORMALIZED TRANSIENT THERMAL IMPEDANCE, Z th(j-c)

NORMALIZED TRANSIENT THERMAL IMPEDANCE, Z th(j-c)

101 101
Single Pulse Single Pulse techniques, but as the IGBT input
TC = 25°C TC = 25°C
Per Unit Base = R th(j-c) = 0.08°C/W Per Unit Base = R th(j-c) = 0.18°C/W capacitance is larger than for a
Zth = Rth • (NORMALIZED VALUE)

Zth = Rth • (NORMALIZED VALUE)

100 100
MOSFET the IGBT turn-off bias
should be stronger than many
10-1 10-1 10-1 10-1 MOSFET drives offer.

10-2 10-2 10-2 10-2

10-3 10-3 10-3 10-3

10-5 10-4 10-3 10-5 10-4 10-3
TIME, (s) TIME, (s)

A-40
Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

Figure 4.34 Figure 4.35

SWITCHING ENERGY SWITCHING ENERGY
600V CLASS F-SERIES IGBT MODULE 1200V CLASS F-SERIES IGBT MODULE

CONDITIONS:

CM400DU-12F
HALF-BRIDGE SWITCHING MODE CM400HU-24F Effected by RCD CM600*-24F
Tj = 125°C CM600HU-24F Cross Snubber
101 VCC = 300V 102
VGE = ±15V
625 (A • Ω) TURN-ON
CM400*-24F
RG =
IC (rated) (A)
: CM75 ~ 300*U-12F
101 102
3.1Ω : CM400DU-12F, CM600HU-12F
CM300*-24F
CM300*U-12F

CM600HU-12F
CM200*U-12F

TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-ON SWITCHING , ESW (mJ/PULSE)

TURN-ON SWITCHING, ESW (mJ/PULSE)

TURN-ON

CM600*-24F
CM200*-24F
CM150*U-12F
CM100*U-12F

CM150*-24F

CM400*-24F
CM600HU-12F CM100*-24F
CM75*U-12F

100 101
CM400DU-12F

CM75*-24F
CM300*U-12F

CM50*-24F
100 101
CM200*U-12F

CM300*-24F CM75*-24F
CM150*U-12F

CM200*-24F CM50*-24F
CM100*U-12F

CM150*-24F TURN-OFF
TURN-OFF
CM75*U-12F

CM100*-24F
10-1 100
CONDITIONS:
HALF-BRIDGE SWITCHING MODE
Tj = 125°C
VCC = 600V
10-1 VGE = ±15V 100
(A • Ω)
RG = 313
IC (rated) (A) : CM50 ~ 400*U-24F
1Ω : CM600HU-24F

101 102 101 102

COLLECTOR CURRENT, IC (AMPERES) COLLECTOR CURRENT, IC (AMPERES)

Figure 4.36 Figure 4.37

SWITCHING LOSS SWITCHING LOSS
600V CLASS H-SERIES IGBT MODULE 600V CLASS H-SERIES IGBT MODULE

TURN-ON
CM-600**-12H

TURN-ON
101 102 100 101
CM-400**-12H
CM-300**-12H

CM30TF*-12H
CM-200**-12H

CM20TF*-12H
TURN-OFF SWITCHING, ESW (mJ/PULSE)
TURN-ON SWITCHING, ESW (mJ/PULSE)

TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-ON SWITCHING, ESW (mJ/PULSE)
CM-150**-12H
CM-100**-12H

CM15TF*-12H
CM-75**-12H

100 101 10-1 100

CM-50**-12H

CM15/20/30TF*-12H
CM50-600**-12H TURN-OFF IC = Ir/10~Ir FOR TURN-OFF
IC = Ir/10~Ir FOR
10-1 EACH MODULE
100 10-2
EACH MODULE
10-1

CONDITIONS: CONDITIONS:
HALF-BRIDGE SWITCHING MODE HALF-BRIDGE SWITCHING MODE
Tj = 125°C Tj = 125°C
VCC = 300V VCC = 300V
VGE = ±15V VGE = ±15V
RG = 625/Ir RG = 625/Ir

10-2 10-1 10-3 10-2

101 102 100 101
COLLECTOR CURRENT, IC (AMPERES) COLLECTOR CURRENT, IC (AMPERES)

A-41
 Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

Figure 4.38 Figure 4.39

SWITCHING ENERGY SWITCHING LOSS
1200V CLASS H-SERIES IGBT MODULE 1200V CLASS H-SERIES IGBT MODULE
101 102 102 103

CM600**-24H
TURN-ON
TURN-ON

CM400**-24H
CM300**-24H
CM30TF-24H

CM200**-24H
CM20TF-24H

CM150**-24H
CM15TF-24H

TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-ON SWITCHING, ESW (mJ/PULSE)
102

TURN-OFF SWITCHING, ESW (mJ/PULSE)

CM100**-24H
101
TURN-ON SWITCHING, ESW (mJ/PULSE)

100 101

CM75**-24H

CM600**-24H
CM50**-24H

CM400**-24H
CM300**-24H
CM30TF-24H

CM200**-24H
CM20TF-24H

TURN-OFF

CM150**-24H
100 100 101
10-1
CM15TF-24H

CM100**-24H
CM75**-24H
CM50**-24H
TURN-OFF

10-2 CONDITIONS:
10-1 10-1 100
CONDITIONS:
HALF-BRIDGE SWITCHING MODE Tj = 125°C
Tj = 125°C VCC = 600V
VCC = 600V VGE = ±15V
VGE = ±15V RG = 313/Ir
RG = 313/Ir CM600HA-24H : RG = 2.1 

100 101 101 102

COLLECTOR CURRENT, IC (AMPERES) COLLECTOR CURRENT, IC (AMPERES)

Figure 4.40 Figure 4.41

SWITCHING ENERGY SWITCHING ENERGY
1200V CLASS H-SERIES IGBT MODULE 250V CLASS H-SERIES IGBT MODULE
102 103
CM600HA-5F

101 TURN-ON 102

TURN-OFF SWITCHING, ESW (mJ/PULSE)
TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-ON SWITCHING, ESW (mJ/PULSE)

TURN-ON SWITCHING, ESW (mJ/PULSE)

TURN-ON
CM450HA-5F

TURN-OFF
CM350DU-5F

102 102
CM1000HA-24H TURN-OFF

100 101
CM600HA-5F
CM450HA-5F
CM350DU-5F

10-1 CONDITIONS:
100
CONDITIONS: Tj = 125°C
Tj = 125°C VCC = 100V
VCC = 600V VGE = ±10V
VGE = ±15V RG = 2500/Ir
RG = 3.3 

101 101 10-2 10-1

102 103 102 103
COLLECTOR CURRENT, IC (AMPERES) COLLECTOR CURRENT, IC (AMPERES)

A-42
Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

Figure 4.42
SWITCHING ENERGY
1400V CLASS H-SERIES IGBT MODULE

CONDITIONS:
Tj = 125°C
VCC = 800V
VGE = ±15V
RG = 312/Ir
CM600HA-28H: RG = 2.1 
CM1000HA-28H: RG = 3.3 

TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-ON SWITCHING, ESW (mJ/PULSE)

CM1000HA-28H
102 102

CM600HA-28H
CM400HA-28H
CM300DY-28H
TURN-OFF

CM200DY-28H
CM50~1000-28H
(IC = Ir /10~Ir)

CM100TF-28H
101 101
TURN-ON

CM75**-28H
CM50**-28H

100 100
100 101 102 103
COLLECTOR CURRENT, IC (AMPERES)

Figure 4.43 Figure 4.44

SWITCHING ENERGY SWITCHING ENERGY
600V CLASS U-SERIES IGBT MODULE 1200V CLASS U-SERIES IGBT MODULE
102 102
CONDITIONS: CONDITIONS: CM600HU-24H
HALF-BRIDGE SWITCHING MODE HALF-BRIDGE SWITCHING MODE
Tj = 125°C Tj = 125°C CM400HU-24H
VCC = 300V VCC = 600V
VGE = ±15V VGE = ±15V
RG = 625/Ir RG = 312.5/Ir
CM600HU-24H: RG = 2.1 
CM600HU-12H

CM300DU-24H

CM600HU-24H
TURN-OFF
CM400DU-12H

CM200DU-24H

101 101
TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-ON SWITCHING , ESW (mJ/PULSE)

TURN-ON SWITCHING, ESW (mJ/PULSE)

TURN-OFF
CM150DU-24H

CM400HU-24H
CM300DU-12H

101 101
CM100TU-24H
CM200TU-12H

CM75TU-24H
CM150TU-12H
CM100TU/BU-12H

CM50TU-24H
CM75TU/BU-12H

TURN-ON TURN-ON
CM600HU-12H

100 100
CM300DU-24H
CM400DU-12H

CM200DU-24H
CM150DU-24H

100 100
CM300DU-12H

CM100TU-24H
CM200TU-12H

CM75TU-24H
CM50TU-24H
CM150TU-12H
CM100TU/BU-12H

10-1 10-1
101 102 101 102
COLLECTOR CURRENT, IC (AMPERES) COLLECTOR CURRENT, IC (AMPERES)

A-43
 Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

Figure 4.45 Figure 4.46

SWITCHING LOSS SWITCHING LOSS
600V CLASS F-SERIES IGBT MODULE 1200V CLASS F-SERIES IGBT MODULE
102 104
CM600HU-12F CM400DU-12F
CONDITIONS: CONDITIONS:
HALF-BRIDGE SWITCHING MODE HALF-BRIDGE SWITCHING MODE CM600HU-24F
Tj = 125°C Tj = 125°C
VCC = 300V 102 VCC = 600V 103
VGE = ±15V CM300*U-12F
VGE = ±15V CM300*-24F
IC = IC(rated) CM200*U-12F IC = IC(rated)
CM200*U-12F
CM200*-24F
TURN-ON

TURN-OFF SWITCHING, ESW (mJ/PULSE)

TURN-OFF SWITCHING, ESW (mJ/PULSE)
101 103

TURN-ON SWITCHING, ESW (mJ/PULSE)

TURN-ON SWITCHING, ESW (mJ/PULSE)

TURN-ON CM150*-24F

CM100*-24F

CM75*-24F
CM400HU-24F
101 102
CM-100*U-12F CM600HU-24F
CM-75*U-12F
100 CM600HU-12F 102
CM50*-24F
CM400HU-24F
CM300*-24F
CM400DU-12F

CM200*-24F

CM300*U-12F CM150*-24F

CM200*U-12F
CM100*-24F
10-1 CM150*U-12F
101 100 101
CM75*-24F
TURN-OFF
TURN-OFF CM50*-24F
CM100*U-12F CM400HU-24F Effected by RCD
CM75*U-12F CM600HU-24F Cross Snubber

100 101 102 100 101

GATE-RESISTANCE, RG (Ω) GATE RESISTANCE, RG (Ω)

Figure 4.47 Figure 4.48

SWITCHING LOSS SWITCHING LOSS
600V CLASS U-SERIES IGBT MODULE 1200V CLASS U-SERIES IGBT MODULE
103 104
CONDITIONS: CONDITIONS:
Tj = 125°C
CM-150*U-12H

Tj = 125°C
VCC = 300V VCC = 600V
VGE = ±15V TURN-ON VGE = ±15V
CM-100*U-12H

IC = Ir IC = Ir CM600HU-24H
CM-75*U-12H

TURN-ON
CM600HU-12H
TURN-OFF SWITCHING, ESW (mJ/PULSE)
TURN-OFF SWITCHING, ESW (mJ/PULSE)

103
TURN-ON SWITCHING, ESW (mJ/PULSE)
TURN-ON SWITCHING, ESW (mJ/PULSE)

101 102 102

CM400HU-24H
CM400DU-12H
CM300DU-24H
CM300DU-12H CM200DU-24H
CM150DU-24H
CM200*U-12H

CM600HU-12H CM100*U-24H

101 102
CM400DU-12H CM600HU-24H
CM75*U-24H
CM300DU-12H CM400HU-24H

CM200*U-12H
100 101 CM300DU-24H CM50*U-24H
CM200DU-24H
CM150*U-12H
CM150DU-24H

CM100*U-24H
CM100*U-12H
CM75*U-24H
CM75*U-12H 100 101
TURN-OFF CM50*U-24H
TURN-OFF

10-1 100
100 101 100 101
GATE-RESISTANCE, RG (Ω) GATE RESISTANCE, RG (Ω)

A-44
Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

4.6.1 Gate Drive Voltage switching times and losses on the Figure 4.49 Typical IGBT Gate
value of the series gate resistor. Drive Circuit
For turn-on a positive gate +VGE

voltage of 15V ±10% is Under short circuit or during turn

recommended. This value is off of the free-wheeling diode Q1
sufficiently high to fully saturate the across an IGBT, the dv/dt applied RG
IGBT at rated current and minimize to the IGBT and its collector to gate
on-state losses while it is capacitance can cause a VG
18V
sufficiently low to limit short circuit current to flow in the gate circuit. If Q2

current and its resulting power this current is large enough the
stress. In no case should a gate voltage developed across the –VGE
drive outside of the range of 12 to gate resistor can cause the IGBT to Q1, Q2: VCEO ≥50V
20V be used for turn-on. turn on. So, while smaller gate VGE + + VGE -
IC, Max. ≥
RG
resistances offer enhanced
An IGBT will be off when its gate ruggedness (rejection of dv/dt RG: See Table 4.2 or data sheet
for suggested value
voltage is zero. However, in order turn on), they also provide less
to ensure that the IGBT stays in margin for noise and can lead to Figure 4.50 Switching Energy
its off state when dv/dt noise is oscillation problems in conjunction as a Function of
present in the collector-emitter with the gate-emitter capacitance Reverse-Bias
voltage an off bias must be used. and any parasitic inductance in the Voltage
Use of reverse bias also decreases gate drive wiring.
turn off losses. The relationship 103
CONDITIONS:
between reverse bias voltage and In addition, smaller gate resistors HALF-BRIDGE INDUCTIVE LOAD

SWITCHINTG LOSS, ESW (mJ/PULSE)

SWITCHING OPERATION
switching losses is shown in allow faster turn-on di/dt of the Tj = 125oC
VCC = 300V
Figure 4.50. For Powerex IGBTs IGBT. This may cause high dv/dt VGE = ±15V
IC = 300A
an off bias of -5 to -15V is and increased surge voltage at 102
recommended. FWDi recovery.

Powerex IGBT modules are not Giving consideration to all of the Esw(off)

suitable for linear operation. Gate above effects, Table 4.2 gives the Esw(on)

voltages in the 3 to 11V range recommended values of series 101

0 4 8 12 16 20
should only appear on the IGBT’s gate resistance. The value given for GATE REVERSE BIAS VOLTAGE, -VGE, (VOLTS)
gate during rapid switching the minimum series gate resistor is
transitions. the standard resistor that is used
for determining all data sheet Figure 4.51 Typical
4.6.2 Rg - Series Gate parameters and characteristics. Dependence of
Resistance The maximum value given allows Switching Time on
for flexibility in slowing down the Gate Resistance
Selecting the proper series gate switching speed and avoiding
104
resistor for IGBT gate drive is very potential oscillation problems CONDITIONS:
important. The value of the gate without risking linear operation. It HALF-BRIDGE INDUCTIVE LOAD
SWITCHING OPERATION
resistor has a significant impact on also provides for slower switching Tj = 125oC
VCC = 300V
the dynamic performance of the in lower frequency applications
td(on), tr, td(off), tf, (ns)

VGE = ±15V
IGBT. The IGBT is turned on and where switching losses are not as t d(off)
103
off by charging and discharging the critical and reduced transient
gate capacitance. A smaller gate voltages and gate drive current t d(on)

resistor will charge/discharge the requirements may be a factor. tf

gate capacitance faster, reducing tr

the switching times and switching Table 4.2 was generated

losses. Figures 4.51 and 4.52 considering hard switched 102
100 101 102
depict the typical dependence of inductive load applications which GATE RESISTANCE, RG, (Ω)

A-45
 Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

Figure 4.52 Typical Table 4.2 Values of Gate Resistance

Dependence of
Switching Loss on Recommended Series Gate Resistance, RG, (ohms)
Gate Resistance
103 Voltage Turn-on
CONDITIONS: (Volts) Type Number Min. Max
HALF-BRIDGE INDUCTIVE LOAD
SWITCHINTG LOSS, ESW (mJ/PULSE)

SWITCHING OPERATION
Tj = 125oC CM15**-12H 42 420
VCC = 300V
VGE = ±15V
CM20**-12H 31 310
102
Esw(on) CM30**-12H 21 210
CM50**-12H 13 130
Esw(off) CM75**-12H & F 8.3 83

101
600 CM100**-12H & F 6.3 63
100 101 102
GATE RESISTANCE, RG, (Ω)
CM150**-12H & F 4.2 42
CM200**-12H & F 3.1 31
represent the majority of IGBT
CM300**-12H & F 2.1 21
applications. There are some low
frequency, chopper, and resonant CM400**-12H 1.6 16
mode applications for which values CM400DU-12F 3.1 31
of series gate resistance outside of CM600**-12H 1.0 10
the limits in the table may be used.
CM600HU-12F 3.1 31
Consult the factory for specific
recommendations in these cases. CM15**-24H 21 210
CM20**-24H 16 160
4.6.3 Gate Drive Power CM30**-24H 10 100
Requirements CM50**-24H & F 6.3 63
CM75**-24H & F 4.2 42
IGBT switching consumes power
from the gate drive power supply 1200 CM100**-24H & F 3.1 31
as a function of the transition from CM150**-24H & F 2.1 21
negative to positive bias, ∆GE, the CM200**-24H & F 1.6 16
total gate charge, QG, and the
CM300**-24H & F 1.0 10
frequency of operation, f. The
CM400**-24H 0.78 8
minimum peak current capability,
IG(pk) of the supply is: CM-400HU-24F 0.78 7.8
CM600**-24H 2.1 22
VGE CM600HU-24F 1.0 10
IG(pk) = ±
Rg CM1000**-24H 3.3 33
CM50**-28H 6.3 63
The average power, PAVG,
CM75**-28H 4.2 42
required of the supply is:
CM100**-28H 3.1 31
PAVG = ∆VGE * QG * f CM200DY-28H 1.6 16
1400 CM300DY-28H 1.0 10
where CM400HA-28H 0.78 8
CM600HA-28H 2.1 22
VGE = VGE(on) + | VGE(off) |
QG = Total Gate Charge CM1000HA-28H 3.3 33
(See Figure 4.53) 1700 CM400HA-34H 10 50
f = Switching
Frequency
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Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

4.6.4 Gate Drive Layout 6. Do not route printed circuit reverse biased in the off-state, this
Considerations board traces near each other current causes an increase of VGE
that are subjected to mutual towards VGE(th) due to the gate
Gate drive layout is critical to avoid potential changes due to IGBT circuit impedance. In the worst
potential oscillations, slow rise of switching. High dv/dt can case, the threshold voltage is
gate voltage, loss of noise couple noise through parasitic reached at the IGBT chip and turn
immunity, sag in gate supply capacitances. If crossing or on of the IGBT is initiated resulting
voltage, or reduction in efficiency of parallel routing of those traces in an arm shoot through. The
the gate protection circuitry. is unavoidable, use shield requirements to avoid this untimely
layers in between. turn on are:
Guidelines that should be followed
in designing the gate drive layout 7. Parasitic capacitance between 1. VG(off) should be sufficiently
are: high side gate drive circuits, negative. (See Table 4.3)
high and low side gate drive
1. The layout must minimize the circuits and control circuits 2. Rg in off-state should be low.
parasitic inductance between may cause problems with (Recommended values are
the driver’s output stage and coupled noise. Power supply given in Table 4.2.)
the IGBT. This corresponds to transformer inter-winding
keeping the loop area as small capacitance can be another 3. Gate circuit inductance, LG,
as possible in the indicated source of coupled noise. should be minimized.
section of Figure 4.54. Appropriate measures to
reduce these parasitic
2. Care must be taken to avoid capacitances have to be Figure 4.53 Total Gate Charge
coupling of noise between the implemented. in IGBT Switching
power circuit and the control
circuit. This can be 8. If optocouplers are used for VGE (V)

accomplished by proper isolation of the high side gate QG

placement of the gate drive drive signals they should have (+VGE)

board and/or shielding the a minimum common mode

VGE ∆VGE
gate drive circuit. transient immunity of
10,000 V/µs. QG (C)
3. It is recommended to use the QG

auxiliary emitter terminal for 4.7 Protecting IGBT Modules

connecting the gate drive. (-VGE)
4.7.1 dv/dt Protection
4. If direct connection of the
drive PCB to the IGBT control In half-bridge and inductive mode
terminals is not possible, the operation the IGBT that is in the
use of twisted pair (3 turns per off state is subjected to sharp rise Figure 4.54 Gate Drive Layout
inch of minimum length) or of positive voltage due to recovery
stripline is recommended. of its anti-parallel diode as shown
in Figures 4.55 and 4.56. This static
5. Gate protection clamp dv/dt can be higher than the rate G

(described in Section 4.7.1) of rise of VCE at turn off of the

must also have low inductance IGBT. This dv/dt generates a
layout and must be located as current in the collector gate E

close as possible to the capacitance that flows into the

gate-emitter control terminals gate drive circuit as shown in
of the IGBT module. Figure 4.57. Although the gate is

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 Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

Table 4.3 Recommended Gate Figure 4.55 One-phase Circuit of an Inverter Bridge
Off-bias (Inductive Load)
VCES Minimum Recommended
Rating VGE(off) VGE(off)
D1
600V -2V -5 to -15V
1200V -2V -5 to -15V Q1 VQ1
VQ1 = IL
1400V -5V -5 to -15V
VCC RG
1700V -5V -5 to -15V LOAD
Irr

VQ2 = –IL
4.7.2 Short Circuit Protection Q2
D2 VQ2
RG
If a short circuit occurs the stress
on the IGBT must remain within
the SCSOA as shown in Section
4.3.2. Common methods of short
Figure 4.56 Relevant Current and Voltage Waveforms of
circuit protection are current
Phase Elements
sensing as shown in Figure 4.58
and desaturation detection as trr
IQ2 VQ2(pk)
shown in Figure 4.59. VQ2 trrb

Irr
Once a short circuit is detected, dVQ1/dt
dIQ1/dt
several techniques can be
employed to protect the IGBT from
destruction. The most elementary VQ1(pk)
technique is to simply turn off the ID1
dVQ1/dt VQ1

IGBT within 10ms. But, in this case,

the snubber or clamp must be
designed for the short circuit
condition. However, it is
recommended to use turn-off
trr
techniques that control the VGE in
order to reduce the stress on the
IGBT. These techniques are: Figure 4.57 dV/dt Effect on IGBT Gate Circuit

1. Controlled Shutdown: iD
The gate voltage is reduced C
either in steps or by a ramp
GCG
so the short circuit current is
RG LG RGi LGi
reduced and its di/dt is also G
dv/dt
reduced as the IGBT turns off.
The spike voltage is also
VGE
reduced. VGE(OFF)

E
2. VGE Clamping:
As described in Section 4.3.2 E
the peak of the short circuit
current depends on VGE which
is augmented by the feedback
of dv/dt through the gate-
collector capacitance. The
effect can be overcome by

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Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

clamping the VGE safely below Figure 4.58 Short Circuit Protection Scheme (Example)
18 Volts. An effective clamping
circuit is shown in Figure 4.60.
The clamping diode, DCL, and A. SYSTEM BLOCK DIAGRAM

clamping capacitor, CCL,

DRIVER
should be connected directly to BUS
CURRENT
the control signal terminals of SENSE
the IGBT module. A fast M
forward recovery is required for COMPARATOR
DCL. For low current IGBTs a
zener clamp between gate and
emitter may also be effective.
LATCH DISABLE <SIGNAL GATE>
CLEAR 6
3. Reducing tw: UNDER PROTECTION PWM SIGNALS
For reducing the thermal stress <PWM SIGNAL GENERATOR>
in short circuit operation it is CLEAR PROTECTION
beneficial to reduce the time in
short circuit, tw. However, this
will increase the magnitude of B. LOGIC DIAGRAM FOR OVER CURRENT PROTECTION

the current at turn off as shown

in Figure 4.61, and di/dt will be
increased. This undesirable
effect may be overcome by
using the techniques in Steps 1 CURRENT
and 2 above. SENSOR +
R Q
–
<F.F.> UNDER PROTECTION PWM SIGNALS
Caution: S <PWM SIGNAL GENERATOR>
The above techniques reduce the CLEAR PROTECTION
stress at short circuit turn-off.
However, they do not release the
designer from considering worst
case turn off in snubber design.

4.7.3 Handling Precautions Figure 4.59 Out of Saturation Short Circuit Protection

Since IGBT gates are insulated

OUT OF SATURATION SHORT CIRCUIT DIAGRAM
from any other conducting region,
care should be taken to prevent
static build up which could possible COMPARATOR
damage gate oxides. All ESD
Vref
sensitive IGBT modules are FAULT
AND
shipped from the factory with CLEAR LATCH

conductive foam contacting the DISABLE

gate and emitter control terminals. GATE
FROM DRIVE
Never touch the gate terminals DRIVE
during assembly and keep the LOGIC

conducting foam in place until

permanent connections are made
to the gate and emitter control
terminals. Always ground parts

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 Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

touching gate terminals during and dynamic current balance demonstrated that the current
installation. In general, standard among the paralleled devices. balance becomes considerably
ESD precautions applicable to With proper attention to circuit better at elevated junction
MOSFETs should design and device selection several temperatures. For example, in the
be followed. modules can be reliably operated case of 1200V H-series the worst
in parallel. The following case imbalance drops from 15%
Other handling precautions that sub-sections outline the basic at 25°C to about 5% at 125°C.
should be observed are: requirements and considerations Figure 4.63 shows how the
for parallel operation of single IGBT imbalance shown in Figure 4.62 is
1. Use grounded work station modules with ratings of 200A or defined. To facilitate the matching
with grounded floors and more. of devices for parallel operation
grounded wrist straps when Powerex provides IGBT modules
handling devices. 4.8.1 Static Current Balance marked with a saturation voltage
rank letter. All devices to be
2. Use a 100Ω resistor in series Table 4.4 outlines the factors operated in parallel should have
with the gate when performing influencing parallel operation of the same saturation voltage rank.
curve tracer tests. IGBT modules. Under static Devices can also be supplied in
on-state or DC operating conditions matched sets for parallel
3. Never install devices into the collector to emitter saturation applications. Contact the factory
systems with power connected voltage and junction temperature for ordering information. Table 4.5
to the system. have the biggest influence on shows the standard saturation
current sharing. To achieve reliable voltage letter rankings for Powerex
4. Use soldering irons with and consistent static current IGBT modules. Column 1 of this
grounded tips when soldering balance devices should be table is applicable to all voltage
to gate terminals. mounted on the heat sink near to classes of U-Series and H-Series
each other with cooling arranged to modules, column 2 applies to 250V
4.8 Parallel Operation maintain uniform base plate trench gate IGBT modules, and
temperatures between paralleled column 3 applies to 600V and
Powerex IGBT modules can be modules. A good general design 1200V F-Series modules. Note that
connected in parallel for guideline is to maintain a base all ranks do not exist for a given
applications requiring very high plate temperature difference voltage class. For example, 600V
currents. In such applications between paralleled devices of 15°C H-Series modules have a
parallel operation should only be or less. Parallel connected devices maximum data sheet saturation
considered when the highest should be selected with matched voltage of 2.8V and therefore ranks
current module available is not saturation voltages. The maximum
large enough. Use of a single large static current imbalance as a
Figure 4.62 Maximum Current
module rather than smaller parallel function of saturation voltage at
Imbalance vs.
modules is recommended because Tj = 25°C is shown in Figure 4.62.
DVCE(sat)
it eliminates concerns about static Experimental analysis has
30

Figure 4.60 VGE Clamping Figure 4.61 Short Circuit at

Circuit Reduced tw
20
IC/IC  100%

+ ON CCL DCL
VGE (ON) RG
10
- IC 600V H&U SERIES
1200V H&U SERIES
250V TRENCH
tw1 GATE SERIES
-
tw2 0
VGE (OFF) OFF 0 0.2 0.4 0.6 0.8
+
VCE(sat) (V) Tj = 25°C

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H through M do not exist for these Saturation voltage ranking is not that the following recommended
devices. Saturation voltage ranks normally available for dual or six deratings can be applied:
are intended for matching sets of pack types. Modules of different
devices for parallel applications. saturation voltage ranks may be For 250V Trench Gate derate
Orders specifying a specific rank used in the same inverter provided IC by 10%
will not normally be accepted. The that devices connected in parallel For 600V Class H-Series,
saturation voltage rank will be are of the same rank. U-Series and F-Series derate
either marked with white ink on the IC by 10%
top of the module or indicated on When modules of the same For 1200V and 1400V Class
the label. Saturation voltage saturation voltage rank are H-Series, U-Series and
ranking is available for single paralleled the static current F-Series derate IC by 15%
modules rated 200A or more. imbalance will be minimized so For 1700V Class H-Series
derate IC by 20%

Table 4.4 IGBT Module Parallel Operation, Current Sharing

Factors related to current sharing and their effect.
Categories of Current Sharing Figure 4.63 Circuit Showing the
IGBT Switching Steady State Definition of
Factors Effecting Current Sharing Turn-on Turn-off di/dt = 0 di/dt ≠ 0 Current Imbalance
Device VCE(SAT) X X
X
Characterization  Temperature


X
IC - IC IC + IC
Main L (Supply to
∂ X X
Circuit Device)
Wiring L (Total Loop X X X

Inductance Including Load)
Driver to Device

X X
Driver Wiring Length Diff.
Wiring Output Impedance

X X
of Driver
IL = 2IC

- Relation Exists X - No Relation ∂ - Relation Ambiguous or Weak

Table 4.5 Saturation Voltage Ranks for Parallel Applications

Saturation Voltage Ranks for H-Series Saturation Voltage Ranks for 250V Saturation Voltage Ranks for 600V
and U-Series IGBT Modules Trench Gate IGBT Modules and 1200V F-Series Modules
(CM**-12F / CM**-24F)
Saturation Voltage VCE(sat) (V) Saturation Voltage VCE(sat) (V) Saturation Voltage VCE(sat) (V)
Rank IC = Rated Current Rank IC = Rated Current Rank IC = Rated Current
VGE = 15V VGE = 15V VGE = 15V
Tj = 25°C Tj = 25°C Tj = 25°C
C 1.70 ~ 1.95 Q 1.15 ~ 1.30 E 1.5 ~ 1.6
D 1.90 ~ 2.15 R 1.25 ~ 1.40 F 1.55 ~ 1.65
E 2.10 ~ 2.35 S 1.35 ~ 1.50 G 1.6 ~ 1.7
F 2.30 ~ 2.55 H 1.65 ~ 1.75
G 2.50 ~ 2.80 J 1.7 ~ 1.8
H 2.75 ~ 3.05 K 1.75 ~ 1.85
J 3.00 ~ 3.30 L 1.8 ~ 1.95
K 3.25 ~ 3.55 M 1.9 ~ 2.05
L 3.50 ~ 3.80 N 2.0 ~ 2.2
M 3.75 ~ 4.05 P 2.15 ~ 2.4

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When more than two modules are a factor because of the resulting to run in parallel with the current in
paralleled the derating can be effect on delay time and therefore one of the paralleled modules
computed using the following the design guidelines given in mutual inductance effects can
formula: Section 4.8.1 should be observed cause the inductance of that
for dynamic current balance as path to be effectively reduced or
% Derating =
well. To understand the circuit increased even though the

[( )
(n – 1) (1 – x)
___________ layout factors affecting dynamic mechanical connection point is
1–
(1 + x)
______________
n
+1
] X 100 current balance it is necessary to symmetric.
consider two cases:
The second case that must be
Where: The first case is when the device is considered is current imbalance
in the static on-state and the load that occurs at the moment of
x = 0.1 for 250V devices current is changing. As indicated turn-on or turn-off switching.
x = 0.1 for 600V devices in Table 4.4 the main cause of Table 4.4 indicates that the most
x = 0.15 for 1200V/ imbalance in this case is important factors influencing
1400V devices differences in inductance to the current balance are the gate circuit
x = 0.20 for 1700V devices load connection. In practical design and module temperature.
n = number parallel applications this is most often The recommended gate drive
the result of an asymmetric configuration for paralleled
Example: connection of the load as shown modules is shown in Figure 4.66.
in Figure 4.64. A typical current The recommended approach is to
In the case of four IGBT modules imbalance waveform resulting from use a single drive stage with a
of 600V class connected in an asymmetric load connection is separate Rg for each paralleled
parallel, the formula is: shown in Figure 4.65. Experimental module. The small kelvin emitter
analysis has shown that this type of connections on the paralleled
% Derating = imbalance can also be caused by devices should be connected with
the orientation of the main circuit
[( )
(4 – 1) (1 – .1)
___________ a short, low impedance symmetric
1–
(1 + .1)
______________
4
]
+1
= 13.6%
bus bars. For example, if the load
connection causes the load current
connection in order to prevent
ground loop currents from

So the derated current with 4 Figure 4.64 Circuit Diagram Showing Symmetric and Asymmetric
parallel 300A modules is: Load Connections
300A(1 - 0.136) x 4 = 1037A

4.8.2 Dynamic Current Balance IC1 IC2

Matching VCE(sat) is effective for ASYMMETRIC

maintaining good static steady LOAD
CONNECTION
state current balance. This
matching also helps some with turn
off current balance because of the
fundamental inverse relationship of
fall time and saturation voltage.
However, as indicated in Table 4.4,
gate drive conditions and power SYMMETRIC
circuit layout have by far the LOAD
CONNECTION
greatest impact on dynamic current
balance between paralleled
devices. Temperature differences
between paralleled modules is also

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Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272

disrupting the gate drive. In some inductance in the gate drive wiring. NOTE:
power circuit layouts it may become Use of a printed circuit board It may be observed that Powerex
necessary to put some part of the mounted directly to the module or IGBTs have a negative
Rg impedance in the ground path short tightly twisted wires of equal temperature coefficient of
to impede the flow of ground loop length is recommended. Care saturation voltage over a wide
currents. However, in this case should be exercised to avoid range of collector currents. This is
improvements in the power circuit inductive coupling to the gate drive not a deterrent to parallel operation
layout should be investigated first. by keeping the wiring from running and, in fact, is an advantage as it
In order to maintain uniform parallel to the main circuit current. yields lower conduction loss at high
switching it is recommended to use Figure 4.67 shows a typical turn-off junction temperature. The
relatively small values of series current waveform with imbalance homogeneous process
gate resistance. Series gate caused by an improper gate drive. characteristics of Powerex IGBTs
resistors should never be larger In addition to the influences of produce VCE(SAT) characteristics
than ten times the value temperature and gate drive the that track as a function of current
recommended on the data sheet of current balance at turn-on is and temperature such that, once a
the module being used. Care must influenced by the symmetry of the VCE(SAT) rank is chosen, the
be exercised to make the gate inductance in the power circuit parallel devices will share within
wiring symmetric. In general, the between the main supply the given derating factor.
best practice is to minimize the capacitors and devices.
Figure 4.68 is a circuit showing
symmetric versus asymmetric main
Figure 4.65 Typical Current circuit connections. Figure 4.69
Imbalance Caused shows a typical turn on waveform
by Assymetric with current imbalance caused by
Load Connection asymmetric main circuit
inductance. An effective approach
lC
to balance the main circuit
inductance is minimize the
lC1 inductance by using laminated bus
structures. The current imbalance
lC2
waveform at turn-on due to
improper gate drive also looks like
Figure 4.69.

Figure 4.66 Gate Drive Configuration for Paralleled Modules Figure 4.67 Typical Current
Waveform Showing
Imbalance at
USE SAME RG
Turn-off Due to
Improper Gate
RG
Drive
USE SHORT LOW lC
IMPEDANCE
GATE CONNECTION lC1
DRIVER
lC2

RG
GATE AND EMITTER
CONNECTIONS LOW
INDUCTANCE AND
SYMMETRIC

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Figure 4.68 Symmetric and Asymmetric Main Circuit Connections Figure 4.69 Typical Turn-on
Waveform with
Current Imbalance
ASYMMETRIC
MAIN BUS Caused by
CONNECTION SYMMETRIC
MAIN BUS Asymmetric Main
CONNECTION Circuit Inductance
IC1 IC2

lC

lC1

lC2

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