General Description Features: Ezbuck
General Description Features: Ezbuck
Applications
Point of load dc/dc conversion
PCIe graphics cards
Set top boxes
DVD drives and HDD
LCD panels
Cable modems
Telecom/Networking/Datacom equipment
Typical Application
C1
47uF
VIN
From uPC EN L1
AOZ1014 LX
3.3uH
VOUT
+3.3V Output
@5A
COMP R1
C2
Rc FB
100uF
R2
AGND PGND D1
Cc
Ordering Information
Part Number Ambient Temperature Range Package Environmental
AOZ1014A -40°C to +85°C SO-8 Lead Free
AOZ1014D -40°C to +85°C DFN-8 Lead Free
Pin Configuration
VIN 1 8 LX
SO-8
PGND 2 or 7 LX
4x5
AGND 3 DFN-8 6 EN
FB 4 5 COMP
Pin Description
Pin Number Pin Name Pin Function
1 VIN Supply voltage input. When VIN rises above the UVLO threshold the device starts up.
2 PGND Power ground. Electrically needs to be connected to AGND.
3 AGND Reference connection for controller section. Also used as thermal connection for
controller section. Electrically needs to be connected to PGND
4 FB The FB pin is used to determine the output voltage via a resistor divider between the
output and GND.
5 COMP External loop compensation pin.
6 EN The enable pin is active high. An internal pull-up resistor pulls EN pin to VIN to enable
the device if it is left open.
7,8 LX PWM output connection to inductor. Thermal connection for output stage.
Electrical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified. Specifications in BOLD indicate a ambient temperature range of -40°C
to +85°C.
Notes:
1. Exceeding the Absolute Maximum ratings may damage the device.
2. The device is not guaranteed to operate beyond the Maximum Operating ratings.
3. Devices are inherently ESD sensitive, handling precautions are required. Human body model rating: 1.5KΩ in series with 100pF.
Vin
UVLO 5V LDO
EN & OTP
Internal +5V
POR REGULATOR
+
ISEN
REFERENCE -
& SOFTSTART
BIAS Q1
ILIMIT
+
0.8V PWM
+ PWM
LEVEL SHIFTER
EAMP – COMP CONTROL
FET DRIVER
FB -
LOGIC LX
+
+
LX
COMP 500Khz
OSCILLATOR
AGND GND
Over Current Protection (OCP) The input ripple voltage can be approximated by
equation below:
The sensed inductor current signal is also used for
over current protection. Since AOZ1014 employs IO V V
∆VIN = × (1 − O ) × O
peak current mode control, the COMP pin voltage is f × C IN VIN VIN
proportional to the peak inductor current. The
COMP pin voltage is limited to be between 0.4V
and 2.5V internally. The peak inductor current is Since the input current is discontinuous in a buck
automatically limited cycle by cycle. converter, the current stress on the input capacitor
is another concern when selecting the capacitor.
When the output is shorted to ground under fault For a buck circuit, the RMS value of input capacitor
current can be calculated by:
conditions, the inductor current decays very slow
during a switching cycle because of Vo=0V. To
prevent catastrophic failure, a secondary current VO V
limit is designed inside the AOZ1014. The I CIN _ RMS = I O × (1 − O )
measured inductor current is compared against a
VIN VIN
preset voltage which represents the current limit,
between 6A and 8A. When the output current is if we let m equal the conversion ratio:
more than current limit, the high side switch will be VO
turned off and EN pin will be pulled down. The =m
converter will initiate a soft start once the over-
VIN
current condition disappears. The relation between the input capacitor RMS
current and voltage conversion ratio is calculated
Power-On Reset (POR) and shown in Fig. 2 below. It can be seen that when
VO is half of VIN, CIN is under the worst current
A power-on reset circuit monitors the input voltage. stress. The worst current stress on CIN is 0.5·IO.
When the input voltage exceeds 4V, the converter
starts operation. When input voltage falls below
3.7V, the converter will be shut down.
0.5
0.5 The inductor takes the highest current in a buck
circuit. The conduction loss on inductor need to be
0.4
checked for thermal and efficiency requirements.
0.3
I CIN_RMS ( m) Surface mount inductors in different shape and
IO
0.2
styles are available from Coilcraft, Elytone and
Murata. Shielded inductors are small and radiate
0.1 less EMI noise. But they cost more than unshielded
inductors. The choice depends on EMI requirement,
0
0
0 0.5 1
price and size.
0 m 1
Figure 2. ICIN vs. voltage conversion ratio Table below lists some inductors for typical output
voltage design.
For reliable operation and best performance, the
input capacitors must have current rating higher Table 2.
than ICIN-RMS at worst operating conditions. Ceramic Vout L1 Manufacture
capacitors are preferred for input capacitors 5.0 V Shielded, 4.7uH Coilcraft
because of their low ESR and high current rating. MSS1278-472MLD
Depending on the application circuits, other low Shielded, 4.7uH Coilcraft
ESR tantalum capacitor may also be used. When MSS1260-472MLD
selecting ceramic capacitors, X5R or X7R type 3.3 V Un-shielded, 3.3uH Coilcraft
dielectric ceramic capacitors should be used for DO3316P-332MLD
their better temperature and voltage characteristics. Shielded, 3.3uH Coilcraft
Note that the ripple current rating from capacitor DO1260-332NXD
manufactures are based on certain amount of life Shield, 3.3uH ELYTONE
time. Further de-rating may be necessary in ET553-3R1
practical design. 1.8 V Shield, 2.2uH ELYTONE
ET553-2R1
Inductor Un-shielded, 1.5uH Coilcraft
DO3316P-152MLD
The inductor is used to supply constant current to Shielded, 1.5uH Coilcraft
output when it is driven by a switching voltage. For MSS1260-152NXD
given input and output voltage, inductance and
switching frequency together decide the inductor
ripple current, which is, Output Capacitor
where CO is output capacitor value and ESRCO is The zero is a ESR zero due to output capacitor and
the Equivalent Series Resistor of output capacitor. its ESR. It is can be calculated by:
When low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the 1
switching frequency dominates. Output ripple is f Z1 =
mainly caused by capacitor value and inductor 2π × CO × ESRCO
ripple current. The output ripple voltage calculation
can be simplified to: Where CO is the output filter capacitor;
1 RL is load resistor value;
∆VO = ∆I L × ESRCO is the equivalent series resistance
8 × f × CO of output capacitor;
If the impedance of ESR at switching frequency The compensation design is actually to shape the
dominates, the output ripple voltage is mainly converter control loop transfer function to get
decided by capacitor ESR and inductor ripple desired gain and phase. Several different types of
current. The output ripple voltage calculation can be compensation network can be used for AOZ1014.
further simplified to: For most cases, a series capacitor and resistor
∆VO = ∆I L × ESRCO network connected to the COMP pin sets the pole-
zero and is adequate for a stable high-bandwidth
control loop.
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric In AOZ1014, FB pin and COMP pin are the
type of ceramic, or other low ESR tantalum are inverting input and the output of internal
recommended to be used as output capacitors.
transconductance error amplifier. A series R and C
compensation network connected to COMP
In a buck converter, output capacitor current is provides one pole and one zero. The pole is:
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by: G EA
f p2 =
∆I L 2π × CC × GVEA
I CO _ RMS =
12
Where GEA is the error amplifier transconductance,
which is 200·10-6 A/V;
Usually, the ripple current rating of the output
GVEA is the error amplifier voltage gain,
capacitor is a smaller issue because of the low
which is 800 V/V;
current stress. When the buck inductor is selected
CC is compensation capacitor;
to be very small and inductor ripple current is high,
output capacitor could be overstressed.
The zero given by the external compensation
network, capacitor CC and resistor RC, is located at:
Loop Compensation
1
fZ2 =
AOZ1014 employs peak current mode control for 2π × CC × RC
easy use and fast transient response. Peak current
mode control eliminates the double pole effect of
To design the compensation circuit, a target
the output L&C filter. It greatly simplifies the
crossover frequency fC for close loop must be
compensation loop design.
selected. The system crossover frequency is where
control loop has unity gain. The crossover is the
With peak current mode control, the buck power
also called the converter bandwidth. Generally a
stage can be simplified to be a one-pole and one-
higher bandwidth means faster response to load
zero system in frequency domain. The pole is
transient. However, the bandwidth should not be
dominant pole can be calculated by:
too high because of system stability concern. When
designing the compensation loop, converter stability
1 under all line and load condition must be
f p1 =
2π × CO × RL considered.
Usually, it is recommended to set the bandwidth to will operate under the recommended environmental
be equal or less than 1/10 of switching frequency. conditions.
AOZ1014 operates at a fixed 500kHz switching
frequency. It is recommended to choose a Several layout tips are listed below for the best
crossover frequency equal or less than 50kHz. electric and thermal performance:
1 .5
CC =
2π × RC × f p1
CO × R L
CC =
RC
An easy-to-use application software which helps to
design and simulate the compensation loop can be
found at www.aosmd.com.