Introduction and Motivation VLSI Circuit PDF
Introduction and Motivation VLSI Circuit PDF
Introduction and Motivation VLSI Circuit PDF
Ayoush Johari
Assistant Professor
Lakshmi Narain College of Technology and Science
Bhopal
Syllabus
Unit -1 – Introduction
Introduction to CMOS VLSI circuit
VLSI design flow
Design strategies
Hierarachy
Regularity
Modularity
Locality
MOS Transistor as a Switches
CMOS Logic
Combinational circuit
Latches and Register
Introduction of CAD Tool
Design entry
Synthesis
Functional simulation.
Unit 2 - Specification of sequential systems
• Characterizing equation & definition of synchronous sequential
machines.
• Realization of state diagram and state table from verbal description
• Mealy and Moore model machines state table and transition diagram
• Minimization of the state table of completely and incompletely specified
sequential machines.
Unit 3 -- Asynchronous Sequential Machine
nMOS
=
design
pMOS
Circuits
wires
transistors
R. Noyce J. Kilby
Technology Scaling
If a pond lily doubles everyday and it takes 30 days to completely cover a
pond, on what day will the pond be 1/2 covered?
Moore’s Law. The number of transistors in an integrated
circuit doubles every 2 years.
Human Hair
~75 m
. 0.18 m
180 nm
. feature
2. write
specifications
3. design
system 4. analyze/
model
if satisfactory
system
5. Fabrication
6. test / work as
modeled?
1. Applications / Ideas
2. Specifications
• Instruction set
• Interface (I/O pins)
• Organization of the system
• Functionality of each unit in the
and how it to communicate to
other unit
3/4. Design and Analysis
VHDL / Verilog / SystemC
design schematics
compilation/
synthesis
tapeout
printing
test and
packaging
dice
chip die
wafer
6. Evaluate design and compare to model.
board
What are we going to cover in this class?
Sun UltraSparc
UltraSPARC IV
UltraSPARC III
UltraSPARC IIIi
UltraSPARC IIi
UltraSPARC IIe
Pentium 4
– Introduction date: November
20, 2000
• 1.4 GHz clock
• fabricated in 180 nm process,
• 42 mln transistors)
– In 2002 (2 GHz in 130 nm, 55
mln transistors)
– In 2005 (3.8 GHz in 90 nm, 125
mln transistors)
– Typical Use: Desktops and
entry-level workstations
Supercomputer for Sony's PlayStation 3
•In 2006
•143 mm2
•3 GHZ operation
•65 nm CMOS
technology
•291 mln transistors
Other chips
Fujitsu 68903
HP PA8000
Other chips
Motorola MC68020
IBM/Motorola Power PC620
Evolution of Electronics
Technology Directions: SIA
Roadmap
100,000
10,000
1,000
100
10
Source: Intel
1
1970 1975 1980 1985 1990 1995 2000 2005
Projected
Moore’s law in Microprocessors
1000
10
P6
Pentium® proc
1 486
386
0.1 286
8085 8086
0.01 8080
8008
4004
0.001
1970 1980 1990 2000 2010
Year
Transistors on Lead Microprocessors double every 2 years
Die Size Growth
100
Die size (mm)
P6
486 Pentium ® proc
10 386
286
8080 8086
8085 ~7% growth per year
8008
4004 ~2X growth in 10 years
1
1970 1980 1990 2000 2010
Year
Die size grows by 14% to satisfy Moore’s Law
Frequency
CMOS
nMOS
100000
18KW
10000 5KW
1.5KW
Power (Watts)
1000 500W
Pentium® proc
100
286 486
10 8086 386
8085
8080
8008
1 4004
0.1
1971 1974 1978 1985 1992 2000 2004 2008
Year
Did this really happen?
Power Dissipation
Nozzle
1000
Nuclear
Reactor
100
8086
10 4004 Hot Plate P6
8008 8085 386 Pentium® proc
286 486
8080
1
1970 1980 1990 2000 2010
Year
Power density too high to keep junctions at low temp
Not Only Microprocessors
Cell
Phones
Video
games
Small
Signal RF
Power Digital Cellular Market iPod
RF
(Phones Shipped)
Power
1996 1997 1998 1999 2000
Management
Units 48M 86M 162M 260M 435M
Analog
Baseband
iTablet
Digital Baseband
(DSP + MCU)
Challenges in VLSI Design
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