IQMath Fixed Vs Floating PDF
IQMath Fixed Vs Floating PDF
IQMath Fixed Vs Floating PDF
Introduction
One of the most important estimations in embedded control is the calculation of computing time
for a given task. Since embedded control has to cope with these tasks in a given and fixed amount
of time, we call this ‘Real Time Computing’. And, as you know, time goes very quickly.
• 1990: 50 pages,
So, how does a processor operate with all these mathematical calculations? And, how does the
processor access process data?
You know that the ‘native’ numbering scheme for a digital controller uses binary numbers.
Unfortunately, all process values are either in the format of integer or real numbers. Depending
on how a processor deals with these numbers in its translation into binary numbers, we
distinguish between two basic types of processor core:
• Floating-point Processors
• Fixed-point Processors
This chapter will start with a brief comparison between the two types of processor.
Because the C28x belongs to the fixed-point type we will focus on this type more in detail. After
a brief discussion about binary numbers we will have a look into the different options to use the
fixed-point unit of the C28x. It can perform various types of mathematical operations in a very
efficient way, using only a few machine clock cycles.
The secret behind this approach is called “IQ-Math”. In case of the C28x Texas Instruments
provides a library that uses the internal hardware of the C28x in the most efficient way to operate
with 32bit fixed-point numbers. Taking into account that all process data usually do not exceed a
resolution of 16 bits, the library gives enough headroom for advanced numerical calculations.
The latest version of Texas Instruments “IQ-Math” - Library can be found with literature number
“SPRC087” at www.ti.com.
Module Topics
C28x IQ – Math Library..........................................................................................................................11-1
Introduction ...........................................................................................................................................11-1
Module Topics........................................................................................................................................11-2
Floating-point, Integer and Fixed-point ................................................................................................11-3
IEEE 754 Floating-point Format...........................................................................................................11-4
Integer Number Basics...........................................................................................................................11-7
Two’s Complement representation....................................................................................................11-7
Binary Multiplication ........................................................................................................................11-7
Binary Fractions ....................................................................................................................................11-9
Multiplying Binary Fractions ............................................................................................................11-9
The “IQ” – Format..............................................................................................................................11-11
Sign Extension......................................................................................................................................11-14
Correcting the redundant sign bit ........................................................................................................11-15
IQ – Math – Library.............................................................................................................................11-17
Standard ANSI – C 16-Bit Mathematics .........................................................................................11-18
Standard ANSI – C 32-Bit Mathematics .........................................................................................11-19
32-Bit IQ – Math Approach.............................................................................................................11-20
IQ – Math Library Functions...........................................................................................................11-24
IQ- Math Application : Field Orientated Control ...........................................................................11-25
Fixed-point Processors are based on internal hardware that supports operations with integer data.
The arithmetic logic unit and, in case of digital signal processors, the hardware multiply unit,
expect data to be in one of the fixed-point types. There are limitations in the dynamic range of a
fixed-point processor, but they are inexpensive.
What happens, when we write a program for a fixed-point processor in C and we declare a
floating-point data type ‘float’ or ‘double’? A number of library functions support this data type
on a fixed-point machine. These standard ANSI-C functions consume a lot of computing power.
Recalling the time constrains in a real time project, we just can’t afford to use these data types in
most of embedded control applications.
The solution, in case of the C28x is “IQ-Math”. The IQ-Math Library is a collection of highly
optimised and high precision mathematical functions used to seamlessly port floating-point algo-
rithms into fixed-point code. In addition, by incorporating the ready-to-use high precision func-
tions, the IQ-Math library can shorten significantly an embedded control development time.
Processor Types
Floating Point Processors
Internal Hardware Unit to support Floating Point
Operations
Examples : Intel’s Pentium Series , Texas
Instruments C 6000 DSP
High dynamic range for numeric calculation
Rather expensive
Integer / Fixed – Point Processors
Fixed Point Arithmetic Unit
Almost all embedded controllers are fixed point
machines
Examples: all microcontroller families, e.g.
Motorola HC68x, Infineon C166, Texas
Instruments TMS430, TMS320C5000, C2000
Lowest price per MIPS 11 - 3
11 - 4
Floating-point definitions:
• Mantissa (M):
23
−1
M = 1 + m1 ⋅ 2 + m 2 ⋅ 2 −2
+ ... = 1 + ∑ mi ⋅ 2 −i
i =1
1≤ M < 2
• Exponent (E):
8 Bit signed exponent, stored with offset “+127”
• Summary:
E − OFFSET
Z = (− 1) ⋅ M ⋅ 2
S
Example1:
0x 3FE0 0000 = 0011 1111 1110 0000 0000 0000 0000 0000 B
S=0
Example2:
0x BFB0 0000 = 1011 1111 1011 0000 0000 0000 0000 0000 B
S=1
Example3:
Z = -2.5 S=1
2.5 = 1.25 * 21
1 = E – OFFSET
E = 128
Binary : 1100 0000 0010 0000 0000 0000 0000 0000 B = 0x C020 0000
z = 10.000000238 WRONG!
RIGHT?
You cannot represent 10.000000238 with
single-precision floating point
0x412000000 = 10.000000000
10.000000238 ⇐ can’t represent!
0x412000001 = 10.000000950
Binary Numbers
01102 = (0*8)+(1*4)+(1*2)+(0*1) = 610
111102 = (1*16)+(1*8)+(1*4)+(1*2)+(0*1) = 3010
11 - 6
Binary Multiplication
Now consider the process of multiplying two two's complement values, which is one of the most
often used operations in digital control. As with “long hand” decimal multiplication, we can per-
form binary multiplication one “place” at a time, and sum the results together at the end to obtain
the total product.
Note: The method shown at the following slide is not the method the C28x uses to multiply
numbers — it is merely a way of observing how binary numbers work in arithmetic processes.
The C28x uses 32-bit operands and an internal 64-bit product register. For the sake of clarity,
consider the example below where we shall investigate the use of 4-bit values and an 8-bit
accumulation:
Data Memory ?
• Size of the product is twice as long as the input values ( 4 bit * 4 bit = 8 bit)
• If this product is to be used in a next loop of a calculation, how can the result be stored
back to memory in the same length as the inputs?
From this analysis, it is clear that integers do not behave well when multiplied.
Might some other type of number system behave better? Is there a number system where the
results of a multiplication have bounds?
Binary Fractions
In order to represent both positive and negative values, the two's complement process will again
be used. However, in the case of fractions, we will not set the LSB to 1 (as was the case for inte-
gers). When we consider that the range of fractions is from -1 to ~+1, and that the only bit which
conveys negative information is the MSB, it seems that the MSB must be the “negative ones posi-
tion”. Since the binary representation is based on powers of two, it follows that the next bit would
be the “one-half” position, and that each following bit would have half the magnitude again.
1 0 1 1
-1
• 1/2 1/4 1/8
11 - 9
The example above shows 2 input numbers in I1Q3 - Format. When multiplied the length of the
result will add both I and Q portions (see next slide):
Four-Bit Multiplication
0100
. 1/2
x 1101
. x - 3/8
00000100
0000000
000100
11100
11110100 -3/16
Accumulator 11110100
If we store back the intermediate product with the four bits around the binary point we keep the
data format (I1Q3) in the same shape as the input values. No need to re-scale any intermediate
results!
Advantage: With Binary Fractions we will gain a lot of speed in closed loop
calculations.
Disadvantage: The result might not be the exact one. As you can see from the slide above we will
end up with (-4/16) stored back to Data Memory. Bits 2-4 to 2-6 are truncated. The correct result
would have been (-3/16).
Recall that the 4-bit input operand multiplication operation is not the real size for the C28x,
which operates on 32-bit input values. In this case, the truncation will affect bits 2-32 to 2-64. Given
the real size of process data with let’s say 12-bit ADC measurement values, there is plenty of
room left for truncation.
In most cases we will truncate noise only. However, in some feedback applications like IIR-
Filters the small errors can add and lead to a given degree of instability. It is designer’s
responsibility to recognize this potential source of failure when using binary fractions.
Fractional Representation
31 0
S IIIIIIII fffffffffffffffffffffff
32 bit mantissa
.
-2I + 2I-1 + … + 21 + 20 2-1 + 2-2 + … + 2-Q
“IQ” – Format
“I” ⇒ INTEGER – Fraction
“Q” ⇒ QUOTIENT – Fraction
11 - 10
IQ - Examples
I1Q3 – Format:
3 0
S fff
Most negative decimal number: -1.0 = 1.000 B
11 - 11
IQ - Examples
I3Q1 – Format:
3 0
SII f
Most negative decimal number: -4.0 = 100.0 B
11 - 12
IQ - Examples
I1Q31 – Format:
31 0
S fff ffff ffff ffff ffff ffff ffff ffff
Most negative decimal number: -1.0
1.000 0000 0000 0000 0000 0000 0000 0000 B
11 - 13
IQ - Examples
I8Q24 – Format:
31 0
S III IIII ffff ffff ffff ffff ffff
Most negative decimal number: -128
1000 0000. 0000 0000 0000 0000 0000 0000 B
11 - 14
And to come back to the failing floating-point example from the beginning of this module; IQ-
Math can do much better:
z = 10.000000238 (0x0A000004)
11 - 15
Sign Extension
When working with signed numbers it is important to keep the sign information when expanding
an operand in its binary representation, for example from 4-bit to 8-bit, as shown in the next slide.
The C28x can operate on either unsigned binary or two’s complement operands. The so-called
“Sign Extension Mode (SXM)” identifies whether or not the sign extension process is used
automatically when a number is processed internally. It is a good programming practice to always
select the desired operating mode of SXM at the beginning of a subroutine or a module.
The SXM-Bit is part of ST0, one of the C28x status- and control registers. It can be accessed in
assembly language only. To set or to clear it out of a C environment one can use the inline
assembly function:
Texas Instruments “IQ-Math”-library, which will be explained in the rest of this module, takes
care of this shift procedure internally. Again, we gain speed by using “IQ-Math”.
Accumulator 11 11 11 11 00 11 00 00
Redundant
Sign Bit
11 - 17
How do we code fractions in an ANSI-C environment? We do not have a dedicated data type,
called ‘fractional’. There is a new ANSI- standard under development, called “embedded C”,
which will eventually use this type.
For now we can use the following trick, see next slide:
½ 16K 4000
0
⇒ 0 0000
*32768
–½ –16K C000
–1 –32K 8000
Fractions Integers Hex
11 - 19
IQ – Math – Library
Implementing complex digital control algorithms on a Digital Signal Processor (DSP), or any
other DSP capable processor, typically we come across the following issues:
Natural development
Simulation
Platform starts with simulation in
Takes many days/weeks (i.e. MatLab) floating-point
to convert (one way
process)
Floating-Point DSP
Fix-Point DSP
11 - 20
The design may initially start with a simulation (i.e. MatLab) of a control algorithm, which
typically would be written in floating-point math (C or C++). This algorithm can be easily ported
to a floating-point device. However, because of the commercial reality of cost constraints, most
likely a 16-bit or 32-bit fixed-point device would be used in many target systems.
The effort and skill involved in converting a floating-point algorithm to function using a 16-bit or
32-bit fixed-point device is quite significant. A great deal of time (many days or weeks) would
be needed for reformatting, scaling and coding the problem. Additionally, the final implementa-
tion typically has little resemblance to the original algorithm. Debugging is not an easy task and
the code is not easy to maintain or document.
s Q15 M
ss Q30
s Q15 X
sssssssssssss Q15 s Q15 B
Align Binary
<< 15 Point For Add
ss Q30
sI Q30
Align Binary
>> 15 Point For Store
ssssssssssssI Q15 s Q15 Y
11 - 21
The diagram shows the transformations, which are needed to adjust the binary point in between
the steps of this solution. We assume that the input numbers are in I1Q15-Format. After M is
multiplied by X, we have an intermediate product in I2Q30-format. Before we can add variable
B, we have to align the binary point by shifting b 15 times to the left. Of course we need to
typecast B to a 32-bit long first to keep all bits of B. The sum is still in I2Q30-format. Before we
can store back the final result into Y we have to right shift the binary point 15 times.
The last line of the slide shows the equivalent syntax in ANSI-C. “i32” stands for a 32-bit integer,
usually called ‘long’. ‘Q’ is a global constant and gives the number of fractional bits; in our
example Q is equal to 15.
The disadvantage of this Q15 – approach is its limitation to 16 bits. A lot of projects for digital
signal processing and digital control will not be able to achieve stable behavior due to the lack of
either resolution or dynamic range.
The C28x as a 32-bit processor can do better – we just have to expand the scheme to 32-bit binary
fractions!
I8 Q24 M
I16 Q48
I8 Q24 X
ssssssssssssssssssI8 Q24 I8 Q24 B
Align Decimal
<< 24 Point for Add
ssssI8 Q48
I16 Q48
Align Decimal
>> 24 Point for Store
sssssssssssssssssI16 Q24 I8 Q24 Y
The big problem with the translation into ANSI-C code is that we do not have a 64-bit integer
data type! Although the last line of the slide looks pretty straight forward, we can’t apply this line
to a standard C-compiler!
What now?
The rescue is the internal hardware arithmetic (Arithmetic Logic Unit and 32-bit by 32-bit
Hardware Multiply Unit) of the C28x. These units are able to deal with 64-bit intermediate results
in a very efficient way. Dedicated assembly language instructions for multiply and add operations
are available to operate on the integer part and the fractional part of the 64-bit number.
To be able to use these advanced instructions, we have to learn about the C28x assembly
language in detail. Eventually your professor offers an advanced course in C28x assembly
language programming -
OR, just use Texas Instruments “IQ-Math”-library, which is doing nothing more than using these
advanced assembly instructions!
I8 Q24 M
I16 Q48
I8 Q24 X
Align Decimal
Point Of Multiply
>> 24
sssssssssssssssssI16 Q24
I8 Q24 B
I8 Q24 I8 Q24 Y
11 - 23
The “IQ”-Math approach ‘redefines’ the multiply operation to use the advantages of the internal
hardware of the C28x. As stated, the C28x is internally capable of handling 64-bit fixed-point
numbers with dedicated instruction sets. Texas Instruments provides a collection of intrinsic
functions, one of them to replace the standard multiply operation by an _IQmpy(M,X) –line.
Intrinsic means, we do not ‘call’ a function with a lot of context save and restore; instead the
machine code instructions are directly included in our source code.
As you can see from the next slide the final C-code looks much better now without the
cumbersome shift operations that we have seen in the standard C approach.
AND: The execution time of the final machine code for the whole equation Y = MX + B takes
only 7 cycles – with a 150MHz C28x this translates into 46 nanoseconds!
IQmath Approach
Multiply Operation
11 - 24
Let’s have a closer look to the assembly instructions used in the example above.
The first instruction ‘MOVL XT,@M’ is a 32-bit load operation to fetch the value of M into a
temporary register ‘XT’.
Next, ‘XT’ is multiplied by another 32-bit number taken from variable X (‘IMPYL P,XT,@X’).
When multiplying two 32-bit numbers, the result is a 64-bit number. In the case of this
instruction, the lower 32-bit of the result are stored in a register ‘P’.
The upper 32 bits are stored with the next instruction (‘QMPYL ACC,XT,@X’) in the ‘ACC’
register. ‘QMPYL’ is doing the same multiplication once more but keeps the upper half of the
result only. At the end, we have stored all 64 bits of the multiplication in register combination
ACC:P.
What follows is the adjustment of the binary point. The 64-bit result in ACC:P is in I16Q48-
fractional format. Shifting it 32-24 times to the left, we derive an I8Q56-format. The instruction
‘ADDL ACC,@B’ uses only the upper 32 Bits of the 64-bit, thus reducing our fractional format
from I8Q56 to I8Q24 – which is the same format as we use for B and all our variables!
The next slide compares the different approaches. The IQ-Math library also defines a new data
type ‘_iq’ to simplify the definition of fractional data. If you choose to use C++ the floating-point
equation and the C++ equation are identical! This is possible due to the overload feature of C++.
The floating-point multiply operation is overloaded with its IQ-Math replacement – the code
looks ‘natural’.
IQmath Approach
It looks like floating-
floating-point!
float Y, M, X, B;
Floating-Point
Y = M * X + B;
long Y, M, X, B;
Traditional
Fix-Point Q Y = ((i64) M * (i64) X + (i64) B << Q)) >> Q;
_iq Y, M, X, B;
“IQmath”
In C Y = _IQmpy(M, X) + B;
“IQmath” iq Y, M, X, B;
In C++ Y = M * X + B;
This technique opens the way to generate a unified source code that can be compiled in a
floating-point representation as well as into a fixed-point output solution. No need to translate a
floating-point simulation code into a fixed-point implementation – the same source code can
serve both worlds.
IQmath Approach
GLOBAL_Q simplification
User selects “Global Q” value for the whole application
GLOBAL_Q
based on the required dynamic range or resolution, for example:
GLOBAL_Q Max Val Min Val Resolution
28 7.999 999 996 -8.000 000 000 0.000 000 004
24 127.999 999 94 -128.000 000 00 0.000 000 06
20 2047.999 999 -2048.000 000 0.000 001
IQmath Approach
Targeting Fixed-Point or Floating-Point device
Y = _IQmpy(M, X) + B;
User selects target math type
(in “IQmathLib.h” file)
#if MATH_TYPE == IQ_MATH #if MATH_TYPE == FLOAT_MATH
Operation Floating-
Floating-Point “IQmath” in C “IQmath” in C++
iq to iqN A _IQtoIQN(A)
IQtoIQN(A) IQtoIQN(A)
IQtoIQN(A)
iqN to iq A _IQNtoIQ(A)
IQNtoIQ(A) IQNtoIQ(A)
IQNtoIQ(A)
integer(iq
integer(iq)) (long) A _IQint(A)
IQint(A) IQint(A)
IQint(A)
fraction(iq
fraction(iq)) A – (long) A _IQfrac(A)
IQfrac(A) IQfrac(A)
IQfrac(A)
iq = iq*long
iq*long A * (float) B _IQmpyI32(A,B) IQmpyI32(A,B)
integer(iq
integer(iq*long)
*long) (long) (A * (float) B) _IQmpyI32int(A,B) IQmpyI32int(A,B)
fraction(iq
fraction(iq*long)
*long) A - (long) (A * (float) B) _IQmpyI32frac(A,B) IQmpyI32frac(A,B)
qN to iq A _QNtoIQ(A)
QNtoIQ(A) QNtoIQ(A)
QNtoIQ(A)
iq to qN A _IQtoQN(A)
IQtoQN(A) IQtoQN(A)
IQtoQN(A)
string to iq atof(char)
atof(char) _atoIQ(char)
atoIQ(char) atoIQ(char)
atoIQ(char)
IQ to float A _IQtoF(A)
IQtoF(A) IQtoF(A)
IQtoF(A)
The next slide is a block diagram of a control scheme for an alternating current (AC) induction
motor. These types of motors are based on a three-phase voltage system. Modern control schemes
are introduced these days to improve the efficiency of the motor. One principle, called “Space
Vector Modulation” or “Field Orientated Control” is quite popular today. In fact this theory is
almost 70 years old now, but in the past it was impossible to realize a real time control due to the
lack of computing power. Now with a controller like the C28x, it can be implemented!
Sensorless,
Sensorless, ACI induction machine direct rotor flux control
Goal: motor speed estimation & alpha-
alpha-axis stator current estimation
11 - 30
The core control system consists of three digital PID-controllers, one for the speed control of the
motor (“PID_REG3 SPD”), one to control the torque (“PID_REG3 IQ”) and one for the flux
(“PID_REG3 ID”). Between the control loops and the motor two coordinate transforms are
performed (“PARK” and “I_PARK”).
Let’s have a look into a standard C implementation of the PARK transform, which converts a 3-D
vector to a 2-D vector. For now, it is not necessary to fully understand this transform, just have a
look into the mathematical operations involved.
All variables are data type “float” and the functions included are:
• An addition and
• A subtraction.
This code can easily be compiled by any standard C compiler and downloaded into a simulation
or into any processor, for example the C28x. It will work, but it will not be the most efficient way
to use the C28x because it will involve floating-point library function calls that will consume a
considerable amount of computing time.
#include “math.h”
math.h”
#define TWO_PI 6.28318530717959
void park_calc(PARK *v)
{
float cos_
cos_ang , sin_ang
sin_ang;
;
sin_ang
sin_ang = sin(TWO_PI * v-
v->ang);
ang);
cos_
cos_ang = cos(TWO_PI
cos(TWO_PI * v-
v->ang);
ang);
v->de = (v-
(v->ds * cos_
cos_ang)
ang) + (v-
(v->qs * sin_ang
sin_ang);
);
v->qe = (v-
(v->qs * cos_
cos_ang)
ang) - (v-
(v->ds * sin_ang
sin_ang);
);
}
11 - 31
With the “IQ-Math” library we can improve the code for the C28x, as shown at the next slide. Of
course, we have to replace all float function calls by “IQ-Math” intrinsics.
All variables are now of data type “_iq”, the sine and cosine function calls are replaced by their
intrinsic replacements as well as the six multiply operations.
The constant “TWO_PI” will be converted into the standard IQ-format with the conversion
function “_IQ( )”. This way the number 6.28 will be translated into the correct fixed-point scale
before it is used during compilation.
The resulting code will be compiled into a much denser and faster code for the C28x. Of course, a
little bit of coding is still needed to convert an existing floating-point code into the “IQ-Math” C-
code.
Fortunately, the structure of the two program versions is identical, which helps to keep a
development project consistent and maintainable, for both the floating-point and a fixed-point
implementations.
#include “math.h”
math.h”
#include “IQmathLib.h”
#define TWO_PI _IQ(6.28318530717959)
6.28318530717959
void park_calc(PARK *v)
{
float cos_
_iq cos_ang , sin_ang
sin_ang;
;
sin_ang = _IQsin(_IQmpy(TWO_PI
sin_ang sin(TWO_PI * v- ang);, v->ang));
v->ang);
cos_ang = _IQcos(_IQmpy(TWO_PI
cos_ cos(TWO_PI
cos(TWO_PI * v- ang);, v->ang));
v->ang);
v->de = _IQmpy(v->ds
(v- cos_,
(v->ds * cos_ cos_ang)
ang)
ang (v->+
) + (v- qs_IQmpy(v->qs
* sin_ang); , sin_ang);
sin_ang);
v->qe = _IQmpy(v->qs
(v- cos_,
(v->qs * cos_ cos_ang)
ang)
ang (v->-
) - (v- ds_IQmpy(v->ds
* sin_ang); , sin_ang);
sin_ang);
}
11 - 32
If we go further on and use a C++ compiler to translate the “IQ-Math” code, we can take
advantage of the overload technique of C++. The result for this PARK-transform is shown at the
next slide.
#include “math.h”
math.h”
extern “C” { #include “IQmathLib.h” }
#include “IQmathCPP.h”
v->de = (v-
(v->ds * cos_
cos_ang)
ang) + (v-
(v->qs * sin_ang
sin_ang);
);
v->qe = (v-
(v->qs * cos_
cos_ang)
ang) - (v-
(v->ds * sin_ang
sin_ang);
);
}
11 - 33
The complete system was coded using "IQ-Math". Based on analysis of coefficients in the
system, the largest coefficient had a value of 33.3333. This indicated that a minimum dynamic
range of 7bits (+/-64 range) was required. Therefore, this translated to a GLOBAL_Q value of
32-7 = 25(Q25). Just to be safe, the initial simulation runs were conducted with GLOBAL_Q =
24 (Q24) value.
Next, the whole AC induction motor solution was investigated for stability and dynamic behavior
by changing the global Q value. With a 32-bit fixed-point data type we can modify the fractional
part between 0 bit (“Q0”) and 31 bits (“Q31”). The results are shown below. As you can see,
there is an area, in which all tests led to a stable operating mode of the motor. The two other areas
showed an increasing degree of instability, caused by either not enough dynamic range in the
integer part or not enough fractional resolution of the numbering system.
Q18 to Q0 Unstable
(not enough resolution, quantization problems)
11 - 34
11 - 35